drivers/usb/host/sl811.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * SL811HS register declarations and HCD data structures
   4  *
   5  * Copyright (C) 2004 Psion Teklogix
   6  * Copyright (C) 2004 David Brownell
   7  * Copyright (C) 2001 Cypress Semiconductor Inc.
   8  */
   9
  10 /*
  11  * SL811HS has transfer registers, and control registers.  In host/master
  12  * mode one set of registers is used; in peripheral/slave mode, another.
  13  *  - SL11H only has some "A" transfer registers from 0x00-0x04
  14  *  - SL811HS also has "B" registers from 0x08-0x0c
  15  *  - SL811S (or HS in slave mode) has four A+B sets, at 00, 10, 20, 30
  16  */
  17
  18 #define SL811_EP_A(base)        ((base) + 0)
  19 #define SL811_EP_B(base)        ((base) + 8)
  20
  21 #define SL811_HOST_BUF          0x00
  22 #define SL811_PERIPH_EP0        0x00
  23 #define SL811_PERIPH_EP1        0x10
  24 #define SL811_PERIPH_EP2        0x20
  25 #define SL811_PERIPH_EP3        0x30
  26
  27
  28 /* TRANSFER REGISTERS:  host and peripheral sides are similar
  29  * except for the control models (master vs slave).
  30  */
  31 #define SL11H_HOSTCTLREG        0
  32 #       define SL11H_HCTLMASK_ARM       0x01
  33 #       define SL11H_HCTLMASK_ENABLE    0x02
  34 #       define SL11H_HCTLMASK_IN        0x00
  35 #       define SL11H_HCTLMASK_OUT       0x04
  36 #       define SL11H_HCTLMASK_ISOCH     0x10
  37 #       define SL11H_HCTLMASK_AFTERSOF  0x20
  38 #       define SL11H_HCTLMASK_TOGGLE    0x40
  39 #       define SL11H_HCTLMASK_PREAMBLE  0x80
  40 #define SL11H_BUFADDRREG        1
  41 #define SL11H_BUFLNTHREG        2
  42 #define SL11H_PKTSTATREG        3       /* read */
  43 #       define SL11H_STATMASK_ACK       0x01
  44 #       define SL11H_STATMASK_ERROR     0x02
  45 #       define SL11H_STATMASK_TMOUT     0x04
  46 #       define SL11H_STATMASK_SEQ       0x08
  47 #       define SL11H_STATMASK_SETUP     0x10
  48 #       define SL11H_STATMASK_OVF       0x20
  49 #       define SL11H_STATMASK_NAK       0x40
  50 #       define SL11H_STATMASK_STALL     0x80
  51 #define SL11H_PIDEPREG          3       /* write */
  52 #       define  SL_SETUP        0xd0
  53 #       define  SL_IN           0x90
  54 #       define  SL_OUT          0x10
  55 #       define  SL_SOF          0x50
  56 #       define  SL_PREAMBLE     0xc0
  57 #       define  SL_NAK          0xa0
  58 #       define  SL_STALL        0xe0
  59 #       define  SL_DATA0        0x30
  60 #       define  SL_DATA1        0xb0
  61 #define SL11H_XFERCNTREG        4       /* read */
  62 #define SL11H_DEVADDRREG        4       /* write */
  63
  64
  65 /* CONTROL REGISTERS:  host and peripheral are very different.
  66  */
  67 #define SL11H_CTLREG1           5
  68 #       define SL11H_CTL1MASK_SOF_ENA   0x01
  69 #       define SL11H_CTL1MASK_FORCE     0x18
  70 #               define SL11H_CTL1MASK_NORMAL    0x00
  71 #               define SL11H_CTL1MASK_SE0       0x08    /* reset */
  72 #               define SL11H_CTL1MASK_J         0x10
  73 #               define SL11H_CTL1MASK_K         0x18    /* resume */
  74 #       define SL11H_CTL1MASK_LSPD      0x20
  75 #       define SL11H_CTL1MASK_SUSPEND   0x40
  76 #define SL11H_IRQ_ENABLE        6
  77 #       define SL11H_INTMASK_DONE_A     0x01
  78 #       define SL11H_INTMASK_DONE_B     0x02
  79 #       define SL11H_INTMASK_SOFINTR    0x10
  80 #       define SL11H_INTMASK_INSRMV     0x20    /* to/from SE0 */
  81 #       define SL11H_INTMASK_RD         0x40
  82 #       define SL11H_INTMASK_DP         0x80    /* only in INTSTATREG */
  83 #define SL11S_ADDRESS           7
  84
  85 /* 0x08-0x0c are for the B buffer (not in SL11) */
  86
  87 #define SL11H_IRQ_STATUS        0x0D    /* write to ack */
  88 #define SL11H_HWREVREG          0x0E    /* read */
  89 #       define SL11H_HWRMASK_HWREV      0xF0
  90 #define SL11H_SOFLOWREG         0x0E    /* write */
  91 #define SL11H_SOFTMRREG         0x0F    /* read */
  92
  93 /* a write to this register enables SL811HS features.
  94  * HOST flag presumably overrides the chip input signal?
  95  */
  96 #define SL811HS_CTLREG2         0x0F
  97 #       define SL811HS_CTL2MASK_SOF_MASK        0x3F
  98 #       define SL811HS_CTL2MASK_DSWAP           0x40
  99 #       define SL811HS_CTL2MASK_HOST            0x80
 100
 101 #define SL811HS_CTL2_INIT       (SL811HS_CTL2MASK_HOST | 0x2e)
 102
 103
 104 /* DATA BUFFERS: registers from 0x10..0xff are for data buffers;
 105  * that's 240 bytes, which we'll split evenly between A and B sides.
 106  * Only ISO can use more than 64 bytes per packet.
 107  * (The SL11S has 0x40..0xff for buffers.)
 108  */
 109 #define H_MAXPACKET     120             /* bytes in A or B fifos */
 110
 111 #define SL11H_DATA_START        0x10
 112 #define SL811HS_PACKET_BUF(is_a)        ((is_a) \
 113                 ? SL11H_DATA_START \
 114                 : (SL11H_DATA_START + H_MAXPACKET))
 115
 116 /*-------------------------------------------------------------------------*/
 117
 118 #define LOG2_PERIODIC_SIZE      5       /* arbitrary; this matches OHCI */
 119 #define PERIODIC_SIZE           (1 << LOG2_PERIODIC_SIZE)
 120
 121 struct sl811 {
 122         spinlock_t              lock;
 123         void __iomem            *addr_reg;
 124         void __iomem            *data_reg;
 125         struct sl811_platform_data      *board;
 126         struct dentry           *debug_file;
 127
 128         unsigned long           stat_insrmv;
 129         unsigned long           stat_wake;
 130         unsigned long           stat_sof;
 131         unsigned long           stat_a;
 132         unsigned long           stat_b;
 133         unsigned long           stat_lost;
 134         unsigned long           stat_overrun;
 135
 136         /* sw model */
 137         struct timer_list       timer;
 138         struct sl811h_ep        *next_periodic;
 139         struct sl811h_ep        *next_async;
 140
 141         struct sl811h_ep        *active_a;
 142         unsigned long           jiffies_a;
 143         struct sl811h_ep        *active_b;
 144         unsigned long           jiffies_b;
 145
 146         u32                     port1;
 147         u8                      ctrl1, ctrl2, irq_enable;
 148         u16                     frame;
 149
 150         /* async schedule: control, bulk */
 151         struct list_head        async;
 152
 153         /* periodic schedule: interrupt, iso */
 154         u16                     load[PERIODIC_SIZE];
 155         struct sl811h_ep        *periodic[PERIODIC_SIZE];
 156         unsigned                periodic_count;
 157 };
 158
 159 static inline struct sl811 *hcd_to_sl811(struct usb_hcd *hcd)
 160 {
 161         return (struct sl811 *) (hcd->hcd_priv);
 162 }
 163
 164 static inline struct usb_hcd *sl811_to_hcd(struct sl811 *sl811)
 165 {
 166         return container_of((void *) sl811, struct usb_hcd, hcd_priv);
 167 }
 168
 169 struct sl811h_ep {
 170         struct usb_host_endpoint *hep;
 171         struct usb_device       *udev;
 172
 173         u8                      defctrl;
 174         u8                      maxpacket;
 175         u8                      epnum;
 176         u8                      nextpid;
 177
 178         u16                     error_count;
 179         u16                     nak_count;
 180         u16                     length;         /* of current packet */
 181
 182         /* periodic schedule */
 183         u16                     period;
 184         u16                     branch;
 185         u16                     load;
 186         struct sl811h_ep        *next;
 187
 188         /* async schedule */
 189         struct list_head        schedule;
 190 };
 191
 192 /*-------------------------------------------------------------------------*/
 193
 194 /* These register utilities should work for the SL811S register API too
 195  * NOTE:  caller must hold sl811->lock.
 196  */
 197
 198 static inline u8 sl811_read(struct sl811 *sl811, int reg)
 199 {
 200         writeb(reg, sl811->addr_reg);
 201         return readb(sl811->data_reg);
 202 }
 203
 204 static inline void sl811_write(struct sl811 *sl811, int reg, u8 val)
 205 {
 206         writeb(reg, sl811->addr_reg);
 207         writeb(val, sl811->data_reg);
 208 }
 209
 210 static inline void
 211 sl811_write_buf(struct sl811 *sl811, int addr, const void *buf, size_t count)
 212 {
 213         const u8        *data;
 214         void __iomem    *data_reg;
 215
 216         if (!count)
 217                 return;
 218         writeb(addr, sl811->addr_reg);
 219
 220         data = buf;
 221         data_reg = sl811->data_reg;
 222         do {
 223                 writeb(*data++, data_reg);
 224         } while (--count);
 225 }
 226
 227 static inline void
 228 sl811_read_buf(struct sl811 *sl811, int addr, void *buf, size_t count)
 229 {
 230         u8              *data;
 231         void __iomem    *data_reg;
 232
 233         if (!count)
 234                 return;
 235         writeb(addr, sl811->addr_reg);
 236
 237         data = buf;
 238         data_reg = sl811->data_reg;
 239         do {
 240                 *data++ = readb(data_reg);
 241         } while (--count);
 242 }
 243
 244 /*-------------------------------------------------------------------------*/
 245
 246 #ifdef PACKET_TRACE
 247 #    define PACKET              pr_debug("sl811: "stuff)
 248 #else
 249 #    define PACKET(stuff...)    do{}while(0)
 250 #endif