1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8974.c -- WM8974 ALSA Soc Audio driver
5 * Copyright 2006-2009 Wolfson Microelectronics PLC.
7 * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/regmap.h>
17 #include <linux/slab.h>
18 #include <sound/core.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
32 static const struct reg_default wm8974_reg_defaults
[] = {
33 { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 },
34 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
35 { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
36 { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
37 { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
38 { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
39 { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
40 { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
41 { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
42 { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
43 { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
44 { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
45 { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
46 { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
50 #define WM8974_POWER1_BIASEN 0x08
51 #define WM8974_POWER1_BUFIOEN 0x04
53 #define wm8974_reset(c) snd_soc_component_write(c, WM8974_RESET, 0)
55 static const char *wm8974_companding
[] = {"Off", "NC", "u-law", "A-law" };
56 static const char *wm8974_deemp
[] = {"None", "32kHz", "44.1kHz", "48kHz" };
57 static const char *wm8974_eqmode
[] = {"Capture", "Playback" };
58 static const char *wm8974_bw
[] = {"Narrow", "Wide" };
59 static const char *wm8974_eq1
[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
60 static const char *wm8974_eq2
[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
61 static const char *wm8974_eq3
[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
62 static const char *wm8974_eq4
[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
63 static const char *wm8974_eq5
[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
64 static const char *wm8974_alc
[] = {"ALC", "Limiter" };
66 static const struct soc_enum wm8974_enum
[] = {
67 SOC_ENUM_SINGLE(WM8974_COMP
, 1, 4, wm8974_companding
), /* adc */
68 SOC_ENUM_SINGLE(WM8974_COMP
, 3, 4, wm8974_companding
), /* dac */
69 SOC_ENUM_SINGLE(WM8974_DAC
, 4, 4, wm8974_deemp
),
70 SOC_ENUM_SINGLE(WM8974_EQ1
, 8, 2, wm8974_eqmode
),
72 SOC_ENUM_SINGLE(WM8974_EQ1
, 5, 4, wm8974_eq1
),
73 SOC_ENUM_SINGLE(WM8974_EQ2
, 8, 2, wm8974_bw
),
74 SOC_ENUM_SINGLE(WM8974_EQ2
, 5, 4, wm8974_eq2
),
75 SOC_ENUM_SINGLE(WM8974_EQ3
, 8, 2, wm8974_bw
),
77 SOC_ENUM_SINGLE(WM8974_EQ3
, 5, 4, wm8974_eq3
),
78 SOC_ENUM_SINGLE(WM8974_EQ4
, 8, 2, wm8974_bw
),
79 SOC_ENUM_SINGLE(WM8974_EQ4
, 5, 4, wm8974_eq4
),
80 SOC_ENUM_SINGLE(WM8974_EQ5
, 8, 2, wm8974_bw
),
82 SOC_ENUM_SINGLE(WM8974_EQ5
, 5, 4, wm8974_eq5
),
83 SOC_ENUM_SINGLE(WM8974_ALC3
, 8, 2, wm8974_alc
),
86 static const char *wm8974_auxmode_text
[] = { "Buffer", "Mixer" };
88 static SOC_ENUM_SINGLE_DECL(wm8974_auxmode
,
89 WM8974_INPUT
, 3, wm8974_auxmode_text
);
91 static const DECLARE_TLV_DB_SCALE(digital_tlv
, -12750, 50, 1);
92 static const DECLARE_TLV_DB_SCALE(eq_tlv
, -1200, 100, 0);
93 static const DECLARE_TLV_DB_SCALE(inpga_tlv
, -1200, 75, 0);
94 static const DECLARE_TLV_DB_SCALE(spk_tlv
, -5700, 100, 0);
96 static const struct snd_kcontrol_new wm8974_snd_controls
[] = {
98 SOC_SINGLE("Digital Loopback Switch", WM8974_COMP
, 0, 1, 0),
100 SOC_ENUM("DAC Companding", wm8974_enum
[1]),
101 SOC_ENUM("ADC Companding", wm8974_enum
[0]),
103 SOC_ENUM("Playback De-emphasis", wm8974_enum
[2]),
104 SOC_SINGLE("DAC Inversion Switch", WM8974_DAC
, 0, 1, 0),
106 SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL
, 0, 255, 0, digital_tlv
),
108 SOC_SINGLE("High Pass Filter Switch", WM8974_ADC
, 8, 1, 0),
109 SOC_SINGLE("High Pass Cut Off", WM8974_ADC
, 4, 7, 0),
110 SOC_SINGLE("ADC Inversion Switch", WM8974_ADC
, 0, 1, 0),
112 SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL
, 0, 255, 0, digital_tlv
),
114 SOC_ENUM("Equaliser Function", wm8974_enum
[3]),
115 SOC_ENUM("EQ1 Cut Off", wm8974_enum
[4]),
116 SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1
, 0, 24, 1, eq_tlv
),
118 SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum
[5]),
119 SOC_ENUM("EQ2 Cut Off", wm8974_enum
[6]),
120 SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2
, 0, 24, 1, eq_tlv
),
122 SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum
[7]),
123 SOC_ENUM("EQ3 Cut Off", wm8974_enum
[8]),
124 SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3
, 0, 24, 1, eq_tlv
),
126 SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum
[9]),
127 SOC_ENUM("EQ4 Cut Off", wm8974_enum
[10]),
128 SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4
, 0, 24, 1, eq_tlv
),
130 SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum
[11]),
131 SOC_ENUM("EQ5 Cut Off", wm8974_enum
[12]),
132 SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5
, 0, 24, 1, eq_tlv
),
134 SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1
, 8, 1, 0),
135 SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1
, 4, 15, 0),
136 SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1
, 0, 15, 0),
138 SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2
, 4, 7, 0),
139 SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2
, 0, 15, 0),
141 SOC_SINGLE("ALC Enable Switch", WM8974_ALC1
, 8, 1, 0),
142 SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1
, 3, 7, 0),
143 SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1
, 0, 7, 0),
145 SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2
, 8, 1, 0),
146 SOC_SINGLE("ALC Capture Hold", WM8974_ALC2
, 4, 7, 0),
147 SOC_SINGLE("ALC Capture Target", WM8974_ALC2
, 0, 15, 0),
149 SOC_ENUM("ALC Capture Mode", wm8974_enum
[13]),
150 SOC_SINGLE("ALC Capture Decay", WM8974_ALC3
, 4, 15, 0),
151 SOC_SINGLE("ALC Capture Attack", WM8974_ALC3
, 0, 15, 0),
153 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE
, 3, 1, 0),
154 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE
, 0, 7, 0),
156 SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA
, 7, 1, 0),
157 SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA
, 0, 63, 0, inpga_tlv
),
159 SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL
, 7, 1, 0),
160 SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL
, 6, 1, 1),
161 SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL
, 0, 63, 0, spk_tlv
),
163 SOC_ENUM("Aux Mode", wm8974_auxmode
),
165 SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST
, 8, 1, 0),
166 SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX
, 6, 1, 1),
168 /* DAC / ADC oversampling */
169 SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC
, 8, 1, 0),
170 SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC
, 8, 1, 0),
173 /* Speaker Output Mixer */
174 static const struct snd_kcontrol_new wm8974_speaker_mixer_controls
[] = {
175 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX
, 1, 1, 0),
176 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX
, 5, 1, 0),
177 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX
, 0, 1, 0),
180 /* Mono Output Mixer */
181 static const struct snd_kcontrol_new wm8974_mono_mixer_controls
[] = {
182 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX
, 1, 1, 0),
183 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX
, 2, 1, 0),
184 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX
, 0, 1, 0),
188 static const struct snd_kcontrol_new wm8974_boost_mixer
[] = {
189 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA
, 6, 1, 1),
193 static const struct snd_kcontrol_new wm8974_inpga
[] = {
194 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT
, 2, 1, 0),
195 SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT
, 1, 1, 0),
196 SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT
, 0, 1, 0),
199 static const struct snd_soc_dapm_widget wm8974_dapm_widgets
[] = {
200 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3
, 2, 0,
201 &wm8974_speaker_mixer_controls
[0],
202 ARRAY_SIZE(wm8974_speaker_mixer_controls
)),
203 SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3
, 3, 0,
204 &wm8974_mono_mixer_controls
[0],
205 ARRAY_SIZE(wm8974_mono_mixer_controls
)),
206 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3
, 0, 0),
207 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2
, 0, 0),
208 SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1
, 6, 0, NULL
, 0),
209 SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3
, 5, 0, NULL
, 0),
210 SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3
, 6, 0, NULL
, 0),
211 SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3
, 7, 0, NULL
, 0),
213 SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2
, 2, 0, wm8974_inpga
,
214 ARRAY_SIZE(wm8974_inpga
)),
215 SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2
, 4, 0,
216 wm8974_boost_mixer
, ARRAY_SIZE(wm8974_boost_mixer
)),
218 SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1
, 4, 0, NULL
, 0),
220 SND_SOC_DAPM_INPUT("MICN"),
221 SND_SOC_DAPM_INPUT("MICP"),
222 SND_SOC_DAPM_INPUT("AUX"),
223 SND_SOC_DAPM_OUTPUT("MONOOUT"),
224 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
225 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
228 static const struct snd_soc_dapm_route wm8974_dapm_routes
[] = {
229 /* Mono output mixer */
230 {"Mono Mixer", "PCM Playback Switch", "DAC"},
231 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
232 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
234 /* Speaker output mixer */
235 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
236 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
237 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
240 {"Mono Out", NULL
, "Mono Mixer"},
241 {"MONOOUT", NULL
, "Mono Out"},
242 {"SpkN Out", NULL
, "Speaker Mixer"},
243 {"SpkP Out", NULL
, "Speaker Mixer"},
244 {"SPKOUTN", NULL
, "SpkN Out"},
245 {"SPKOUTP", NULL
, "SpkP Out"},
248 {"ADC", NULL
, "Boost Mixer"},
249 {"Boost Mixer", "Aux Switch", "Aux Input"},
250 {"Boost Mixer", NULL
, "Input PGA"},
251 {"Boost Mixer", NULL
, "MICP"},
254 {"Input PGA", "Aux Switch", "Aux Input"},
255 {"Input PGA", "MicN Switch", "MICN"},
256 {"Input PGA", "MicP Switch", "MICP"},
259 {"Aux Input", NULL
, "AUX"},
263 unsigned int pre_div
:1;
268 /* The size in bits of the pll divide multiplied by 10
269 * to allow rounding later */
270 #define FIXED_PLL_SIZE ((1 << 24) * 10)
272 static void pll_factors(struct pll_
*pll_div
,
273 unsigned int target
, unsigned int source
)
275 unsigned long long Kpart
;
276 unsigned int K
, Ndiv
, Nmod
;
278 /* There is a fixed divide by 4 in the output path */
281 Ndiv
= target
/ source
;
284 pll_div
->pre_div
= 1;
285 Ndiv
= target
/ source
;
287 pll_div
->pre_div
= 0;
289 if ((Ndiv
< 6) || (Ndiv
> 12))
291 "WM8974 N value %u outwith recommended range!\n",
295 Nmod
= target
% source
;
296 Kpart
= FIXED_PLL_SIZE
* (long long)Nmod
;
298 do_div(Kpart
, source
);
300 K
= Kpart
& 0xFFFFFFFF;
302 /* Check if we need to round */
306 /* Move down to proper range now rounding is done */
312 static int wm8974_set_dai_pll(struct snd_soc_dai
*codec_dai
, int pll_id
,
313 int source
, unsigned int freq_in
, unsigned int freq_out
)
315 struct snd_soc_component
*component
= codec_dai
->component
;
319 if (freq_in
== 0 || freq_out
== 0) {
320 /* Clock CODEC directly from MCLK */
321 reg
= snd_soc_component_read(component
, WM8974_CLOCK
);
322 snd_soc_component_write(component
, WM8974_CLOCK
, reg
& 0x0ff);
325 reg
= snd_soc_component_read(component
, WM8974_POWER1
);
326 snd_soc_component_write(component
, WM8974_POWER1
, reg
& 0x1df);
330 pll_factors(&pll_div
, freq_out
, freq_in
);
332 snd_soc_component_write(component
, WM8974_PLLN
, (pll_div
.pre_div
<< 4) | pll_div
.n
);
333 snd_soc_component_write(component
, WM8974_PLLK1
, pll_div
.k
>> 18);
334 snd_soc_component_write(component
, WM8974_PLLK2
, (pll_div
.k
>> 9) & 0x1ff);
335 snd_soc_component_write(component
, WM8974_PLLK3
, pll_div
.k
& 0x1ff);
336 reg
= snd_soc_component_read(component
, WM8974_POWER1
);
337 snd_soc_component_write(component
, WM8974_POWER1
, reg
| 0x020);
339 /* Run CODEC from PLL instead of MCLK */
340 reg
= snd_soc_component_read(component
, WM8974_CLOCK
);
341 snd_soc_component_write(component
, WM8974_CLOCK
, reg
| 0x100);
347 * Configure WM8974 clock dividers.
349 static int wm8974_set_dai_clkdiv(struct snd_soc_dai
*codec_dai
,
352 struct snd_soc_component
*component
= codec_dai
->component
;
356 case WM8974_OPCLKDIV
:
357 reg
= snd_soc_component_read(component
, WM8974_GPIO
) & 0x1cf;
358 snd_soc_component_write(component
, WM8974_GPIO
, reg
| div
);
361 reg
= snd_soc_component_read(component
, WM8974_CLOCK
) & 0x11f;
362 snd_soc_component_write(component
, WM8974_CLOCK
, reg
| div
);
365 reg
= snd_soc_component_read(component
, WM8974_CLOCK
) & 0x1e3;
366 snd_soc_component_write(component
, WM8974_CLOCK
, reg
| div
);
375 static unsigned int wm8974_get_mclkdiv(unsigned int f_in
, unsigned int f_out
,
378 unsigned int ratio
= 2 * f_in
/ f_out
;
381 *mclkdiv
= WM8974_MCLKDIV_1
;
383 } else if (ratio
== 3) {
384 *mclkdiv
= WM8974_MCLKDIV_1_5
;
385 } else if (ratio
== 4) {
386 *mclkdiv
= WM8974_MCLKDIV_2
;
387 } else if (ratio
<= 6) {
388 *mclkdiv
= WM8974_MCLKDIV_3
;
390 } else if (ratio
<= 8) {
391 *mclkdiv
= WM8974_MCLKDIV_4
;
393 } else if (ratio
<= 12) {
394 *mclkdiv
= WM8974_MCLKDIV_6
;
396 } else if (ratio
<= 16) {
397 *mclkdiv
= WM8974_MCLKDIV_8
;
400 *mclkdiv
= WM8974_MCLKDIV_12
;
404 return f_out
* ratio
/ 2;
407 static int wm8974_update_clocks(struct snd_soc_dai
*dai
)
409 struct snd_soc_component
*component
= dai
->component
;
410 struct wm8974_priv
*priv
= snd_soc_component_get_drvdata(component
);
412 unsigned int fpll
= 0;
416 if (!priv
->mclk
|| !priv
->fs
)
419 fs256
= 256 * priv
->fs
;
421 f
= wm8974_get_mclkdiv(priv
->mclk
, fs256
, &mclkdiv
);
423 if (f
!= priv
->mclk
) {
424 /* The PLL performs best around 90MHz */
425 fpll
= wm8974_get_mclkdiv(22500000, fs256
, &mclkdiv
);
428 wm8974_set_dai_pll(dai
, 0, 0, priv
->mclk
, fpll
);
429 wm8974_set_dai_clkdiv(dai
, WM8974_MCLKDIV
, mclkdiv
);
434 static int wm8974_set_dai_sysclk(struct snd_soc_dai
*dai
, int clk_id
,
435 unsigned int freq
, int dir
)
437 struct snd_soc_component
*component
= dai
->component
;
438 struct wm8974_priv
*priv
= snd_soc_component_get_drvdata(component
);
440 if (dir
!= SND_SOC_CLOCK_IN
)
445 return wm8974_update_clocks(dai
);
448 static int wm8974_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
451 struct snd_soc_component
*component
= codec_dai
->component
;
453 u16 clk
= snd_soc_component_read(component
, WM8974_CLOCK
) & 0x1fe;
455 /* set master/slave audio interface */
456 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
457 case SND_SOC_DAIFMT_CBM_CFM
:
460 case SND_SOC_DAIFMT_CBS_CFS
:
466 /* interface format */
467 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
468 case SND_SOC_DAIFMT_I2S
:
471 case SND_SOC_DAIFMT_RIGHT_J
:
473 case SND_SOC_DAIFMT_LEFT_J
:
476 case SND_SOC_DAIFMT_DSP_A
:
477 if ((fmt
& SND_SOC_DAIFMT_INV_MASK
) == SND_SOC_DAIFMT_IB_IF
||
478 (fmt
& SND_SOC_DAIFMT_INV_MASK
) == SND_SOC_DAIFMT_NB_IF
) {
487 /* clock inversion */
488 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
489 case SND_SOC_DAIFMT_NB_NF
:
491 case SND_SOC_DAIFMT_IB_IF
:
494 case SND_SOC_DAIFMT_IB_NF
:
497 case SND_SOC_DAIFMT_NB_IF
:
504 snd_soc_component_write(component
, WM8974_IFACE
, iface
);
505 snd_soc_component_write(component
, WM8974_CLOCK
, clk
);
509 static int wm8974_pcm_hw_params(struct snd_pcm_substream
*substream
,
510 struct snd_pcm_hw_params
*params
,
511 struct snd_soc_dai
*dai
)
513 struct snd_soc_component
*component
= dai
->component
;
514 struct wm8974_priv
*priv
= snd_soc_component_get_drvdata(component
);
515 u16 iface
= snd_soc_component_read(component
, WM8974_IFACE
) & 0x19f;
516 u16 adn
= snd_soc_component_read(component
, WM8974_ADD
) & 0x1f1;
519 priv
->fs
= params_rate(params
);
520 err
= wm8974_update_clocks(dai
);
525 switch (params_width(params
)) {
539 /* filter coefficient */
540 switch (params_rate(params
)) {
561 snd_soc_component_write(component
, WM8974_IFACE
, iface
);
562 snd_soc_component_write(component
, WM8974_ADD
, adn
);
566 static int wm8974_mute(struct snd_soc_dai
*dai
, int mute
, int direction
)
568 struct snd_soc_component
*component
= dai
->component
;
569 u16 mute_reg
= snd_soc_component_read(component
, WM8974_DAC
) & 0xffbf;
572 snd_soc_component_write(component
, WM8974_DAC
, mute_reg
| 0x40);
574 snd_soc_component_write(component
, WM8974_DAC
, mute_reg
);
578 /* liam need to make this lower power with dapm */
579 static int wm8974_set_bias_level(struct snd_soc_component
*component
,
580 enum snd_soc_bias_level level
)
582 u16 power1
= snd_soc_component_read(component
, WM8974_POWER1
) & ~0x3;
585 case SND_SOC_BIAS_ON
:
586 case SND_SOC_BIAS_PREPARE
:
587 power1
|= 0x1; /* VMID 50k */
588 snd_soc_component_write(component
, WM8974_POWER1
, power1
);
591 case SND_SOC_BIAS_STANDBY
:
592 power1
|= WM8974_POWER1_BIASEN
| WM8974_POWER1_BUFIOEN
;
594 if (snd_soc_component_get_bias_level(component
) == SND_SOC_BIAS_OFF
) {
595 regcache_sync(dev_get_regmap(component
->dev
, NULL
));
597 /* Initial cap charge at VMID 5k */
598 snd_soc_component_write(component
, WM8974_POWER1
, power1
| 0x3);
602 power1
|= 0x2; /* VMID 500k */
603 snd_soc_component_write(component
, WM8974_POWER1
, power1
);
606 case SND_SOC_BIAS_OFF
:
607 snd_soc_component_write(component
, WM8974_POWER1
, 0);
608 snd_soc_component_write(component
, WM8974_POWER2
, 0);
609 snd_soc_component_write(component
, WM8974_POWER3
, 0);
616 #define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
618 #define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
619 SNDRV_PCM_FMTBIT_S24_LE)
621 static const struct snd_soc_dai_ops wm8974_ops
= {
622 .hw_params
= wm8974_pcm_hw_params
,
623 .mute_stream
= wm8974_mute
,
624 .set_fmt
= wm8974_set_dai_fmt
,
625 .set_clkdiv
= wm8974_set_dai_clkdiv
,
626 .set_pll
= wm8974_set_dai_pll
,
627 .set_sysclk
= wm8974_set_dai_sysclk
,
628 .no_capture_mute
= 1,
631 static struct snd_soc_dai_driver wm8974_dai
= {
632 .name
= "wm8974-hifi",
634 .stream_name
= "Playback",
636 .channels_max
= 2, /* Only 1 channel of data */
637 .rates
= WM8974_RATES
,
638 .formats
= WM8974_FORMATS
,},
640 .stream_name
= "Capture",
642 .channels_max
= 2, /* Only 1 channel of data */
643 .rates
= WM8974_RATES
,
644 .formats
= WM8974_FORMATS
,},
646 .symmetric_rates
= 1,
649 static const struct regmap_config wm8974_regmap
= {
653 .max_register
= WM8974_MONOMIX
,
654 .reg_defaults
= wm8974_reg_defaults
,
655 .num_reg_defaults
= ARRAY_SIZE(wm8974_reg_defaults
),
656 .cache_type
= REGCACHE_FLAT
,
659 static int wm8974_probe(struct snd_soc_component
*component
)
663 ret
= wm8974_reset(component
);
665 dev_err(component
->dev
, "Failed to issue reset\n");
672 static const struct snd_soc_component_driver soc_component_dev_wm8974
= {
673 .probe
= wm8974_probe
,
674 .set_bias_level
= wm8974_set_bias_level
,
675 .controls
= wm8974_snd_controls
,
676 .num_controls
= ARRAY_SIZE(wm8974_snd_controls
),
677 .dapm_widgets
= wm8974_dapm_widgets
,
678 .num_dapm_widgets
= ARRAY_SIZE(wm8974_dapm_widgets
),
679 .dapm_routes
= wm8974_dapm_routes
,
680 .num_dapm_routes
= ARRAY_SIZE(wm8974_dapm_routes
),
681 .suspend_bias_off
= 1,
683 .use_pmdown_time
= 1,
685 .non_legacy_dai_naming
= 1,
688 static int wm8974_i2c_probe(struct i2c_client
*i2c
,
689 const struct i2c_device_id
*id
)
691 struct wm8974_priv
*priv
;
692 struct regmap
*regmap
;
695 priv
= devm_kzalloc(&i2c
->dev
, sizeof(*priv
), GFP_KERNEL
);
699 i2c_set_clientdata(i2c
, priv
);
701 regmap
= devm_regmap_init_i2c(i2c
, &wm8974_regmap
);
703 return PTR_ERR(regmap
);
705 ret
= devm_snd_soc_register_component(&i2c
->dev
,
706 &soc_component_dev_wm8974
, &wm8974_dai
, 1);
711 static const struct i2c_device_id wm8974_i2c_id
[] = {
715 MODULE_DEVICE_TABLE(i2c
, wm8974_i2c_id
);
717 static const struct of_device_id wm8974_of_match
[] = {
718 { .compatible
= "wlf,wm8974", },
721 MODULE_DEVICE_TABLE(of
, wm8974_of_match
);
723 static struct i2c_driver wm8974_i2c_driver
= {
726 .of_match_table
= wm8974_of_match
,
728 .probe
= wm8974_i2c_probe
,
729 .id_table
= wm8974_i2c_id
,
732 module_i2c_driver(wm8974_i2c_driver
);
734 MODULE_DESCRIPTION("ASoC WM8974 driver");
735 MODULE_AUTHOR("Liam Girdwood");
736 MODULE_LICENSE("GPL");