WIP FPC-III support
[linux/fpc-iii.git] / sound / soc / sh / siu_pcm.c
blob45c4320976ab9e4f5bdd3383b4792b7db4559777
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // siu_pcm.c - ALSA driver for Renesas SH7343, SH7722 SIU peripheral.
4 //
5 // Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
6 // Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>
8 #include <linux/delay.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/dmaengine.h>
11 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
15 #include <sound/control.h>
16 #include <sound/core.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc.h>
21 #include <asm/siu.h>
23 #include "siu.h"
25 #define DRV_NAME "siu-i2s"
26 #define GET_MAX_PERIODS(buf_bytes, period_bytes) \
27 ((buf_bytes) / (period_bytes))
28 #define PERIOD_OFFSET(buf_addr, period_num, period_bytes) \
29 ((buf_addr) + ((period_num) * (period_bytes)))
31 #define RWF_STM_RD 0x01 /* Read in progress */
32 #define RWF_STM_WT 0x02 /* Write in progress */
34 struct siu_port *siu_ports[SIU_PORT_NUM];
36 /* transfersize is number of u32 dma transfers per period */
37 static int siu_pcm_stmwrite_stop(struct siu_port *port_info)
39 struct siu_info *info = siu_i2s_data;
40 u32 __iomem *base = info->reg;
41 struct siu_stream *siu_stream = &port_info->playback;
42 u32 stfifo;
44 if (!siu_stream->rw_flg)
45 return -EPERM;
47 /* output FIFO disable */
48 stfifo = siu_read32(base + SIU_STFIFO);
49 siu_write32(base + SIU_STFIFO, stfifo & ~0x0c180c18);
50 pr_debug("%s: STFIFO %x -> %x\n", __func__,
51 stfifo, stfifo & ~0x0c180c18);
53 /* during stmwrite clear */
54 siu_stream->rw_flg = 0;
56 return 0;
59 static int siu_pcm_stmwrite_start(struct siu_port *port_info)
61 struct siu_stream *siu_stream = &port_info->playback;
63 if (siu_stream->rw_flg)
64 return -EPERM;
66 /* Current period in buffer */
67 port_info->playback.cur_period = 0;
69 /* during stmwrite flag set */
70 siu_stream->rw_flg = RWF_STM_WT;
72 /* DMA transfer start */
73 queue_work(system_highpri_wq, &siu_stream->work);
75 return 0;
78 static void siu_dma_tx_complete(void *arg)
80 struct siu_stream *siu_stream = arg;
82 if (!siu_stream->rw_flg)
83 return;
85 /* Update completed period count */
86 if (++siu_stream->cur_period >=
87 GET_MAX_PERIODS(siu_stream->buf_bytes,
88 siu_stream->period_bytes))
89 siu_stream->cur_period = 0;
91 pr_debug("%s: done period #%d (%u/%u bytes), cookie %d\n",
92 __func__, siu_stream->cur_period,
93 siu_stream->cur_period * siu_stream->period_bytes,
94 siu_stream->buf_bytes, siu_stream->cookie);
96 queue_work(system_highpri_wq, &siu_stream->work);
98 /* Notify alsa: a period is done */
99 snd_pcm_period_elapsed(siu_stream->substream);
102 static int siu_pcm_wr_set(struct siu_port *port_info,
103 dma_addr_t buff, u32 size)
105 struct siu_info *info = siu_i2s_data;
106 u32 __iomem *base = info->reg;
107 struct siu_stream *siu_stream = &port_info->playback;
108 struct snd_pcm_substream *substream = siu_stream->substream;
109 struct device *dev = substream->pcm->card->dev;
110 struct dma_async_tx_descriptor *desc;
111 dma_cookie_t cookie;
112 struct scatterlist sg;
113 u32 stfifo;
115 sg_init_table(&sg, 1);
116 sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
117 size, offset_in_page(buff));
118 sg_dma_len(&sg) = size;
119 sg_dma_address(&sg) = buff;
121 desc = dmaengine_prep_slave_sg(siu_stream->chan,
122 &sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
123 if (!desc) {
124 dev_err(dev, "Failed to allocate a dma descriptor\n");
125 return -ENOMEM;
128 desc->callback = siu_dma_tx_complete;
129 desc->callback_param = siu_stream;
130 cookie = dmaengine_submit(desc);
131 if (cookie < 0) {
132 dev_err(dev, "Failed to submit a dma transfer\n");
133 return cookie;
136 siu_stream->tx_desc = desc;
137 siu_stream->cookie = cookie;
139 dma_async_issue_pending(siu_stream->chan);
141 /* only output FIFO enable */
142 stfifo = siu_read32(base + SIU_STFIFO);
143 siu_write32(base + SIU_STFIFO, stfifo | (port_info->stfifo & 0x0c180c18));
144 dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
145 stfifo, stfifo | (port_info->stfifo & 0x0c180c18));
147 return 0;
150 static int siu_pcm_rd_set(struct siu_port *port_info,
151 dma_addr_t buff, size_t size)
153 struct siu_info *info = siu_i2s_data;
154 u32 __iomem *base = info->reg;
155 struct siu_stream *siu_stream = &port_info->capture;
156 struct snd_pcm_substream *substream = siu_stream->substream;
157 struct device *dev = substream->pcm->card->dev;
158 struct dma_async_tx_descriptor *desc;
159 dma_cookie_t cookie;
160 struct scatterlist sg;
161 u32 stfifo;
163 dev_dbg(dev, "%s: %u@%llx\n", __func__, size, (unsigned long long)buff);
165 sg_init_table(&sg, 1);
166 sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
167 size, offset_in_page(buff));
168 sg_dma_len(&sg) = size;
169 sg_dma_address(&sg) = buff;
171 desc = dmaengine_prep_slave_sg(siu_stream->chan,
172 &sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
173 if (!desc) {
174 dev_err(dev, "Failed to allocate dma descriptor\n");
175 return -ENOMEM;
178 desc->callback = siu_dma_tx_complete;
179 desc->callback_param = siu_stream;
180 cookie = dmaengine_submit(desc);
181 if (cookie < 0) {
182 dev_err(dev, "Failed to submit dma descriptor\n");
183 return cookie;
186 siu_stream->tx_desc = desc;
187 siu_stream->cookie = cookie;
189 dma_async_issue_pending(siu_stream->chan);
191 /* only input FIFO enable */
192 stfifo = siu_read32(base + SIU_STFIFO);
193 siu_write32(base + SIU_STFIFO, siu_read32(base + SIU_STFIFO) |
194 (port_info->stfifo & 0x13071307));
195 dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
196 stfifo, stfifo | (port_info->stfifo & 0x13071307));
198 return 0;
201 static void siu_io_work(struct work_struct *work)
203 struct siu_stream *siu_stream = container_of(work, struct siu_stream,
204 work);
205 struct snd_pcm_substream *substream = siu_stream->substream;
206 struct device *dev = substream->pcm->card->dev;
207 struct snd_pcm_runtime *rt = substream->runtime;
208 struct siu_port *port_info = siu_port_info(substream);
210 dev_dbg(dev, "%s: flags %x\n", __func__, siu_stream->rw_flg);
212 if (!siu_stream->rw_flg) {
213 dev_dbg(dev, "%s: stream inactive\n", __func__);
214 return;
217 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
218 dma_addr_t buff;
219 size_t count;
220 u8 *virt;
222 buff = (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
223 siu_stream->cur_period,
224 siu_stream->period_bytes);
225 virt = PERIOD_OFFSET(rt->dma_area,
226 siu_stream->cur_period,
227 siu_stream->period_bytes);
228 count = siu_stream->period_bytes;
230 /* DMA transfer start */
231 siu_pcm_rd_set(port_info, buff, count);
232 } else {
233 siu_pcm_wr_set(port_info,
234 (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
235 siu_stream->cur_period,
236 siu_stream->period_bytes),
237 siu_stream->period_bytes);
241 /* Capture */
242 static int siu_pcm_stmread_start(struct siu_port *port_info)
244 struct siu_stream *siu_stream = &port_info->capture;
246 if (siu_stream->xfer_cnt > 0x1000000)
247 return -EINVAL;
248 if (siu_stream->rw_flg)
249 return -EPERM;
251 /* Current period in buffer */
252 siu_stream->cur_period = 0;
254 /* during stmread flag set */
255 siu_stream->rw_flg = RWF_STM_RD;
257 queue_work(system_highpri_wq, &siu_stream->work);
259 return 0;
262 static int siu_pcm_stmread_stop(struct siu_port *port_info)
264 struct siu_info *info = siu_i2s_data;
265 u32 __iomem *base = info->reg;
266 struct siu_stream *siu_stream = &port_info->capture;
267 struct device *dev = siu_stream->substream->pcm->card->dev;
268 u32 stfifo;
270 if (!siu_stream->rw_flg)
271 return -EPERM;
273 /* input FIFO disable */
274 stfifo = siu_read32(base + SIU_STFIFO);
275 siu_write32(base + SIU_STFIFO, stfifo & ~0x13071307);
276 dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
277 stfifo, stfifo & ~0x13071307);
279 /* during stmread flag clear */
280 siu_stream->rw_flg = 0;
282 return 0;
285 static bool filter(struct dma_chan *chan, void *secondary)
287 struct sh_dmae_slave *param = secondary;
289 pr_debug("%s: secondary ID %d\n", __func__, param->shdma_slave.slave_id);
291 chan->private = &param->shdma_slave;
292 return true;
295 static int siu_pcm_open(struct snd_soc_component *component,
296 struct snd_pcm_substream *ss)
298 /* Playback / Capture */
299 struct siu_platform *pdata = component->dev->platform_data;
300 struct siu_info *info = siu_i2s_data;
301 struct siu_port *port_info = siu_port_info(ss);
302 struct siu_stream *siu_stream;
303 u32 port = info->port_id;
304 struct device *dev = ss->pcm->card->dev;
305 dma_cap_mask_t mask;
306 struct sh_dmae_slave *param;
308 dma_cap_zero(mask);
309 dma_cap_set(DMA_SLAVE, mask);
311 dev_dbg(dev, "%s, port=%d@%p\n", __func__, port, port_info);
313 if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK) {
314 siu_stream = &port_info->playback;
315 param = &siu_stream->param;
316 param->shdma_slave.slave_id = port ? pdata->dma_slave_tx_b :
317 pdata->dma_slave_tx_a;
318 } else {
319 siu_stream = &port_info->capture;
320 param = &siu_stream->param;
321 param->shdma_slave.slave_id = port ? pdata->dma_slave_rx_b :
322 pdata->dma_slave_rx_a;
325 /* Get DMA channel */
326 siu_stream->chan = dma_request_channel(mask, filter, param);
327 if (!siu_stream->chan) {
328 dev_err(dev, "DMA channel allocation failed!\n");
329 return -EBUSY;
332 siu_stream->substream = ss;
334 return 0;
337 static int siu_pcm_close(struct snd_soc_component *component,
338 struct snd_pcm_substream *ss)
340 struct siu_info *info = siu_i2s_data;
341 struct device *dev = ss->pcm->card->dev;
342 struct siu_port *port_info = siu_port_info(ss);
343 struct siu_stream *siu_stream;
345 dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
347 if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
348 siu_stream = &port_info->playback;
349 else
350 siu_stream = &port_info->capture;
352 dma_release_channel(siu_stream->chan);
353 siu_stream->chan = NULL;
355 siu_stream->substream = NULL;
357 return 0;
360 static int siu_pcm_prepare(struct snd_soc_component *component,
361 struct snd_pcm_substream *ss)
363 struct siu_info *info = siu_i2s_data;
364 struct siu_port *port_info = siu_port_info(ss);
365 struct device *dev = ss->pcm->card->dev;
366 struct snd_pcm_runtime *rt = ss->runtime;
367 struct siu_stream *siu_stream;
368 snd_pcm_sframes_t xfer_cnt;
370 if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
371 siu_stream = &port_info->playback;
372 else
373 siu_stream = &port_info->capture;
375 rt = siu_stream->substream->runtime;
377 siu_stream->buf_bytes = snd_pcm_lib_buffer_bytes(ss);
378 siu_stream->period_bytes = snd_pcm_lib_period_bytes(ss);
380 dev_dbg(dev, "%s: port=%d, %d channels, period=%u bytes\n", __func__,
381 info->port_id, rt->channels, siu_stream->period_bytes);
383 /* We only support buffers that are multiples of the period */
384 if (siu_stream->buf_bytes % siu_stream->period_bytes) {
385 dev_err(dev, "%s() - buffer=%d not multiple of period=%d\n",
386 __func__, siu_stream->buf_bytes,
387 siu_stream->period_bytes);
388 return -EINVAL;
391 xfer_cnt = bytes_to_frames(rt, siu_stream->period_bytes);
392 if (!xfer_cnt || xfer_cnt > 0x1000000)
393 return -EINVAL;
395 siu_stream->format = rt->format;
396 siu_stream->xfer_cnt = xfer_cnt;
398 dev_dbg(dev, "port=%d buf=%lx buf_bytes=%d period_bytes=%d "
399 "format=%d channels=%d xfer_cnt=%d\n", info->port_id,
400 (unsigned long)rt->dma_addr, siu_stream->buf_bytes,
401 siu_stream->period_bytes,
402 siu_stream->format, rt->channels, (int)xfer_cnt);
404 return 0;
407 static int siu_pcm_trigger(struct snd_soc_component *component,
408 struct snd_pcm_substream *ss, int cmd)
410 struct siu_info *info = siu_i2s_data;
411 struct device *dev = ss->pcm->card->dev;
412 struct siu_port *port_info = siu_port_info(ss);
413 int ret;
415 dev_dbg(dev, "%s: port=%d@%p, cmd=%d\n", __func__,
416 info->port_id, port_info, cmd);
418 switch (cmd) {
419 case SNDRV_PCM_TRIGGER_START:
420 if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
421 ret = siu_pcm_stmwrite_start(port_info);
422 else
423 ret = siu_pcm_stmread_start(port_info);
425 if (ret < 0)
426 dev_warn(dev, "%s: start failed on port=%d\n",
427 __func__, info->port_id);
429 break;
430 case SNDRV_PCM_TRIGGER_STOP:
431 if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
432 siu_pcm_stmwrite_stop(port_info);
433 else
434 siu_pcm_stmread_stop(port_info);
435 ret = 0;
437 break;
438 default:
439 dev_err(dev, "%s() unsupported cmd=%d\n", __func__, cmd);
440 ret = -EINVAL;
443 return ret;
447 * So far only resolution of one period is supported, subject to extending the
448 * dmangine API
450 static snd_pcm_uframes_t
451 siu_pcm_pointer_dma(struct snd_soc_component *component,
452 struct snd_pcm_substream *ss)
454 struct device *dev = ss->pcm->card->dev;
455 struct siu_info *info = siu_i2s_data;
456 u32 __iomem *base = info->reg;
457 struct siu_port *port_info = siu_port_info(ss);
458 struct snd_pcm_runtime *rt = ss->runtime;
459 size_t ptr;
460 struct siu_stream *siu_stream;
462 if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
463 siu_stream = &port_info->playback;
464 else
465 siu_stream = &port_info->capture;
468 * ptr is the offset into the buffer where the dma is currently at. We
469 * check if the dma buffer has just wrapped.
471 ptr = PERIOD_OFFSET(rt->dma_addr,
472 siu_stream->cur_period,
473 siu_stream->period_bytes) - rt->dma_addr;
475 dev_dbg(dev,
476 "%s: port=%d, events %x, FSTS %x, xferred %u/%u, cookie %d\n",
477 __func__, info->port_id, siu_read32(base + SIU_EVNTC),
478 siu_read32(base + SIU_SBFSTS), ptr, siu_stream->buf_bytes,
479 siu_stream->cookie);
481 if (ptr >= siu_stream->buf_bytes)
482 ptr = 0;
484 return bytes_to_frames(ss->runtime, ptr);
487 static int siu_pcm_new(struct snd_soc_component *component,
488 struct snd_soc_pcm_runtime *rtd)
490 /* card->dev == socdev->dev, see snd_soc_new_pcms() */
491 struct snd_card *card = rtd->card->snd_card;
492 struct snd_pcm *pcm = rtd->pcm;
493 struct siu_info *info = siu_i2s_data;
494 struct platform_device *pdev = to_platform_device(card->dev);
495 int ret;
496 int i;
498 /* pdev->id selects between SIUA and SIUB */
499 if (pdev->id < 0 || pdev->id >= SIU_PORT_NUM)
500 return -EINVAL;
502 info->port_id = pdev->id;
505 * While the siu has 2 ports, only one port can be on at a time (only 1
506 * SPB). So far all the boards using the siu had only one of the ports
507 * wired to a codec. To simplify things, we only register one port with
508 * alsa. In case both ports are needed, it should be changed here
510 for (i = pdev->id; i < pdev->id + 1; i++) {
511 struct siu_port **port_info = &siu_ports[i];
513 ret = siu_init_port(i, port_info, card);
514 if (ret < 0)
515 return ret;
517 snd_pcm_set_managed_buffer_all(pcm,
518 SNDRV_DMA_TYPE_DEV, card->dev,
519 SIU_BUFFER_BYTES_MAX, SIU_BUFFER_BYTES_MAX);
521 (*port_info)->pcm = pcm;
523 /* IO works */
524 INIT_WORK(&(*port_info)->playback.work, siu_io_work);
525 INIT_WORK(&(*port_info)->capture.work, siu_io_work);
528 dev_info(card->dev, "SuperH SIU driver initialized.\n");
529 return 0;
532 static void siu_pcm_free(struct snd_soc_component *component,
533 struct snd_pcm *pcm)
535 struct platform_device *pdev = to_platform_device(pcm->card->dev);
536 struct siu_port *port_info = siu_ports[pdev->id];
538 cancel_work_sync(&port_info->capture.work);
539 cancel_work_sync(&port_info->playback.work);
541 siu_free_port(port_info);
543 dev_dbg(pcm->card->dev, "%s\n", __func__);
546 struct const snd_soc_component_driver siu_component = {
547 .name = DRV_NAME,
548 .open = siu_pcm_open,
549 .close = siu_pcm_close,
550 .prepare = siu_pcm_prepare,
551 .trigger = siu_pcm_trigger,
552 .pointer = siu_pcm_pointer_dma,
553 .pcm_construct = siu_pcm_new,
554 .pcm_destruct = siu_pcm_free,
556 EXPORT_SYMBOL_GPL(siu_component);