drivers/rtc/rtc-sun6i.c

   1 /*
   2  * An RTC driver for Allwinner A31/A23
   3  *
   4  * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
   5  *
   6  * based on rtc-sunxi.c
   7  *
   8  * An RTC driver for Allwinner A10/A20
   9  *
  10  * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful, but WITHOUT
  18  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  20  * more details.
  21  */
  22
  23 #include <linux/clk.h>
  24 #include <linux/clk-provider.h>
  25 #include <linux/delay.h>
  26 #include <linux/err.h>
  27 #include <linux/fs.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/io.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/of.h>
  34 #include <linux/of_address.h>
  35 #include <linux/of_device.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/rtc.h>
  38 #include <linux/slab.h>
  39 #include <linux/types.h>
  40
  41 /* Control register */
  42 #define SUN6I_LOSC_CTRL                         0x0000
  43 #define SUN6I_LOSC_CTRL_KEY                     (0x16aa << 16)
  44 #define SUN6I_LOSC_CTRL_ALM_DHMS_ACC            BIT(9)
  45 #define SUN6I_LOSC_CTRL_RTC_HMS_ACC             BIT(8)
  46 #define SUN6I_LOSC_CTRL_RTC_YMD_ACC             BIT(7)
  47 #define SUN6I_LOSC_CTRL_EXT_OSC                 BIT(0)
  48 #define SUN6I_LOSC_CTRL_ACC_MASK                GENMASK(9, 7)
  49
  50 #define SUN6I_LOSC_CLK_PRESCAL                  0x0008
  51
  52 /* RTC */
  53 #define SUN6I_RTC_YMD                           0x0010
  54 #define SUN6I_RTC_HMS                           0x0014
  55
  56 /* Alarm 0 (counter) */
  57 #define SUN6I_ALRM_COUNTER                      0x0020
  58 #define SUN6I_ALRM_CUR_VAL                      0x0024
  59 #define SUN6I_ALRM_EN                           0x0028
  60 #define SUN6I_ALRM_EN_CNT_EN                    BIT(0)
  61 #define SUN6I_ALRM_IRQ_EN                       0x002c
  62 #define SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN            BIT(0)
  63 #define SUN6I_ALRM_IRQ_STA                      0x0030
  64 #define SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND         BIT(0)
  65
  66 /* Alarm 1 (wall clock) */
  67 #define SUN6I_ALRM1_EN                          0x0044
  68 #define SUN6I_ALRM1_IRQ_EN                      0x0048
  69 #define SUN6I_ALRM1_IRQ_STA                     0x004c
  70 #define SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND       BIT(0)
  71
  72 /* Alarm config */
  73 #define SUN6I_ALARM_CONFIG                      0x0050
  74 #define SUN6I_ALARM_CONFIG_WAKEUP               BIT(0)
  75
  76 #define SUN6I_LOSC_OUT_GATING                   0x0060
  77 #define SUN6I_LOSC_OUT_GATING_EN_OFFSET         0
  78
  79 /*
  80  * Get date values
  81  */
  82 #define SUN6I_DATE_GET_DAY_VALUE(x)             ((x)  & 0x0000001f)
  83 #define SUN6I_DATE_GET_MON_VALUE(x)             (((x) & 0x00000f00) >> 8)
  84 #define SUN6I_DATE_GET_YEAR_VALUE(x)            (((x) & 0x003f0000) >> 16)
  85 #define SUN6I_LEAP_GET_VALUE(x)                 (((x) & 0x00400000) >> 22)
  86
  87 /*
  88  * Get time values
  89  */
  90 #define SUN6I_TIME_GET_SEC_VALUE(x)             ((x)  & 0x0000003f)
  91 #define SUN6I_TIME_GET_MIN_VALUE(x)             (((x) & 0x00003f00) >> 8)
  92 #define SUN6I_TIME_GET_HOUR_VALUE(x)            (((x) & 0x001f0000) >> 16)
  93
  94 /*
  95  * Set date values
  96  */
  97 #define SUN6I_DATE_SET_DAY_VALUE(x)             ((x)       & 0x0000001f)
  98 #define SUN6I_DATE_SET_MON_VALUE(x)             ((x) <<  8 & 0x00000f00)
  99 #define SUN6I_DATE_SET_YEAR_VALUE(x)            ((x) << 16 & 0x003f0000)
 100 #define SUN6I_LEAP_SET_VALUE(x)                 ((x) << 22 & 0x00400000)
 101
 102 /*
 103  * Set time values
 104  */
 105 #define SUN6I_TIME_SET_SEC_VALUE(x)             ((x)       & 0x0000003f)
 106 #define SUN6I_TIME_SET_MIN_VALUE(x)             ((x) <<  8 & 0x00003f00)
 107 #define SUN6I_TIME_SET_HOUR_VALUE(x)            ((x) << 16 & 0x001f0000)
 108
 109 /*
 110  * The year parameter passed to the driver is usually an offset relative to
 111  * the year 1900. This macro is used to convert this offset to another one
 112  * relative to the minimum year allowed by the hardware.
 113  *
 114  * The year range is 1970 - 2033. This range is selected to match Allwinner's
 115  * driver, even though it is somewhat limited.
 116  */
 117 #define SUN6I_YEAR_MIN                          1970
 118 #define SUN6I_YEAR_MAX                          2033
 119 #define SUN6I_YEAR_OFF                          (SUN6I_YEAR_MIN - 1900)
 120
 121 struct sun6i_rtc_dev {
 122         struct rtc_device *rtc;
 123         struct device *dev;
 124         void __iomem *base;
 125         int irq;
 126         unsigned long alarm;
 127
 128         struct clk_hw hw;
 129         struct clk_hw *int_osc;
 130         struct clk *losc;
 131         struct clk *ext_losc;
 132
 133         spinlock_t lock;
 134 };
 135
 136 static struct sun6i_rtc_dev *sun6i_rtc;
 137
 138 static unsigned long sun6i_rtc_osc_recalc_rate(struct clk_hw *hw,
 139                                                unsigned long parent_rate)
 140 {
 141         struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
 142         u32 val;
 143
 144         val = readl(rtc->base + SUN6I_LOSC_CTRL);
 145         if (val & SUN6I_LOSC_CTRL_EXT_OSC)
 146                 return parent_rate;
 147
 148         val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
 149         val &= GENMASK(4, 0);
 150
 151         return parent_rate / (val + 1);
 152 }
 153
 154 static u8 sun6i_rtc_osc_get_parent(struct clk_hw *hw)
 155 {
 156         struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
 157
 158         return readl(rtc->base + SUN6I_LOSC_CTRL) & SUN6I_LOSC_CTRL_EXT_OSC;
 159 }
 160
 161 static int sun6i_rtc_osc_set_parent(struct clk_hw *hw, u8 index)
 162 {
 163         struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
 164         unsigned long flags;
 165         u32 val;
 166
 167         if (index > 1)
 168                 return -EINVAL;
 169
 170         spin_lock_irqsave(&rtc->lock, flags);
 171         val = readl(rtc->base + SUN6I_LOSC_CTRL);
 172         val &= ~SUN6I_LOSC_CTRL_EXT_OSC;
 173         val |= SUN6I_LOSC_CTRL_KEY;
 174         val |= index ? SUN6I_LOSC_CTRL_EXT_OSC : 0;
 175         writel(val, rtc->base + SUN6I_LOSC_CTRL);
 176         spin_unlock_irqrestore(&rtc->lock, flags);
 177
 178         return 0;
 179 }
 180
 181 static const struct clk_ops sun6i_rtc_osc_ops = {
 182         .recalc_rate    = sun6i_rtc_osc_recalc_rate,
 183
 184         .get_parent     = sun6i_rtc_osc_get_parent,
 185         .set_parent     = sun6i_rtc_osc_set_parent,
 186 };
 187
 188 static void __init sun6i_rtc_clk_init(struct device_node *node)
 189 {
 190         struct clk_hw_onecell_data *clk_data;
 191         struct sun6i_rtc_dev *rtc;
 192         struct clk_init_data init = {
 193                 .ops            = &sun6i_rtc_osc_ops,
 194         };
 195         const char *clkout_name = "osc32k-out";
 196         const char *parents[2];
 197
 198         rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
 199         if (!rtc)
 200                 return;
 201
 202         clk_data = kzalloc(struct_size(clk_data, hws, 2), GFP_KERNEL);
 203         if (!clk_data) {
 204                 kfree(rtc);
 205                 return;
 206         }
 207
 208         spin_lock_init(&rtc->lock);
 209
 210         rtc->base = of_io_request_and_map(node, 0, of_node_full_name(node));
 211         if (IS_ERR(rtc->base)) {
 212                 pr_crit("Can't map RTC registers");
 213                 goto err;
 214         }
 215
 216         /* Switch to the external, more precise, oscillator */
 217         writel(SUN6I_LOSC_CTRL_KEY | SUN6I_LOSC_CTRL_EXT_OSC,
 218                rtc->base + SUN6I_LOSC_CTRL);
 219
 220         /* Yes, I know, this is ugly. */
 221         sun6i_rtc = rtc;
 222
 223         /* Deal with old DTs */
 224         if (!of_get_property(node, "clocks", NULL))
 225                 goto err;
 226
 227         rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL,
 228                                                                 "rtc-int-osc",
 229                                                                 NULL, 0,
 230                                                                 667000,
 231                                                                 300000000);
 232         if (IS_ERR(rtc->int_osc)) {
 233                 pr_crit("Couldn't register the internal oscillator\n");
 234                 return;
 235         }
 236
 237         parents[0] = clk_hw_get_name(rtc->int_osc);
 238         parents[1] = of_clk_get_parent_name(node, 0);
 239
 240         rtc->hw.init = &init;
 241
 242         init.parent_names = parents;
 243         init.num_parents = of_clk_get_parent_count(node) + 1;
 244         of_property_read_string_index(node, "clock-output-names", 0,
 245                                       &init.name);
 246
 247         rtc->losc = clk_register(NULL, &rtc->hw);
 248         if (IS_ERR(rtc->losc)) {
 249                 pr_crit("Couldn't register the LOSC clock\n");
 250                 return;
 251         }
 252
 253         of_property_read_string_index(node, "clock-output-names", 1,
 254                                       &clkout_name);
 255         rtc->ext_losc = clk_register_gate(NULL, clkout_name, rtc->hw.init->name,
 256                                           0, rtc->base + SUN6I_LOSC_OUT_GATING,
 257                                           SUN6I_LOSC_OUT_GATING_EN_OFFSET, 0,
 258                                           &rtc->lock);
 259         if (IS_ERR(rtc->ext_losc)) {
 260                 pr_crit("Couldn't register the LOSC external gate\n");
 261                 return;
 262         }
 263
 264         clk_data->num = 2;
 265         clk_data->hws[0] = &rtc->hw;
 266         clk_data->hws[1] = __clk_get_hw(rtc->ext_losc);
 267         of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
 268         return;
 269
 270 err:
 271         kfree(clk_data);
 272 }
 273 CLK_OF_DECLARE_DRIVER(sun6i_rtc_clk, "allwinner,sun6i-a31-rtc",
 274                       sun6i_rtc_clk_init);
 275
 276 static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
 277 {
 278         struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
 279         irqreturn_t ret = IRQ_NONE;
 280         u32 val;
 281
 282         spin_lock(&chip->lock);
 283         val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
 284
 285         if (val & SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND) {
 286                 val |= SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND;
 287                 writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
 288
 289                 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
 290
 291                 ret = IRQ_HANDLED;
 292         }
 293         spin_unlock(&chip->lock);
 294
 295         return ret;
 296 }
 297
 298 static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip)
 299 {
 300         u32 alrm_val = 0;
 301         u32 alrm_irq_val = 0;
 302         u32 alrm_wake_val = 0;
 303         unsigned long flags;
 304
 305         if (to) {
 306                 alrm_val = SUN6I_ALRM_EN_CNT_EN;
 307                 alrm_irq_val = SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN;
 308                 alrm_wake_val = SUN6I_ALARM_CONFIG_WAKEUP;
 309         } else {
 310                 writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
 311                        chip->base + SUN6I_ALRM_IRQ_STA);
 312         }
 313
 314         spin_lock_irqsave(&chip->lock, flags);
 315         writel(alrm_val, chip->base + SUN6I_ALRM_EN);
 316         writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
 317         writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
 318         spin_unlock_irqrestore(&chip->lock, flags);
 319 }
 320
 321 static int sun6i_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
 322 {
 323         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 324         u32 date, time;
 325
 326         /*
 327          * read again in case it changes
 328          */
 329         do {
 330                 date = readl(chip->base + SUN6I_RTC_YMD);
 331                 time = readl(chip->base + SUN6I_RTC_HMS);
 332         } while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
 333                  (time != readl(chip->base + SUN6I_RTC_HMS)));
 334
 335         rtc_tm->tm_sec  = SUN6I_TIME_GET_SEC_VALUE(time);
 336         rtc_tm->tm_min  = SUN6I_TIME_GET_MIN_VALUE(time);
 337         rtc_tm->tm_hour = SUN6I_TIME_GET_HOUR_VALUE(time);
 338
 339         rtc_tm->tm_mday = SUN6I_DATE_GET_DAY_VALUE(date);
 340         rtc_tm->tm_mon  = SUN6I_DATE_GET_MON_VALUE(date);
 341         rtc_tm->tm_year = SUN6I_DATE_GET_YEAR_VALUE(date);
 342
 343         rtc_tm->tm_mon  -= 1;
 344
 345         /*
 346          * switch from (data_year->min)-relative offset to
 347          * a (1900)-relative one
 348          */
 349         rtc_tm->tm_year += SUN6I_YEAR_OFF;
 350
 351         return 0;
 352 }
 353
 354 static int sun6i_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 355 {
 356         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 357         unsigned long flags;
 358         u32 alrm_st;
 359         u32 alrm_en;
 360
 361         spin_lock_irqsave(&chip->lock, flags);
 362         alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
 363         alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
 364         spin_unlock_irqrestore(&chip->lock, flags);
 365
 366         wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
 367         wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
 368         rtc_time_to_tm(chip->alarm, &wkalrm->time);
 369
 370         return 0;
 371 }
 372
 373 static int sun6i_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 374 {
 375         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 376         struct rtc_time *alrm_tm = &wkalrm->time;
 377         struct rtc_time tm_now;
 378         unsigned long time_now = 0;
 379         unsigned long time_set = 0;
 380         unsigned long time_gap = 0;
 381         int ret = 0;
 382
 383         ret = sun6i_rtc_gettime(dev, &tm_now);
 384         if (ret < 0) {
 385                 dev_err(dev, "Error in getting time\n");
 386                 return -EINVAL;
 387         }
 388
 389         rtc_tm_to_time(alrm_tm, &time_set);
 390         rtc_tm_to_time(&tm_now, &time_now);
 391         if (time_set <= time_now) {
 392                 dev_err(dev, "Date to set in the past\n");
 393                 return -EINVAL;
 394         }
 395
 396         time_gap = time_set - time_now;
 397
 398         if (time_gap > U32_MAX) {
 399                 dev_err(dev, "Date too far in the future\n");
 400                 return -EINVAL;
 401         }
 402
 403         sun6i_rtc_setaie(0, chip);
 404         writel(0, chip->base + SUN6I_ALRM_COUNTER);
 405         usleep_range(100, 300);
 406
 407         writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
 408         chip->alarm = time_set;
 409
 410         sun6i_rtc_setaie(wkalrm->enabled, chip);
 411
 412         return 0;
 413 }
 414
 415 static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset,
 416                           unsigned int mask, unsigned int ms_timeout)
 417 {
 418         const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
 419         u32 reg;
 420
 421         do {
 422                 reg = readl(chip->base + offset);
 423                 reg &= mask;
 424
 425                 if (!reg)
 426                         return 0;
 427
 428         } while (time_before(jiffies, timeout));
 429
 430         return -ETIMEDOUT;
 431 }
 432
 433 static int sun6i_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
 434 {
 435         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 436         u32 date = 0;
 437         u32 time = 0;
 438         int year;
 439
 440         year = rtc_tm->tm_year + 1900;
 441         if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
 442                 dev_err(dev, "rtc only supports year in range %d - %d\n",
 443                         SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
 444                 return -EINVAL;
 445         }
 446
 447         rtc_tm->tm_year -= SUN6I_YEAR_OFF;
 448         rtc_tm->tm_mon += 1;
 449
 450         date = SUN6I_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
 451                 SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon)  |
 452                 SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
 453
 454         if (is_leap_year(year))
 455                 date |= SUN6I_LEAP_SET_VALUE(1);
 456
 457         time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec)  |
 458                 SUN6I_TIME_SET_MIN_VALUE(rtc_tm->tm_min)  |
 459                 SUN6I_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
 460
 461         /* Check whether registers are writable */
 462         if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
 463                            SUN6I_LOSC_CTRL_ACC_MASK, 50)) {
 464                 dev_err(dev, "rtc is still busy.\n");
 465                 return -EBUSY;
 466         }
 467
 468         writel(time, chip->base + SUN6I_RTC_HMS);
 469
 470         /*
 471          * After writing the RTC HH-MM-SS register, the
 472          * SUN6I_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
 473          * be cleared until the real writing operation is finished
 474          */
 475
 476         if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
 477                            SUN6I_LOSC_CTRL_RTC_HMS_ACC, 50)) {
 478                 dev_err(dev, "Failed to set rtc time.\n");
 479                 return -ETIMEDOUT;
 480         }
 481
 482         writel(date, chip->base + SUN6I_RTC_YMD);
 483
 484         /*
 485          * After writing the RTC YY-MM-DD register, the
 486          * SUN6I_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
 487          * be cleared until the real writing operation is finished
 488          */
 489
 490         if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
 491                            SUN6I_LOSC_CTRL_RTC_YMD_ACC, 50)) {
 492                 dev_err(dev, "Failed to set rtc time.\n");
 493                 return -ETIMEDOUT;
 494         }
 495
 496         return 0;
 497 }
 498
 499 static int sun6i_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 500 {
 501         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 502
 503         if (!enabled)
 504                 sun6i_rtc_setaie(enabled, chip);
 505
 506         return 0;
 507 }
 508
 509 static const struct rtc_class_ops sun6i_rtc_ops = {
 510         .read_time              = sun6i_rtc_gettime,
 511         .set_time               = sun6i_rtc_settime,
 512         .read_alarm             = sun6i_rtc_getalarm,
 513         .set_alarm              = sun6i_rtc_setalarm,
 514         .alarm_irq_enable       = sun6i_rtc_alarm_irq_enable
 515 };
 516
 517 static int sun6i_rtc_probe(struct platform_device *pdev)
 518 {
 519         struct sun6i_rtc_dev *chip = sun6i_rtc;
 520         int ret;
 521
 522         if (!chip)
 523                 return -ENODEV;
 524
 525         platform_set_drvdata(pdev, chip);
 526         chip->dev = &pdev->dev;
 527
 528         chip->irq = platform_get_irq(pdev, 0);
 529         if (chip->irq < 0) {
 530                 dev_err(&pdev->dev, "No IRQ resource\n");
 531                 return chip->irq;
 532         }
 533
 534         ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
 535                                0, dev_name(&pdev->dev), chip);
 536         if (ret) {
 537                 dev_err(&pdev->dev, "Could not request IRQ\n");
 538                 return ret;
 539         }
 540
 541         /* clear the alarm counter value */
 542         writel(0, chip->base + SUN6I_ALRM_COUNTER);
 543
 544         /* disable counter alarm */
 545         writel(0, chip->base + SUN6I_ALRM_EN);
 546
 547         /* disable counter alarm interrupt */
 548         writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
 549
 550         /* disable week alarm */
 551         writel(0, chip->base + SUN6I_ALRM1_EN);
 552
 553         /* disable week alarm interrupt */
 554         writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
 555
 556         /* clear counter alarm pending interrupts */
 557         writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
 558                chip->base + SUN6I_ALRM_IRQ_STA);
 559
 560         /* clear week alarm pending interrupts */
 561         writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
 562                chip->base + SUN6I_ALRM1_IRQ_STA);
 563
 564         /* disable alarm wakeup */
 565         writel(0, chip->base + SUN6I_ALARM_CONFIG);
 566
 567         clk_prepare_enable(chip->losc);
 568
 569         chip->rtc = devm_rtc_device_register(&pdev->dev, "rtc-sun6i",
 570                                              &sun6i_rtc_ops, THIS_MODULE);
 571         if (IS_ERR(chip->rtc)) {
 572                 dev_err(&pdev->dev, "unable to register device\n");
 573                 return PTR_ERR(chip->rtc);
 574         }
 575
 576         dev_info(&pdev->dev, "RTC enabled\n");
 577
 578         return 0;
 579 }
 580
 581 static const struct of_device_id sun6i_rtc_dt_ids[] = {
 582         { .compatible = "allwinner,sun6i-a31-rtc" },
 583         { /* sentinel */ },
 584 };
 585 MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
 586
 587 static struct platform_driver sun6i_rtc_driver = {
 588         .probe          = sun6i_rtc_probe,
 589         .driver         = {
 590                 .name           = "sun6i-rtc",
 591                 .of_match_table = sun6i_rtc_dt_ids,
 592         },
 593 };
 594 builtin_platform_driver(sun6i_rtc_driver);