drivers/gpio/gpio-vf610.c

   1 /*
   2  * Freescale vf610 GPIO support through PORT and GPIO
   3  *
   4  * Copyright (c) 2014 Toradex AG.
   5  *
   6  * Author: Stefan Agner <stefan@agner.ch>.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * as published by the Free Software Foundation; either version 2
  11  * of the License, or (at your option) any later version.
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/bitops.h>
  19 #include <linux/err.h>
  20 #include <linux/gpio.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/io.h>
  24 #include <linux/ioport.h>
  25 #include <linux/irq.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/of.h>
  28 #include <linux/of_device.h>
  29 #include <linux/of_irq.h>
  30
  31 #define VF610_GPIO_PER_PORT             32
  32
  33 struct vf610_gpio_port {
  34         struct gpio_chip gc;
  35         void __iomem *base;
  36         void __iomem *gpio_base;
  37         u8 irqc[VF610_GPIO_PER_PORT];
  38         int irq;
  39 };
  40
  41 #define GPIO_PDOR               0x00
  42 #define GPIO_PSOR               0x04
  43 #define GPIO_PCOR               0x08
  44 #define GPIO_PTOR               0x0c
  45 #define GPIO_PDIR               0x10
  46
  47 #define PORT_PCR(n)             ((n) * 0x4)
  48 #define PORT_PCR_IRQC_OFFSET    16
  49
  50 #define PORT_ISFR               0xa0
  51 #define PORT_DFER               0xc0
  52 #define PORT_DFCR               0xc4
  53 #define PORT_DFWR               0xc8
  54
  55 #define PORT_INT_OFF            0x0
  56 #define PORT_INT_LOGIC_ZERO     0x8
  57 #define PORT_INT_RISING_EDGE    0x9
  58 #define PORT_INT_FALLING_EDGE   0xa
  59 #define PORT_INT_EITHER_EDGE    0xb
  60 #define PORT_INT_LOGIC_ONE      0xc
  61
  62 static struct irq_chip vf610_gpio_irq_chip;
  63
  64 static const struct of_device_id vf610_gpio_dt_ids[] = {
  65         { .compatible = "fsl,vf610-gpio" },
  66         { /* sentinel */ }
  67 };
  68
  69 static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
  70 {
  71         writel_relaxed(val, reg);
  72 }
  73
  74 static inline u32 vf610_gpio_readl(void __iomem *reg)
  75 {
  76         return readl_relaxed(reg);
  77 }
  78
  79 static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  80 {
  81         struct vf610_gpio_port *port = gpiochip_get_data(gc);
  82
  83         return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio));
  84 }
  85
  86 static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  87 {
  88         struct vf610_gpio_port *port = gpiochip_get_data(gc);
  89         unsigned long mask = BIT(gpio);
  90
  91         if (val)
  92                 vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
  93         else
  94                 vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
  95 }
  96
  97 static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
  98 {
  99         return pinctrl_gpio_direction_input(chip->base + gpio);
 100 }
 101
 102 static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
 103                                        int value)
 104 {
 105         vf610_gpio_set(chip, gpio, value);
 106
 107         return pinctrl_gpio_direction_output(chip->base + gpio);
 108 }
 109
 110 static void vf610_gpio_irq_handler(struct irq_desc *desc)
 111 {
 112         struct vf610_gpio_port *port =
 113                 gpiochip_get_data(irq_desc_get_handler_data(desc));
 114         struct irq_chip *chip = irq_desc_get_chip(desc);
 115         int pin;
 116         unsigned long irq_isfr;
 117
 118         chained_irq_enter(chip, desc);
 119
 120         irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
 121
 122         for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
 123                 vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
 124
 125                 generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
 126         }
 127
 128         chained_irq_exit(chip, desc);
 129 }
 130
 131 static void vf610_gpio_irq_ack(struct irq_data *d)
 132 {
 133         struct vf610_gpio_port *port =
 134                 gpiochip_get_data(irq_data_get_irq_chip_data(d));
 135         int gpio = d->hwirq;
 136
 137         vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
 138 }
 139
 140 static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
 141 {
 142         struct vf610_gpio_port *port =
 143                 gpiochip_get_data(irq_data_get_irq_chip_data(d));
 144         u8 irqc;
 145
 146         switch (type) {
 147         case IRQ_TYPE_EDGE_RISING:
 148                 irqc = PORT_INT_RISING_EDGE;
 149                 break;
 150         case IRQ_TYPE_EDGE_FALLING:
 151                 irqc = PORT_INT_FALLING_EDGE;
 152                 break;
 153         case IRQ_TYPE_EDGE_BOTH:
 154                 irqc = PORT_INT_EITHER_EDGE;
 155                 break;
 156         case IRQ_TYPE_LEVEL_LOW:
 157                 irqc = PORT_INT_LOGIC_ZERO;
 158                 break;
 159         case IRQ_TYPE_LEVEL_HIGH:
 160                 irqc = PORT_INT_LOGIC_ONE;
 161                 break;
 162         default:
 163                 return -EINVAL;
 164         }
 165
 166         port->irqc[d->hwirq] = irqc;
 167
 168         if (type & IRQ_TYPE_LEVEL_MASK)
 169                 irq_set_handler_locked(d, handle_level_irq);
 170         else
 171                 irq_set_handler_locked(d, handle_edge_irq);
 172
 173         return 0;
 174 }
 175
 176 static void vf610_gpio_irq_mask(struct irq_data *d)
 177 {
 178         struct vf610_gpio_port *port =
 179                 gpiochip_get_data(irq_data_get_irq_chip_data(d));
 180         void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
 181
 182         vf610_gpio_writel(0, pcr_base);
 183 }
 184
 185 static void vf610_gpio_irq_unmask(struct irq_data *d)
 186 {
 187         struct vf610_gpio_port *port =
 188                 gpiochip_get_data(irq_data_get_irq_chip_data(d));
 189         void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
 190
 191         vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
 192                           pcr_base);
 193 }
 194
 195 static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
 196 {
 197         struct vf610_gpio_port *port =
 198                 gpiochip_get_data(irq_data_get_irq_chip_data(d));
 199
 200         if (enable)
 201                 enable_irq_wake(port->irq);
 202         else
 203                 disable_irq_wake(port->irq);
 204
 205         return 0;
 206 }
 207
 208 static struct irq_chip vf610_gpio_irq_chip = {
 209         .name           = "gpio-vf610",
 210         .irq_ack        = vf610_gpio_irq_ack,
 211         .irq_mask       = vf610_gpio_irq_mask,
 212         .irq_unmask     = vf610_gpio_irq_unmask,
 213         .irq_set_type   = vf610_gpio_irq_set_type,
 214         .irq_set_wake   = vf610_gpio_irq_set_wake,
 215 };
 216
 217 static int vf610_gpio_probe(struct platform_device *pdev)
 218 {
 219         struct device *dev = &pdev->dev;
 220         struct device_node *np = dev->of_node;
 221         struct vf610_gpio_port *port;
 222         struct resource *iores;
 223         struct gpio_chip *gc;
 224         int ret;
 225
 226         port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
 227         if (!port)
 228                 return -ENOMEM;
 229
 230         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 231         port->base = devm_ioremap_resource(dev, iores);
 232         if (IS_ERR(port->base))
 233                 return PTR_ERR(port->base);
 234
 235         iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 236         port->gpio_base = devm_ioremap_resource(dev, iores);
 237         if (IS_ERR(port->gpio_base))
 238                 return PTR_ERR(port->gpio_base);
 239
 240         port->irq = platform_get_irq(pdev, 0);
 241         if (port->irq < 0)
 242                 return port->irq;
 243
 244         gc = &port->gc;
 245         gc->of_node = np;
 246         gc->parent = dev;
 247         gc->label = "vf610-gpio";
 248         gc->ngpio = VF610_GPIO_PER_PORT;
 249         gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
 250
 251         gc->request = gpiochip_generic_request;
 252         gc->free = gpiochip_generic_free;
 253         gc->direction_input = vf610_gpio_direction_input;
 254         gc->get = vf610_gpio_get;
 255         gc->direction_output = vf610_gpio_direction_output;
 256         gc->set = vf610_gpio_set;
 257
 258         ret = gpiochip_add_data(gc, port);
 259         if (ret < 0)
 260                 return ret;
 261
 262         /* Clear the interrupt status register for all GPIO's */
 263         vf610_gpio_writel(~0, port->base + PORT_ISFR);
 264
 265         ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
 266                                    handle_edge_irq, IRQ_TYPE_NONE);
 267         if (ret) {
 268                 dev_err(dev, "failed to add irqchip\n");
 269                 gpiochip_remove(gc);
 270                 return ret;
 271         }
 272         gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
 273                                      vf610_gpio_irq_handler);
 274
 275         return 0;
 276 }
 277
 278 static struct platform_driver vf610_gpio_driver = {
 279         .driver         = {
 280                 .name   = "gpio-vf610",
 281                 .of_match_table = vf610_gpio_dt_ids,
 282         },
 283         .probe          = vf610_gpio_probe,
 284 };
 285
 286 builtin_platform_driver(vf610_gpio_driver);