1 #include <linux/init.h>
2 #include <linux/module.h>
3 #include <linux/cpufreq.h>
4 #include <hwregs/reg_map.h>
5 #include <arch/hwregs/reg_rdwr.h>
6 #include <arch/hwregs/config_defs.h>
7 #include <arch/hwregs/bif_core_defs.h>
10 cris_sdram_freq_notifier(struct notifier_block
*nb
, unsigned long val
,
13 static struct notifier_block cris_sdram_freq_notifier_block
= {
14 .notifier_call
= cris_sdram_freq_notifier
17 static struct cpufreq_frequency_table cris_freq_table
[] = {
20 {0, 0, CPUFREQ_TABLE_END
},
23 static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu
)
25 reg_config_rw_clk_ctrl clk_ctrl
;
26 clk_ctrl
= REG_RD(config
, regi_config
, rw_clk_ctrl
);
27 return clk_ctrl
.pll
? 200000 : 6000;
30 static int cris_freq_target(struct cpufreq_policy
*policy
, unsigned int state
)
32 reg_config_rw_clk_ctrl clk_ctrl
;
33 clk_ctrl
= REG_RD(config
, regi_config
, rw_clk_ctrl
);
37 /* Even though we may be SMP they will share the same clock
38 * so all settings are made on CPU0. */
39 if (cris_freq_table
[state
].frequency
== 200000)
43 REG_WR(config
, regi_config
, rw_clk_ctrl
, clk_ctrl
);
50 static int cris_freq_cpu_init(struct cpufreq_policy
*policy
)
52 return cpufreq_generic_init(policy
, cris_freq_table
, 1000000);
55 static struct cpufreq_driver cris_freq_driver
= {
56 .get
= cris_freq_get_cpu_frequency
,
57 .verify
= cpufreq_generic_frequency_table_verify
,
58 .target_index
= cris_freq_target
,
59 .init
= cris_freq_cpu_init
,
61 .attr
= cpufreq_generic_attr
,
64 static int __init
cris_freq_init(void)
67 ret
= cpufreq_register_driver(&cris_freq_driver
);
68 cpufreq_register_notifier(&cris_sdram_freq_notifier_block
,
69 CPUFREQ_TRANSITION_NOTIFIER
);
74 cris_sdram_freq_notifier(struct notifier_block
*nb
, unsigned long val
,
78 struct cpufreq_freqs
*freqs
= data
;
79 if (val
== CPUFREQ_PRECHANGE
) {
80 reg_bif_core_rw_sdram_timing timing
=
81 REG_RD(bif_core
, regi_bif_core
, rw_sdram_timing
);
82 timing
.cpd
= (freqs
->new == 200000 ? 0 : 1);
84 if (freqs
->new == 200000)
85 for (i
= 0; i
< 50000; i
++) ;
86 REG_WR(bif_core
, regi_bif_core
, rw_sdram_timing
, timing
);
91 module_init(cris_freq_init
);