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Merge tag 'soundwire-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul...
[linux/fpc-iii.git] / drivers / pinctrl / qcom / pinctrl-msm8994.c
blob0ec886563f45a8876c77da3b60927adc423b2033
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4 */
5
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9 #include <linux/pinctrl/pinctrl.h>
10
11 #include "pinctrl-msm.h"
12
13 #define FUNCTION(fname) \
14 [MSM_MUX_##fname] = { \
15 .name = #fname, \
16 .groups = fname##_groups, \
17 .ngroups = ARRAY_SIZE(fname##_groups), \
18 }
19
20 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
21 { \
22 .name = "gpio" #id, \
23 .pins = gpio##id##_pins, \
24 .npins = ARRAY_SIZE(gpio##id##_pins), \
25 .funcs = (int[]){ \
26 MSM_MUX_gpio, \
27 MSM_MUX_##f1, \
28 MSM_MUX_##f2, \
29 MSM_MUX_##f3, \
30 MSM_MUX_##f4, \
31 MSM_MUX_##f5, \
32 MSM_MUX_##f6, \
33 MSM_MUX_##f7, \
34 MSM_MUX_##f8, \
35 MSM_MUX_##f9, \
36 MSM_MUX_##f10, \
37 MSM_MUX_##f11 \
38 }, \
39 .nfuncs = 12, \
40 .ctl_reg = 0x1000 + 0x10 * id, \
41 .io_reg = 0x1004 + 0x10 * id, \
42 .intr_cfg_reg = 0x1008 + 0x10 * id, \
43 .intr_status_reg = 0x100c + 0x10 * id, \
44 .intr_target_reg = 0x1008 + 0x10 * id, \
45 .mux_bit = 2, \
46 .pull_bit = 0, \
47 .drv_bit = 6, \
48 .oe_bit = 9, \
49 .in_bit = 0, \
50 .out_bit = 1, \
51 .intr_enable_bit = 0, \
52 .intr_status_bit = 0, \
53 .intr_target_bit = 5, \
54 .intr_target_kpss_val = 4, \
55 .intr_raw_status_bit = 4, \
56 .intr_polarity_bit = 1, \
57 .intr_detection_bit = 2, \
58 .intr_detection_width = 2, \
59 }
60
61 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
62 { \
63 .name = #pg_name, \
64 .pins = pg_name##_pins, \
65 .npins = ARRAY_SIZE(pg_name##_pins), \
66 .ctl_reg = ctl, \
67 .io_reg = 0, \
68 .intr_cfg_reg = 0, \
69 .intr_status_reg = 0, \
70 .intr_target_reg = 0, \
71 .mux_bit = -1, \
72 .pull_bit = pull, \
73 .drv_bit = drv, \
74 .oe_bit = -1, \
75 .in_bit = -1, \
76 .out_bit = -1, \
77 .intr_enable_bit = -1, \
78 .intr_status_bit = -1, \
79 .intr_target_bit = -1, \
80 .intr_target_kpss_val = -1, \
81 .intr_raw_status_bit = -1, \
82 .intr_polarity_bit = -1, \
83 .intr_detection_bit = -1, \
84 .intr_detection_width = -1, \
85 }
86 static const struct pinctrl_pin_desc msm8994_pins[] = {
87 PINCTRL_PIN(0, "GPIO_0"),
88 PINCTRL_PIN(1, "GPIO_1"),
89 PINCTRL_PIN(2, "GPIO_2"),
90 PINCTRL_PIN(3, "GPIO_3"),
91 PINCTRL_PIN(4, "GPIO_4"),
92 PINCTRL_PIN(5, "GPIO_5"),
93 PINCTRL_PIN(6, "GPIO_6"),
94 PINCTRL_PIN(7, "GPIO_7"),
95 PINCTRL_PIN(8, "GPIO_8"),
96 PINCTRL_PIN(9, "GPIO_9"),
97 PINCTRL_PIN(10, "GPIO_10"),
98 PINCTRL_PIN(11, "GPIO_11"),
99 PINCTRL_PIN(12, "GPIO_12"),
100 PINCTRL_PIN(13, "GPIO_13"),
101 PINCTRL_PIN(14, "GPIO_14"),
102 PINCTRL_PIN(15, "GPIO_15"),
103 PINCTRL_PIN(16, "GPIO_16"),
104 PINCTRL_PIN(17, "GPIO_17"),
105 PINCTRL_PIN(18, "GPIO_18"),
106 PINCTRL_PIN(19, "GPIO_19"),
107 PINCTRL_PIN(20, "GPIO_20"),
108 PINCTRL_PIN(21, "GPIO_21"),
109 PINCTRL_PIN(22, "GPIO_22"),
110 PINCTRL_PIN(23, "GPIO_23"),
111 PINCTRL_PIN(24, "GPIO_24"),
112 PINCTRL_PIN(25, "GPIO_25"),
113 PINCTRL_PIN(26, "GPIO_26"),
114 PINCTRL_PIN(27, "GPIO_27"),
115 PINCTRL_PIN(28, "GPIO_28"),
116 PINCTRL_PIN(29, "GPIO_29"),
117 PINCTRL_PIN(30, "GPIO_30"),
118 PINCTRL_PIN(31, "GPIO_31"),
119 PINCTRL_PIN(32, "GPIO_32"),
120 PINCTRL_PIN(33, "GPIO_33"),
121 PINCTRL_PIN(34, "GPIO_34"),
122 PINCTRL_PIN(35, "GPIO_35"),
123 PINCTRL_PIN(36, "GPIO_36"),
124 PINCTRL_PIN(37, "GPIO_37"),
125 PINCTRL_PIN(38, "GPIO_38"),
126 PINCTRL_PIN(39, "GPIO_39"),
127 PINCTRL_PIN(40, "GPIO_40"),
128 PINCTRL_PIN(41, "GPIO_41"),
129 PINCTRL_PIN(42, "GPIO_42"),
130 PINCTRL_PIN(43, "GPIO_43"),
131 PINCTRL_PIN(44, "GPIO_44"),
132 PINCTRL_PIN(45, "GPIO_45"),
133 PINCTRL_PIN(46, "GPIO_46"),
134 PINCTRL_PIN(47, "GPIO_47"),
135 PINCTRL_PIN(48, "GPIO_48"),
136 PINCTRL_PIN(49, "GPIO_49"),
137 PINCTRL_PIN(50, "GPIO_50"),
138 PINCTRL_PIN(51, "GPIO_51"),
139 PINCTRL_PIN(52, "GPIO_52"),
140 PINCTRL_PIN(53, "GPIO_53"),
141 PINCTRL_PIN(54, "GPIO_54"),
142 PINCTRL_PIN(55, "GPIO_55"),
143 PINCTRL_PIN(56, "GPIO_56"),
144 PINCTRL_PIN(57, "GPIO_57"),
145 PINCTRL_PIN(58, "GPIO_58"),
146 PINCTRL_PIN(59, "GPIO_59"),
147 PINCTRL_PIN(60, "GPIO_60"),
148 PINCTRL_PIN(61, "GPIO_61"),
149 PINCTRL_PIN(62, "GPIO_62"),
150 PINCTRL_PIN(63, "GPIO_63"),
151 PINCTRL_PIN(64, "GPIO_64"),
152 PINCTRL_PIN(65, "GPIO_65"),
153 PINCTRL_PIN(66, "GPIO_66"),
154 PINCTRL_PIN(67, "GPIO_67"),
155 PINCTRL_PIN(68, "GPIO_68"),
156 PINCTRL_PIN(69, "GPIO_69"),
157 PINCTRL_PIN(70, "GPIO_70"),
158 PINCTRL_PIN(71, "GPIO_71"),
159 PINCTRL_PIN(72, "GPIO_72"),
160 PINCTRL_PIN(73, "GPIO_73"),
161 PINCTRL_PIN(74, "GPIO_74"),
162 PINCTRL_PIN(75, "GPIO_75"),
163 PINCTRL_PIN(76, "GPIO_76"),
164 PINCTRL_PIN(77, "GPIO_77"),
165 PINCTRL_PIN(78, "GPIO_78"),
166 PINCTRL_PIN(79, "GPIO_79"),
167 PINCTRL_PIN(80, "GPIO_80"),
168 PINCTRL_PIN(81, "GPIO_81"),
169 PINCTRL_PIN(82, "GPIO_82"),
170 PINCTRL_PIN(83, "GPIO_83"),
171 PINCTRL_PIN(84, "GPIO_84"),
172 PINCTRL_PIN(85, "GPIO_85"),
173 PINCTRL_PIN(86, "GPIO_86"),
174 PINCTRL_PIN(87, "GPIO_87"),
175 PINCTRL_PIN(88, "GPIO_88"),
176 PINCTRL_PIN(89, "GPIO_89"),
177 PINCTRL_PIN(90, "GPIO_90"),
178 PINCTRL_PIN(91, "GPIO_91"),
179 PINCTRL_PIN(92, "GPIO_92"),
180 PINCTRL_PIN(93, "GPIO_93"),
181 PINCTRL_PIN(94, "GPIO_94"),
182 PINCTRL_PIN(95, "GPIO_95"),
183 PINCTRL_PIN(96, "GPIO_96"),
184 PINCTRL_PIN(97, "GPIO_97"),
185 PINCTRL_PIN(98, "GPIO_98"),
186 PINCTRL_PIN(99, "GPIO_99"),
187 PINCTRL_PIN(100, "GPIO_100"),
188 PINCTRL_PIN(101, "GPIO_101"),
189 PINCTRL_PIN(102, "GPIO_102"),
190 PINCTRL_PIN(103, "GPIO_103"),
191 PINCTRL_PIN(104, "GPIO_104"),
192 PINCTRL_PIN(105, "GPIO_105"),
193 PINCTRL_PIN(106, "GPIO_106"),
194 PINCTRL_PIN(107, "GPIO_107"),
195 PINCTRL_PIN(108, "GPIO_108"),
196 PINCTRL_PIN(109, "GPIO_109"),
197 PINCTRL_PIN(110, "GPIO_110"),
198 PINCTRL_PIN(111, "GPIO_111"),
199 PINCTRL_PIN(112, "GPIO_112"),
200 PINCTRL_PIN(113, "GPIO_113"),
201 PINCTRL_PIN(114, "GPIO_114"),
202 PINCTRL_PIN(115, "GPIO_115"),
203 PINCTRL_PIN(116, "GPIO_116"),
204 PINCTRL_PIN(117, "GPIO_117"),
205 PINCTRL_PIN(118, "GPIO_118"),
206 PINCTRL_PIN(119, "GPIO_119"),
207 PINCTRL_PIN(120, "GPIO_120"),
208 PINCTRL_PIN(121, "GPIO_121"),
209 PINCTRL_PIN(122, "GPIO_122"),
210 PINCTRL_PIN(123, "GPIO_123"),
211 PINCTRL_PIN(124, "GPIO_124"),
212 PINCTRL_PIN(125, "GPIO_125"),
213 PINCTRL_PIN(126, "GPIO_126"),
214 PINCTRL_PIN(127, "GPIO_127"),
215 PINCTRL_PIN(128, "GPIO_128"),
216 PINCTRL_PIN(129, "GPIO_129"),
217 PINCTRL_PIN(130, "GPIO_130"),
218 PINCTRL_PIN(131, "GPIO_131"),
219 PINCTRL_PIN(132, "GPIO_132"),
220 PINCTRL_PIN(133, "GPIO_133"),
221 PINCTRL_PIN(134, "GPIO_134"),
222 PINCTRL_PIN(135, "GPIO_135"),
223 PINCTRL_PIN(136, "GPIO_136"),
224 PINCTRL_PIN(137, "GPIO_137"),
225 PINCTRL_PIN(138, "GPIO_138"),
226 PINCTRL_PIN(139, "GPIO_139"),
227 PINCTRL_PIN(140, "GPIO_140"),
228 PINCTRL_PIN(141, "GPIO_141"),
229 PINCTRL_PIN(142, "GPIO_142"),
230 PINCTRL_PIN(143, "GPIO_143"),
231 PINCTRL_PIN(144, "GPIO_144"),
232 PINCTRL_PIN(145, "GPIO_145"),
233 PINCTRL_PIN(146, "SDC1_RCLK"),
234 PINCTRL_PIN(147, "SDC1_CLK"),
235 PINCTRL_PIN(148, "SDC1_CMD"),
236 PINCTRL_PIN(149, "SDC1_DATA"),
237 PINCTRL_PIN(150, "SDC2_CLK"),
238 PINCTRL_PIN(151, "SDC2_CMD"),
239 PINCTRL_PIN(152, "SDC2_DATA"),
240 PINCTRL_PIN(153, "SDC3_CLK"),
241 PINCTRL_PIN(154, "SDC3_CMD"),
242 PINCTRL_PIN(155, "SDC3_DATA"),
243 };
244
245 #define DECLARE_MSM_GPIO_PINS(pin) \
246 static const unsigned int gpio##pin##_pins[] = { pin }
247 DECLARE_MSM_GPIO_PINS(0);
248 DECLARE_MSM_GPIO_PINS(1);
249 DECLARE_MSM_GPIO_PINS(2);
250 DECLARE_MSM_GPIO_PINS(3);
251 DECLARE_MSM_GPIO_PINS(4);
252 DECLARE_MSM_GPIO_PINS(5);
253 DECLARE_MSM_GPIO_PINS(6);
254 DECLARE_MSM_GPIO_PINS(7);
255 DECLARE_MSM_GPIO_PINS(8);
256 DECLARE_MSM_GPIO_PINS(9);
257 DECLARE_MSM_GPIO_PINS(10);
258 DECLARE_MSM_GPIO_PINS(11);
259 DECLARE_MSM_GPIO_PINS(12);
260 DECLARE_MSM_GPIO_PINS(13);
261 DECLARE_MSM_GPIO_PINS(14);
262 DECLARE_MSM_GPIO_PINS(15);
263 DECLARE_MSM_GPIO_PINS(16);
264 DECLARE_MSM_GPIO_PINS(17);
265 DECLARE_MSM_GPIO_PINS(18);
266 DECLARE_MSM_GPIO_PINS(19);
267 DECLARE_MSM_GPIO_PINS(20);
268 DECLARE_MSM_GPIO_PINS(21);
269 DECLARE_MSM_GPIO_PINS(22);
270 DECLARE_MSM_GPIO_PINS(23);
271 DECLARE_MSM_GPIO_PINS(24);
272 DECLARE_MSM_GPIO_PINS(25);
273 DECLARE_MSM_GPIO_PINS(26);
274 DECLARE_MSM_GPIO_PINS(27);
275 DECLARE_MSM_GPIO_PINS(28);
276 DECLARE_MSM_GPIO_PINS(29);
277 DECLARE_MSM_GPIO_PINS(30);
278 DECLARE_MSM_GPIO_PINS(31);
279 DECLARE_MSM_GPIO_PINS(32);
280 DECLARE_MSM_GPIO_PINS(33);
281 DECLARE_MSM_GPIO_PINS(34);
282 DECLARE_MSM_GPIO_PINS(35);
283 DECLARE_MSM_GPIO_PINS(36);
284 DECLARE_MSM_GPIO_PINS(37);
285 DECLARE_MSM_GPIO_PINS(38);
286 DECLARE_MSM_GPIO_PINS(39);
287 DECLARE_MSM_GPIO_PINS(40);
288 DECLARE_MSM_GPIO_PINS(41);
289 DECLARE_MSM_GPIO_PINS(42);
290 DECLARE_MSM_GPIO_PINS(43);
291 DECLARE_MSM_GPIO_PINS(44);
292 DECLARE_MSM_GPIO_PINS(45);
293 DECLARE_MSM_GPIO_PINS(46);
294 DECLARE_MSM_GPIO_PINS(47);
295 DECLARE_MSM_GPIO_PINS(48);
296 DECLARE_MSM_GPIO_PINS(49);
297 DECLARE_MSM_GPIO_PINS(50);
298 DECLARE_MSM_GPIO_PINS(51);
299 DECLARE_MSM_GPIO_PINS(52);
300 DECLARE_MSM_GPIO_PINS(53);
301 DECLARE_MSM_GPIO_PINS(54);
302 DECLARE_MSM_GPIO_PINS(55);
303 DECLARE_MSM_GPIO_PINS(56);
304 DECLARE_MSM_GPIO_PINS(57);
305 DECLARE_MSM_GPIO_PINS(58);
306 DECLARE_MSM_GPIO_PINS(59);
307 DECLARE_MSM_GPIO_PINS(60);
308 DECLARE_MSM_GPIO_PINS(61);
309 DECLARE_MSM_GPIO_PINS(62);
310 DECLARE_MSM_GPIO_PINS(63);
311 DECLARE_MSM_GPIO_PINS(64);
312 DECLARE_MSM_GPIO_PINS(65);
313 DECLARE_MSM_GPIO_PINS(66);
314 DECLARE_MSM_GPIO_PINS(67);
315 DECLARE_MSM_GPIO_PINS(68);
316 DECLARE_MSM_GPIO_PINS(69);
317 DECLARE_MSM_GPIO_PINS(70);
318 DECLARE_MSM_GPIO_PINS(71);
319 DECLARE_MSM_GPIO_PINS(72);
320 DECLARE_MSM_GPIO_PINS(73);
321 DECLARE_MSM_GPIO_PINS(74);
322 DECLARE_MSM_GPIO_PINS(75);
323 DECLARE_MSM_GPIO_PINS(76);
324 DECLARE_MSM_GPIO_PINS(77);
325 DECLARE_MSM_GPIO_PINS(78);
326 DECLARE_MSM_GPIO_PINS(79);
327 DECLARE_MSM_GPIO_PINS(80);
328 DECLARE_MSM_GPIO_PINS(81);
329 DECLARE_MSM_GPIO_PINS(82);
330 DECLARE_MSM_GPIO_PINS(83);
331 DECLARE_MSM_GPIO_PINS(84);
332 DECLARE_MSM_GPIO_PINS(85);
333 DECLARE_MSM_GPIO_PINS(86);
334 DECLARE_MSM_GPIO_PINS(87);
335 DECLARE_MSM_GPIO_PINS(88);
336 DECLARE_MSM_GPIO_PINS(89);
337 DECLARE_MSM_GPIO_PINS(90);
338 DECLARE_MSM_GPIO_PINS(91);
339 DECLARE_MSM_GPIO_PINS(92);
340 DECLARE_MSM_GPIO_PINS(93);
341 DECLARE_MSM_GPIO_PINS(94);
342 DECLARE_MSM_GPIO_PINS(95);
343 DECLARE_MSM_GPIO_PINS(96);
344 DECLARE_MSM_GPIO_PINS(97);
345 DECLARE_MSM_GPIO_PINS(98);
346 DECLARE_MSM_GPIO_PINS(99);
347 DECLARE_MSM_GPIO_PINS(100);
348 DECLARE_MSM_GPIO_PINS(101);
349 DECLARE_MSM_GPIO_PINS(102);
350 DECLARE_MSM_GPIO_PINS(103);
351 DECLARE_MSM_GPIO_PINS(104);
352 DECLARE_MSM_GPIO_PINS(105);
353 DECLARE_MSM_GPIO_PINS(106);
354 DECLARE_MSM_GPIO_PINS(107);
355 DECLARE_MSM_GPIO_PINS(108);
356 DECLARE_MSM_GPIO_PINS(109);
357 DECLARE_MSM_GPIO_PINS(110);
358 DECLARE_MSM_GPIO_PINS(111);
359 DECLARE_MSM_GPIO_PINS(112);
360 DECLARE_MSM_GPIO_PINS(113);
361 DECLARE_MSM_GPIO_PINS(114);
362 DECLARE_MSM_GPIO_PINS(115);
363 DECLARE_MSM_GPIO_PINS(116);
364 DECLARE_MSM_GPIO_PINS(117);
365 DECLARE_MSM_GPIO_PINS(118);
366 DECLARE_MSM_GPIO_PINS(119);
367 DECLARE_MSM_GPIO_PINS(120);
368 DECLARE_MSM_GPIO_PINS(121);
369 DECLARE_MSM_GPIO_PINS(122);
370 DECLARE_MSM_GPIO_PINS(123);
371 DECLARE_MSM_GPIO_PINS(124);
372 DECLARE_MSM_GPIO_PINS(125);
373 DECLARE_MSM_GPIO_PINS(126);
374 DECLARE_MSM_GPIO_PINS(127);
375 DECLARE_MSM_GPIO_PINS(128);
376 DECLARE_MSM_GPIO_PINS(129);
377 DECLARE_MSM_GPIO_PINS(130);
378 DECLARE_MSM_GPIO_PINS(131);
379 DECLARE_MSM_GPIO_PINS(132);
380 DECLARE_MSM_GPIO_PINS(133);
381 DECLARE_MSM_GPIO_PINS(134);
382 DECLARE_MSM_GPIO_PINS(135);
383 DECLARE_MSM_GPIO_PINS(136);
384 DECLARE_MSM_GPIO_PINS(137);
385 DECLARE_MSM_GPIO_PINS(138);
386 DECLARE_MSM_GPIO_PINS(139);
387 DECLARE_MSM_GPIO_PINS(140);
388 DECLARE_MSM_GPIO_PINS(141);
389 DECLARE_MSM_GPIO_PINS(142);
390 DECLARE_MSM_GPIO_PINS(143);
391 DECLARE_MSM_GPIO_PINS(144);
392 DECLARE_MSM_GPIO_PINS(145);
393
394 static const unsigned int sdc1_rclk_pins[] = { 146 };
395 static const unsigned int sdc1_clk_pins[] = { 147 };
396 static const unsigned int sdc1_cmd_pins[] = { 148 };
397 static const unsigned int sdc1_data_pins[] = { 149 };
398 static const unsigned int sdc2_clk_pins[] = { 150 };
399 static const unsigned int sdc2_cmd_pins[] = { 151 };
400 static const unsigned int sdc2_data_pins[] = { 152 };
401 static const unsigned int sdc3_clk_pins[] = { 153 };
402 static const unsigned int sdc3_cmd_pins[] = { 154 };
403 static const unsigned int sdc3_data_pins[] = { 155 };
404
405 enum msm8994_functions {
406 MSM_MUX_audio_ref_clk,
407 MSM_MUX_blsp_i2c1,
408 MSM_MUX_blsp_i2c2,
409 MSM_MUX_blsp_i2c3,
410 MSM_MUX_blsp_i2c4,
411 MSM_MUX_blsp_i2c5,
412 MSM_MUX_blsp_i2c6,
413 MSM_MUX_blsp_i2c7,
414 MSM_MUX_blsp_i2c8,
415 MSM_MUX_blsp_i2c9,
416 MSM_MUX_blsp_i2c10,
417 MSM_MUX_blsp_i2c11,
418 MSM_MUX_blsp_i2c12,
419 MSM_MUX_blsp_spi1,
420 MSM_MUX_blsp_spi1_cs1,
421 MSM_MUX_blsp_spi1_cs2,
422 MSM_MUX_blsp_spi1_cs3,
423 MSM_MUX_blsp_spi2,
424 MSM_MUX_blsp_spi2_cs1,
425 MSM_MUX_blsp_spi2_cs2,
426 MSM_MUX_blsp_spi2_cs3,
427 MSM_MUX_blsp_spi3,
428 MSM_MUX_blsp_spi4,
429 MSM_MUX_blsp_spi5,
430 MSM_MUX_blsp_spi6,
431 MSM_MUX_blsp_spi7,
432 MSM_MUX_blsp_spi8,
433 MSM_MUX_blsp_spi9,
434 MSM_MUX_blsp_spi10,
435 MSM_MUX_blsp_spi10_cs1,
436 MSM_MUX_blsp_spi10_cs2,
437 MSM_MUX_blsp_spi10_cs3,
438 MSM_MUX_blsp_spi11,
439 MSM_MUX_blsp_spi12,
440 MSM_MUX_blsp_uart1,
441 MSM_MUX_blsp_uart2,
442 MSM_MUX_blsp_uart3,
443 MSM_MUX_blsp_uart4,
444 MSM_MUX_blsp_uart5,
445 MSM_MUX_blsp_uart6,
446 MSM_MUX_blsp_uart7,
447 MSM_MUX_blsp_uart8,
448 MSM_MUX_blsp_uart9,
449 MSM_MUX_blsp_uart10,
450 MSM_MUX_blsp_uart11,
451 MSM_MUX_blsp_uart12,
452 MSM_MUX_blsp_uim1,
453 MSM_MUX_blsp_uim2,
454 MSM_MUX_blsp_uim3,
455 MSM_MUX_blsp_uim4,
456 MSM_MUX_blsp_uim5,
457 MSM_MUX_blsp_uim6,
458 MSM_MUX_blsp_uim7,
459 MSM_MUX_blsp_uim8,
460 MSM_MUX_blsp_uim9,
461 MSM_MUX_blsp_uim10,
462 MSM_MUX_blsp_uim11,
463 MSM_MUX_blsp_uim12,
464 MSM_MUX_blsp11_i2c_scl_b,
465 MSM_MUX_blsp11_i2c_sda_b,
466 MSM_MUX_blsp11_uart_rx_b,
467 MSM_MUX_blsp11_uart_tx_b,
468 MSM_MUX_cam_mclk0,
469 MSM_MUX_cam_mclk1,
470 MSM_MUX_cam_mclk2,
471 MSM_MUX_cam_mclk3,
472 MSM_MUX_cci_async_in0,
473 MSM_MUX_cci_async_in1,
474 MSM_MUX_cci_async_in2,
475 MSM_MUX_cci_i2c0,
476 MSM_MUX_cci_i2c1,
477 MSM_MUX_cci_timer0,
478 MSM_MUX_cci_timer1,
479 MSM_MUX_cci_timer2,
480 MSM_MUX_cci_timer3,
481 MSM_MUX_cci_timer4,
482 MSM_MUX_gcc_gp1_clk_a,
483 MSM_MUX_gcc_gp1_clk_b,
484 MSM_MUX_gcc_gp2_clk_a,
485 MSM_MUX_gcc_gp2_clk_b,
486 MSM_MUX_gcc_gp3_clk_a,
487 MSM_MUX_gcc_gp3_clk_b,
488 MSM_MUX_gp_mn,
489 MSM_MUX_gp_pdm0,
490 MSM_MUX_gp_pdm1,
491 MSM_MUX_gp_pdm2,
492 MSM_MUX_gp0_clk,
493 MSM_MUX_gp1_clk,
494 MSM_MUX_gps_tx,
495 MSM_MUX_gsm_tx,
496 MSM_MUX_hdmi_cec,
497 MSM_MUX_hdmi_ddc,
498 MSM_MUX_hdmi_hpd,
499 MSM_MUX_hdmi_rcv,
500 MSM_MUX_mdp_vsync,
501 MSM_MUX_mss_lte,
502 MSM_MUX_nav_pps,
503 MSM_MUX_nav_tsync,
504 MSM_MUX_qdss_cti_trig_in_a,
505 MSM_MUX_qdss_cti_trig_in_b,
506 MSM_MUX_qdss_cti_trig_in_c,
507 MSM_MUX_qdss_cti_trig_in_d,
508 MSM_MUX_qdss_cti_trig_out_a,
509 MSM_MUX_qdss_cti_trig_out_b,
510 MSM_MUX_qdss_cti_trig_out_c,
511 MSM_MUX_qdss_cti_trig_out_d,
512 MSM_MUX_qdss_traceclk_a,
513 MSM_MUX_qdss_traceclk_b,
514 MSM_MUX_qdss_tracectl_a,
515 MSM_MUX_qdss_tracectl_b,
516 MSM_MUX_qdss_tracedata_a,
517 MSM_MUX_qdss_tracedata_b,
518 MSM_MUX_qua_mi2s,
519 MSM_MUX_pci_e0,
520 MSM_MUX_pci_e1,
521 MSM_MUX_pri_mi2s,
522 MSM_MUX_sdc4,
523 MSM_MUX_sec_mi2s,
524 MSM_MUX_slimbus,
525 MSM_MUX_spkr_i2s,
526 MSM_MUX_ter_mi2s,
527 MSM_MUX_tsif1,
528 MSM_MUX_tsif2,
529 MSM_MUX_uim1,
530 MSM_MUX_uim2,
531 MSM_MUX_uim3,
532 MSM_MUX_uim4,
533 MSM_MUX_uim_batt_alarm,
534 MSM_MUX_gpio,
535 MSM_MUX_NA,
536 };
537
538 static const char * const gpio_groups[] = {
539 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
540 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
541 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
542 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
543 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
544 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
545 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
546 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
547 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
548 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
549 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
550 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
551 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
552 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
553 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
554 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
555 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
556 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
557 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
558 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
559 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
560 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
561 };
562
563 static const char * const blsp_spi1_groups[] = {
564 "gpio0", "gpio1", "gpio2", "gpio3"
565 };
566 static const char * const blsp_uart1_groups[] = {
567 "gpio0", "gpio1", "gpio2", "gpio3"
568 };
569 static const char * const blsp_uim1_groups[] = {
570 "gpio0", "gpio1"
571 };
572 static const char * const hdmi_rcv_groups[] = {
573 "gpio0"
574 };
575 static const char * const blsp_i2c1_groups[] = {
576 "gpio2", "gpio3"
577 };
578 static const char * const blsp_spi2_groups[] = {
579 "gpio4", "gpio5", "gpio6", "gpio7"
580 };
581 static const char * const blsp_uart2_groups[] = {
582 "gpio4", "gpio5", "gpio6", "gpio7"
583 };
584 static const char * const blsp_uim2_groups[] = {
585 "gpio4", "gpio5"
586 };
587 static const char * const qdss_cti_trig_out_b_groups[] = {
588 "gpio4",
589 };
590 static const char * const qdss_cti_trig_in_b_groups[] = {
591 "gpio5",
592 };
593 static const char * const blsp_i2c2_groups[] = {
594 "gpio6", "gpio7"
595 };
596 static const char * const blsp_spi3_groups[] = {
597 "gpio8", "gpio9", "gpio10", "gpio11"
598 };
599 static const char * const blsp_uart3_groups[] = {
600 "gpio8", "gpio9", "gpio10", "gpio11"
601 };
602 static const char * const blsp_uim3_groups[] = {
603 "gpio8", "gpio9"
604 };
605 static const char * const blsp_spi1_cs1_groups[] = {
606 "gpio8"
607 };
608 static const char * const blsp_spi1_cs2_groups[] = {
609 "gpio9", "gpio11"
610 };
611 static const char * const mdp_vsync_groups[] = {
612 "gpio10", "gpio11", "gpio12"
613 };
614 static const char * const blsp_i2c3_groups[] = {
615 "gpio10", "gpio11"
616 };
617 static const char * const blsp_spi1_cs3_groups[] = {
618 "gpio10"
619 };
620 static const char * const qdss_tracedata_b_groups[] = {
621 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18",
622 "gpio19", "gpio21", "gpio22", "gpio23", "gpio25", "gpio26",
623 "gpio57", "gpio58", "gpio92", "gpio93",
624 };
625 static const char * const cam_mclk0_groups[] = {
626 "gpio13"
627 };
628 static const char * const cam_mclk1_groups[] = {
629 "gpio14"
630 };
631 static const char * const cam_mclk2_groups[] = {
632 "gpio15"
633 };
634 static const char * const cam_mclk3_groups[] = {
635 "gpio16"
636 };
637 static const char * const cci_i2c0_groups[] = {
638 "gpio17", "gpio18"
639 };
640 static const char * const blsp_spi4_groups[] = {
641 "gpio17", "gpio18", "gpio19", "gpio20"
642 };
643 static const char * const blsp_uart4_groups[] = {
644 "gpio17", "gpio18", "gpio19", "gpio20"
645 };
646 static const char * const blsp_uim4_groups[] = {
647 "gpio17", "gpio18"
648 };
649 static const char * const cci_i2c1_groups[] = {
650 "gpio19", "gpio20"
651 };
652 static const char * const blsp_i2c4_groups[] = {
653 "gpio19", "gpio20"
654 };
655 static const char * const cci_timer0_groups[] = {
656 "gpio21"
657 };
658 static const char * const blsp_spi5_groups[] = {
659 "gpio21", "gpio22", "gpio23", "gpio24"
660 };
661 static const char * const blsp_uart5_groups[] = {
662 "gpio21", "gpio22", "gpio23", "gpio24"
663 };
664 static const char * const blsp_uim5_groups[] = {
665 "gpio21", "gpio22"
666 };
667 static const char * const cci_timer1_groups[] = {
668 "gpio22"
669 };
670 static const char * const cci_timer2_groups[] = {
671 "gpio23"
672 };
673 static const char * const blsp_i2c5_groups[] = {
674 "gpio23", "gpio24"
675 };
676 static const char * const cci_timer3_groups[] = {
677 "gpio24"
678 };
679 static const char * const cci_async_in1_groups[] = {
680 "gpio24"
681 };
682 static const char * const cci_timer4_groups[] = {
683 "gpio25"
684 };
685 static const char * const cci_async_in2_groups[] = {
686 "gpio25"
687 };
688 static const char * const blsp_spi6_groups[] = {
689 "gpio25", "gpio26", "gpio27", "gpio28"
690 };
691 static const char * const blsp_uart6_groups[] = {
692 "gpio25", "gpio26", "gpio27", "gpio28"
693 };
694 static const char * const blsp_uim6_groups[] = {
695 "gpio25", "gpio26"
696 };
697 static const char * const cci_async_in0_groups[] = {
698 "gpio26"
699 };
700 static const char * const gp0_clk_groups[] = {
701 "gpio26"
702 };
703 static const char * const gp1_clk_groups[] = {
704 "gpio27", "gpio57", "gpio78"
705 };
706 static const char * const blsp_i2c6_groups[] = {
707 "gpio27", "gpio28"
708 };
709 static const char * const qdss_tracectl_a_groups[] = {
710 "gpio27",
711 };
712 static const char * const qdss_traceclk_a_groups[] = {
713 "gpio28",
714 };
715 static const char * const gp_mn_groups[] = {
716 "gpio29"
717 };
718 static const char * const hdmi_cec_groups[] = {
719 "gpio31"
720 };
721 static const char * const hdmi_ddc_groups[] = {
722 "gpio32", "gpio33"
723 };
724 static const char * const hdmi_hpd_groups[] = {
725 "gpio34"
726 };
727 static const char * const uim3_groups[] = {
728 "gpio35", "gpio36", "gpio37", "gpio38"
729 };
730 static const char * const pci_e1_groups[] = {
731 "gpio35", "gpio36",
732 };
733 static const char * const blsp_spi7_groups[] = {
734 "gpio41", "gpio42", "gpio43", "gpio44"
735 };
736 static const char * const blsp_uart7_groups[] = {
737 "gpio41", "gpio42", "gpio43", "gpio44"
738 };
739 static const char * const blsp_uim7_groups[] = {
740 "gpio41", "gpio42"
741 };
742 static const char * const qdss_cti_trig_out_c_groups[] = {
743 "gpio41",
744 };
745 static const char * const qdss_cti_trig_in_c_groups[] = {
746 "gpio42",
747 };
748 static const char * const blsp_i2c7_groups[] = {
749 "gpio43", "gpio44"
750 };
751 static const char * const blsp_spi8_groups[] = {
752 "gpio45", "gpio46", "gpio47", "gpio48"
753 };
754 static const char * const blsp_uart8_groups[] = {
755 "gpio45", "gpio46", "gpio47", "gpio48"
756 };
757 static const char * const blsp_uim8_groups[] = {
758 "gpio45", "gpio46"
759 };
760 static const char * const blsp_i2c8_groups[] = {
761 "gpio47", "gpio48"
762 };
763 static const char * const blsp_spi10_cs1_groups[] = {
764 "gpio47", "gpio67"
765 };
766 static const char * const blsp_spi10_cs2_groups[] = {
767 "gpio48", "gpio68"
768 };
769 static const char * const uim2_groups[] = {
770 "gpio49", "gpio50", "gpio51", "gpio52"
771 };
772 static const char * const blsp_spi9_groups[] = {
773 "gpio49", "gpio50", "gpio51", "gpio52"
774 };
775 static const char * const blsp_uart9_groups[] = {
776 "gpio49", "gpio50", "gpio51", "gpio52"
777 };
778 static const char * const blsp_uim9_groups[] = {
779 "gpio49", "gpio50"
780 };
781 static const char * const blsp_i2c9_groups[] = {
782 "gpio51", "gpio52"
783 };
784 static const char * const pci_e0_groups[] = {
785 "gpio53", "gpio54",
786 };
787 static const char * const uim4_groups[] = {
788 "gpio53", "gpio54", "gpio55", "gpio56"
789 };
790 static const char * const blsp_spi10_groups[] = {
791 "gpio53", "gpio54", "gpio55", "gpio56"
792 };
793 static const char * const blsp_uart10_groups[] = {
794 "gpio53", "gpio54", "gpio55", "gpio56"
795 };
796 static const char * const blsp_uim10_groups[] = {
797 "gpio53", "gpio54"
798 };
799 static const char * const qdss_tracedata_a_groups[] = {
800 "gpio53", "gpio54", "gpio63", "gpio64", "gpio65",
801 "gpio66", "gpio67", "gpio74", "gpio75", "gpio76",
802 "gpio77", "gpio85", "gpio86", "gpio87", "gpio89",
803 "gpio90"
804 };
805 static const char * const gp_pdm0_groups[] = {
806 "gpio54", "gpio95"
807 };
808 static const char * const blsp_i2c10_groups[] = {
809 "gpio55", "gpio56"
810 };
811 static const char * const qdss_cti_trig_in_a_groups[] = {
812 "gpio55",
813 };
814 static const char * const qdss_cti_trig_out_a_groups[] = {
815 "gpio56",
816 };
817 static const char * const qua_mi2s_groups[] = {
818 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
819 };
820 static const char * const gcc_gp1_clk_a_groups[] = {
821 "gpio57"
822 };
823 static const char * const gcc_gp2_clk_a_groups[] = {
824 "gpio58"
825 };
826 static const char * const gcc_gp3_clk_a_groups[] = {
827 "gpio59"
828 };
829 static const char * const blsp_spi2_cs1_groups[] = {
830 "gpio62"
831 };
832 static const char * const blsp_spi2_cs2_groups[] = {
833 "gpio63"
834 };
835 static const char * const gp_pdm2_groups[] = {
836 "gpio63", "gpio79"
837 };
838 static const char * const pri_mi2s_groups[] = {
839 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
840 };
841 static const char * const blsp_spi2_cs3_groups[] = {
842 "gpio66"
843 };
844 static const char * const spkr_i2s_groups[] = {
845 "gpio69", "gpio70", "gpio71", "gpio72"
846 };
847 static const char * const audio_ref_clk_groups[] = {
848 "gpio69"
849 };
850 static const char * const slimbus_groups[] = {
851 "gpio70", "gpio71"
852 };
853 static const char * const ter_mi2s_groups[] = {
854 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
855 };
856 static const char * const gp_pdm1_groups[] = {
857 "gpio74", "gpio86"
858 };
859 static const char * const sec_mi2s_groups[] = {
860 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
861 };
862 static const char * const gcc_gp1_clk_b_groups[] = {
863 "gpio78"
864 };
865 static const char * const blsp_spi11_groups[] = {
866 "gpio81", "gpio82", "gpio83", "gpio84"
867 };
868 static const char * const blsp_uart11_groups[] = {
869 "gpio81", "gpio82", "gpio83", "gpio84"
870 };
871 static const char * const blsp_uim11_groups[] = {
872 "gpio81", "gpio82"
873 };
874 static const char * const gcc_gp2_clk_b_groups[] = {
875 "gpio81"
876 };
877 static const char * const gcc_gp3_clk_b_groups[] = {
878 "gpio82"
879 };
880 static const char * const blsp_i2c11_groups[] = {
881 "gpio83", "gpio84"
882 };
883 static const char * const blsp_uart12_groups[] = {
884 "gpio85", "gpio86", "gpio87", "gpio88"
885 };
886 static const char * const blsp_uim12_groups[] = {
887 "gpio85", "gpio86"
888 };
889 static const char * const blsp_i2c12_groups[] = {
890 "gpio87", "gpio88"
891 };
892 static const char * const blsp_spi12_groups[] = {
893 "gpio85", "gpio86", "gpio87", "gpio88"
894 };
895 static const char * const tsif1_groups[] = {
896 "gpio89", "gpio90", "gpio91", "gpio110", "gpio111"
897 };
898 static const char * const blsp_spi10_cs3_groups[] = {
899 "gpio90"
900 };
901 static const char * const sdc4_groups[] = {
902 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
903 };
904 static const char * const qdss_traceclk_b_groups[] = {
905 "gpio91",
906 };
907 static const char * const tsif2_groups[] = {
908 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
909 };
910 static const char * const qdss_tracectl_b_groups[] = {
911 "gpio94",
912 };
913 static const char * const qdss_cti_trig_out_d_groups[] = {
914 "gpio95",
915 };
916 static const char * const qdss_cti_trig_in_d_groups[] = {
917 "gpio96",
918 };
919 static const char * const uim1_groups[] = {
920 "gpio97", "gpio98", "gpio99", "gpio100"
921 };
922 static const char * const uim_batt_alarm_groups[] = {
923 "gpio101"
924 };
925 static const char * const blsp11_uart_tx_b_groups[] = {
926 "gpio111"
927 };
928 static const char * const blsp11_uart_rx_b_groups[] = {
929 "gpio112"
930 };
931 static const char * const blsp11_i2c_sda_b_groups[] = {
932 "gpio113"
933 };
934 static const char * const blsp11_i2c_scl_b_groups[] = {
935 "gpio114"
936 };
937 static const char * const gsm_tx_groups[] = {
938 "gpio126", "gpio131", "gpio132", "gpio133"
939 };
940 static const char * const nav_tsync_groups[] = {
941 "gpio127"
942 };
943 static const char * const nav_pps_groups[] = {
944 "gpio127"
945 };
946 static const char * const gps_tx_groups[] = {
947 "gpio130"
948 };
949 static const char * const mss_lte_groups[] = {
950 "gpio134", "gpio135"
951 };
952
953 static const struct msm_function msm8994_functions[] = {
954 FUNCTION(audio_ref_clk),
955 FUNCTION(blsp_i2c1),
956 FUNCTION(blsp_i2c2),
957 FUNCTION(blsp_i2c3),
958 FUNCTION(blsp_i2c4),
959 FUNCTION(blsp_i2c5),
960 FUNCTION(blsp_i2c6),
961 FUNCTION(blsp_i2c7),
962 FUNCTION(blsp_i2c8),
963 FUNCTION(blsp_i2c9),
964 FUNCTION(blsp_i2c10),
965 FUNCTION(blsp_i2c11),
966 FUNCTION(blsp_i2c12),
967 FUNCTION(blsp_spi1),
968 FUNCTION(blsp_spi1_cs1),
969 FUNCTION(blsp_spi1_cs2),
970 FUNCTION(blsp_spi1_cs3),
971 FUNCTION(blsp_spi2),
972 FUNCTION(blsp_spi2_cs1),
973 FUNCTION(blsp_spi2_cs2),
974 FUNCTION(blsp_spi2_cs3),
975 FUNCTION(blsp_spi3),
976 FUNCTION(blsp_spi4),
977 FUNCTION(blsp_spi5),
978 FUNCTION(blsp_spi6),
979 FUNCTION(blsp_spi7),
980 FUNCTION(blsp_spi8),
981 FUNCTION(blsp_spi9),
982 FUNCTION(blsp_spi10),
983 FUNCTION(blsp_spi10_cs1),
984 FUNCTION(blsp_spi10_cs2),
985 FUNCTION(blsp_spi10_cs3),
986 FUNCTION(blsp_spi11),
987 FUNCTION(blsp_spi12),
988 FUNCTION(blsp_uart1),
989 FUNCTION(blsp_uart2),
990 FUNCTION(blsp_uart3),
991 FUNCTION(blsp_uart4),
992 FUNCTION(blsp_uart5),
993 FUNCTION(blsp_uart6),
994 FUNCTION(blsp_uart7),
995 FUNCTION(blsp_uart8),
996 FUNCTION(blsp_uart9),
997 FUNCTION(blsp_uart10),
998 FUNCTION(blsp_uart11),
999 FUNCTION(blsp_uart12),
1000 FUNCTION(blsp_uim1),
1001 FUNCTION(blsp_uim2),
1002 FUNCTION(blsp_uim3),
1003 FUNCTION(blsp_uim4),
1004 FUNCTION(blsp_uim5),
1005 FUNCTION(blsp_uim6),
1006 FUNCTION(blsp_uim7),
1007 FUNCTION(blsp_uim8),
1008 FUNCTION(blsp_uim9),
1009 FUNCTION(blsp_uim10),
1010 FUNCTION(blsp_uim11),
1011 FUNCTION(blsp_uim12),
1012 FUNCTION(blsp11_i2c_scl_b),
1013 FUNCTION(blsp11_i2c_sda_b),
1014 FUNCTION(blsp11_uart_rx_b),
1015 FUNCTION(blsp11_uart_tx_b),
1016 FUNCTION(cam_mclk0),
1017 FUNCTION(cam_mclk1),
1018 FUNCTION(cam_mclk2),
1019 FUNCTION(cam_mclk3),
1020 FUNCTION(cci_async_in0),
1021 FUNCTION(cci_async_in1),
1022 FUNCTION(cci_async_in2),
1023 FUNCTION(cci_i2c0),
1024 FUNCTION(cci_i2c1),
1025 FUNCTION(cci_timer0),
1026 FUNCTION(cci_timer1),
1027 FUNCTION(cci_timer2),
1028 FUNCTION(cci_timer3),
1029 FUNCTION(cci_timer4),
1030 FUNCTION(gcc_gp1_clk_a),
1031 FUNCTION(gcc_gp1_clk_b),
1032 FUNCTION(gcc_gp2_clk_a),
1033 FUNCTION(gcc_gp2_clk_b),
1034 FUNCTION(gcc_gp3_clk_a),
1035 FUNCTION(gcc_gp3_clk_b),
1036 FUNCTION(gp_mn),
1037 FUNCTION(gp_pdm0),
1038 FUNCTION(gp_pdm1),
1039 FUNCTION(gp_pdm2),
1040 FUNCTION(gp0_clk),
1041 FUNCTION(gp1_clk),
1042 FUNCTION(gps_tx),
1043 FUNCTION(gsm_tx),
1044 FUNCTION(hdmi_cec),
1045 FUNCTION(hdmi_ddc),
1046 FUNCTION(hdmi_hpd),
1047 FUNCTION(hdmi_rcv),
1048 FUNCTION(mdp_vsync),
1049 FUNCTION(mss_lte),
1050 FUNCTION(nav_pps),
1051 FUNCTION(nav_tsync),
1052 FUNCTION(qdss_cti_trig_in_a),
1053 FUNCTION(qdss_cti_trig_in_b),
1054 FUNCTION(qdss_cti_trig_in_c),
1055 FUNCTION(qdss_cti_trig_in_d),
1056 FUNCTION(qdss_cti_trig_out_a),
1057 FUNCTION(qdss_cti_trig_out_b),
1058 FUNCTION(qdss_cti_trig_out_c),
1059 FUNCTION(qdss_cti_trig_out_d),
1060 FUNCTION(qdss_traceclk_a),
1061 FUNCTION(qdss_traceclk_b),
1062 FUNCTION(qdss_tracectl_a),
1063 FUNCTION(qdss_tracectl_b),
1064 FUNCTION(qdss_tracedata_a),
1065 FUNCTION(qdss_tracedata_b),
1066 FUNCTION(qua_mi2s),
1067 FUNCTION(pci_e0),
1068 FUNCTION(pci_e1),
1069 FUNCTION(pri_mi2s),
1070 FUNCTION(sdc4),
1071 FUNCTION(sec_mi2s),
1072 FUNCTION(slimbus),
1073 FUNCTION(spkr_i2s),
1074 FUNCTION(ter_mi2s),
1075 FUNCTION(tsif1),
1076 FUNCTION(tsif2),
1077 FUNCTION(uim_batt_alarm),
1078 FUNCTION(uim1),
1079 FUNCTION(uim2),
1080 FUNCTION(uim3),
1081 FUNCTION(uim4),
1082 FUNCTION(gpio),
1083 };
1084
1085 static const struct msm_pingroup msm8994_groups[] = {
1086 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, hdmi_rcv, NA, NA, NA,
1087 NA, NA, NA, NA),
1088 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA,
1089 NA, NA),
1090 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1091 NA, NA),
1092 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1093 NA, NA),
1094 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_out_b,
1095 NA, NA, NA, NA, NA, NA),
1096 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_in_b,
1097 NA, NA, NA, NA, NA, NA),
1098 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1099 NA, NA),
1100 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1101 NA, NA),
1102 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA,
1103 NA, NA, NA, NA, NA),
1104 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA,
1105 NA, NA, NA, NA, NA),
1106 PINGROUP(10, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1107 blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1108 PINGROUP(11, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1109 blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1110 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1111 PINGROUP(13, cam_mclk0, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1112 NA, NA),
1113 PINGROUP(14, cam_mclk1, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1114 NA, NA),
1115 PINGROUP(15, cam_mclk2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1116 NA, NA),
1117 PINGROUP(16, cam_mclk3, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1118 NA, NA),
1119 PINGROUP(17, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1120 qdss_tracedata_b, NA, NA, NA, NA, NA),
1121 PINGROUP(18, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1122 qdss_tracedata_b, NA, NA, NA, NA, NA),
1123 PINGROUP(19, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA,
1124 qdss_tracedata_b, NA, NA, NA, NA, NA),
1125 PINGROUP(20, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
1126 NA, NA, NA, NA),
1127 PINGROUP(21, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1128 qdss_tracedata_b, NA, NA, NA, NA, NA),
1129 PINGROUP(22, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1130 qdss_tracedata_b, NA, NA, NA, NA, NA),
1131 PINGROUP(23, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA,
1132 qdss_tracedata_b, NA, NA, NA, NA),
1133 PINGROUP(24, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5,
1134 blsp_i2c5, NA, NA, NA, NA, NA, NA),
1135 PINGROUP(25, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6,
1136 blsp_uim6, NA, NA, qdss_tracedata_b, NA, NA, NA),
1137 PINGROUP(26, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, gp0_clk,
1138 NA, qdss_tracedata_b, NA, NA, NA, NA),
1139 PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk,
1140 qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
1141 PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, qdss_traceclk_a, NA,
1142 NA, NA, NA, NA, NA, NA),
1143 PINGROUP(29, gp_mn, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1144 PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1145 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1146 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1147 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1148 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1149 PINGROUP(35, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1150 PINGROUP(36, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1151 PINGROUP(37, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1152 PINGROUP(38, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1153 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1154 PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1155 PINGROUP(41, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_out_c,
1156 NA, NA, NA, NA, NA, NA, NA),
1157 PINGROUP(42, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_in_c, NA,
1158 NA, NA, NA, NA, NA, NA),
1159 PINGROUP(43, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1160 NA, NA),
1161 PINGROUP(44, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1162 NA, NA),
1163 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1164 NA, NA),
1165 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1166 NA, NA),
1167 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA,
1168 NA, NA, NA, NA, NA),
1169 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA,
1170 NA, NA, NA, NA, NA),
1171 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1172 NA, NA, NA),
1173 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1174 NA, NA, NA),
1175 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1176 NA, NA, NA),
1177 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1178 NA, NA, NA),
1179 PINGROUP(53, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10, NA,
1180 NA, qdss_tracedata_a, NA, NA, NA),
1181 PINGROUP(54, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10,
1182 gp_pdm0, NA, NA, qdss_tracedata_a, NA, NA),
1183 PINGROUP(55, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA,
1184 qdss_cti_trig_in_a, NA, NA, NA),
1185 PINGROUP(56, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA,
1186 qdss_cti_trig_out_a, NA, NA, NA, NA),
1187 PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1188 NA, NA, NA, NA),
1189 PINGROUP(58, qua_mi2s, gcc_gp2_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1190 NA, NA, NA, NA),
1191 PINGROUP(59, qua_mi2s, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA, NA,
1192 NA),
1193 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1194 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1195 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA, NA, NA, NA,
1196 NA),
1197 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA, NA,
1198 qdss_tracedata_a, NA, NA),
1199 PINGROUP(64, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1200 NA, NA),
1201 PINGROUP(65, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1202 NA, NA),
1203 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, qdss_tracedata_a,
1204 NA, NA, NA, NA, NA),
1205 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, qdss_tracedata_a,
1206 NA, NA, NA, NA, NA),
1207 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA, NA, NA,
1208 NA),
1209 PINGROUP(69, spkr_i2s, audio_ref_clk, NA, NA, NA, NA, NA, NA, NA, NA,
1210 NA),
1211 PINGROUP(70, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1212 PINGROUP(71, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1213 PINGROUP(72, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1214 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1215 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, qdss_tracedata_a, NA, NA,
1216 NA, NA, NA),
1217 PINGROUP(75, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1218 NA, NA),
1219 PINGROUP(76, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1220 NA, NA),
1221 PINGROUP(77, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1222 NA, NA),
1223 PINGROUP(78, sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA,
1224 NA),
1225 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1226 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1227 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1228 gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
1229 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1230 gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
1231 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1232 NA, NA, NA),
1233 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1234 NA, NA, NA),
1235 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA,
1236 qdss_tracedata_a, NA, NA, NA, NA, NA),
1237 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA,
1238 qdss_tracedata_a, NA, NA, NA, NA, NA),
1239 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA,
1240 qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
1241 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA, NA,
1242 NA, NA, NA),
1243 PINGROUP(89, tsif1, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA,
1244 NA),
1245 PINGROUP(90, tsif1, blsp_spi10_cs3, qdss_tracedata_a, NA, NA, NA, NA,
1246 NA, NA, NA, NA),
1247 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, qdss_traceclk_b, NA, NA, NA,
1248 NA),
1249 PINGROUP(92, tsif2, sdc4, NA, NA, qdss_tracedata_b, NA, NA, NA, NA,
1250 NA, NA),
1251 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, qdss_tracedata_b, NA, NA,
1252 NA, NA),
1253 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, qdss_tracectl_b, NA, NA, NA,
1254 NA),
1255 PINGROUP(95, tsif2, sdc4, gp_pdm0, NA, NA, NA, qdss_cti_trig_out_d,
1256 NA, NA, NA, NA),
1257 PINGROUP(96, tsif2, sdc4, qdss_cti_trig_in_d, NA, NA, NA, NA, NA, NA,
1258 NA, NA),
1259 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1260 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1261 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1262 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1263 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1264 PINGROUP(102, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1265 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1266 PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1267 PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1268 PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1269 PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1270 PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1271 PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1272 PINGROUP(110, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1273 PINGROUP(111, tsif1, blsp11_uart_tx_b, NA, NA, NA, NA, NA, NA, NA, NA,
1274 NA),
1275 PINGROUP(112, blsp11_uart_rx_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1276 NA),
1277 PINGROUP(113, blsp11_i2c_sda_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1278 NA),
1279 PINGROUP(114, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1280 NA),
1281 PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1282 PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1283 PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1284 PINGROUP(118, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1285 PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1286 PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1287 PINGROUP(121, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1288 PINGROUP(122, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1289 PINGROUP(123, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1290 PINGROUP(124, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1291 PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1292 PINGROUP(126, NA, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1293 PINGROUP(127, NA, nav_tsync, nav_pps, NA, NA, NA, NA, NA, NA, NA,
1294 NA),
1295 PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1296 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1297 PINGROUP(130, gps_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1298 PINGROUP(131, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1299 PINGROUP(132, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1300 PINGROUP(133, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1301 PINGROUP(134, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1302 PINGROUP(135, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1303 PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1304 PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1305 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1306 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1307 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1308 PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1309 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1310 PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1311 PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1312 PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1313 SDC_PINGROUP(sdc1_rclk, 0x2044, 15, 0),
1314 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1315 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1316 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1317 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1318 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1319 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1320 SDC_PINGROUP(sdc3_clk, 0x206c, 14, 6),
1321 SDC_PINGROUP(sdc3_cmd, 0x206c, 11, 3),
1322 SDC_PINGROUP(sdc3_data, 0x206c, 9, 0),
1323 };
1324
1325 #define NUM_GPIO_PINGROUPS 146
1326
1327 static const struct msm_pinctrl_soc_data msm8994_pinctrl = {
1328 .pins = msm8994_pins,
1329 .npins = ARRAY_SIZE(msm8994_pins),
1330 .functions = msm8994_functions,
1331 .nfunctions = ARRAY_SIZE(msm8994_functions),
1332 .groups = msm8994_groups,
1333 .ngroups = ARRAY_SIZE(msm8994_groups),
1334 .ngpios = NUM_GPIO_PINGROUPS,
1335 };
1336
1337 static int msm8994_pinctrl_probe(struct platform_device *pdev)
1338 {
1339 return msm_pinctrl_probe(pdev, &msm8994_pinctrl);
1340 }
1341
1342 static const struct of_device_id msm8994_pinctrl_of_match[] = {
1343 { .compatible = "qcom,msm8992-pinctrl", },
1344 { .compatible = "qcom,msm8994-pinctrl", },
1345 { }
1346 };
1347
1348 static struct platform_driver msm8994_pinctrl_driver = {
1349 .driver = {
1350 .name = "msm8994-pinctrl",
1351 .of_match_table = msm8994_pinctrl_of_match,
1352 },
1353 .probe = msm8994_pinctrl_probe,
1354 .remove = msm_pinctrl_remove,
1355 };
1356
1357 static int __init msm8994_pinctrl_init(void)
1358 {
1359 return platform_driver_register(&msm8994_pinctrl_driver);
1360 }
1361 arch_initcall(msm8994_pinctrl_init);
1362
1363 static void __exit msm8994_pinctrl_exit(void)
1364 {
1365 platform_driver_unregister(&msm8994_pinctrl_driver);
1366 }
1367 module_exit(msm8994_pinctrl_exit);
1368
1369 MODULE_DESCRIPTION("Qualcomm MSM8994 pinctrl driver");
1370 MODULE_LICENSE("GPL v2");
1371 MODULE_DEVICE_TABLE(of, msm8994_pinctrl_of_match);
Linux with added FPC-III support