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staging: iio: ad7606: fix improper setting of oversampling pins
[linux/fpc-iii.git] / drivers / watchdog / f71808e_wdt.c
blob1b7e9169072f21b99335a97fa219d30eaa903393
1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
21
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24 #include <linux/err.h>
25 #include <linux/fs.h>
26 #include <linux/init.h>
27 #include <linux/io.h>
28 #include <linux/ioport.h>
29 #include <linux/miscdevice.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/notifier.h>
33 #include <linux/reboot.h>
34 #include <linux/uaccess.h>
35 #include <linux/watchdog.h>
36
37 #define DRVNAME "f71808e_wdt"
38
39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
42
43 #define SIO_REG_LDSEL 0x07 /* Logical device select */
44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45 #define SIO_REG_DEVREV 0x22 /* Device revision */
46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
49 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
50 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
51 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
52 #define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */
53 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
54 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
55
56 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
57 #define SIO_F71808_ID 0x0901 /* Chipset ID */
58 #define SIO_F71858_ID 0x0507 /* Chipset ID */
59 #define SIO_F71862_ID 0x0601 /* Chipset ID */
60 #define SIO_F71869_ID 0x0814 /* Chipset ID */
61 #define SIO_F71869A_ID 0x1007 /* Chipset ID */
62 #define SIO_F71882_ID 0x0541 /* Chipset ID */
63 #define SIO_F71889_ID 0x0723 /* Chipset ID */
64 #define SIO_F81865_ID 0x0704 /* Chipset ID */
65 #define SIO_F81866_ID 0x1010 /* Chipset ID */
66
67 #define F71808FG_REG_WDO_CONF 0xf0
68 #define F71808FG_REG_WDT_CONF 0xf5
69 #define F71808FG_REG_WD_TIME 0xf6
70
71 #define F71808FG_FLAG_WDOUT_EN 7
72
73 #define F71808FG_FLAG_WDTMOUT_STS 6
74 #define F71808FG_FLAG_WD_EN 5
75 #define F71808FG_FLAG_WD_PULSE 4
76 #define F71808FG_FLAG_WD_UNIT 3
77
78 #define F81865_REG_WDO_CONF 0xfa
79 #define F81865_FLAG_WDOUT_EN 0
80
81 /* Default values */
82 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
83 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
84 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
85 watchdog signal */
86 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
87 pin number 63 */
88
89 static unsigned short force_id;
90 module_param(force_id, ushort, 0);
91 MODULE_PARM_DESC(force_id, "Override the detected device ID");
92
93 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
94 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
95 module_param(timeout, int, 0);
96 MODULE_PARM_DESC(timeout,
97 "Watchdog timeout in seconds. 1<= timeout <="
98 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
99 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
100
101 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
102 module_param(pulse_width, uint, 0);
103 MODULE_PARM_DESC(pulse_width,
104 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
105 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
106
107 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
108 module_param(f71862fg_pin, uint, 0);
109 MODULE_PARM_DESC(f71862fg_pin,
110 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
111 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
112
113 static bool nowayout = WATCHDOG_NOWAYOUT;
114 module_param(nowayout, bool, 0444);
115 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
116
117 static unsigned int start_withtimeout;
118 module_param(start_withtimeout, uint, 0);
119 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
120 " given initial timeout. Zero (default) disables this feature.");
121
122 enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg, f81865,
123 f81866};
124
125 static const char *f71808e_names[] = {
126 "f71808fg",
127 "f71858fg",
128 "f71862fg",
129 "f71869",
130 "f71882fg",
131 "f71889fg",
132 "f81865",
133 "f81866",
134 };
135
136 /* Super-I/O Function prototypes */
137 static inline int superio_inb(int base, int reg);
138 static inline int superio_inw(int base, int reg);
139 static inline void superio_outb(int base, int reg, u8 val);
140 static inline void superio_set_bit(int base, int reg, int bit);
141 static inline void superio_clear_bit(int base, int reg, int bit);
142 static inline int superio_enter(int base);
143 static inline void superio_select(int base, int ld);
144 static inline void superio_exit(int base);
145
146 struct watchdog_data {
147 unsigned short sioaddr;
148 enum chips type;
149 unsigned long opened;
150 struct mutex lock;
151 char expect_close;
152 struct watchdog_info ident;
153
154 unsigned short timeout;
155 u8 timer_val; /* content for the wd_time register */
156 char minutes_mode;
157 u8 pulse_val; /* pulse width flag */
158 char pulse_mode; /* enable pulse output mode? */
159 char caused_reboot; /* last reboot was by the watchdog */
160 };
161
162 static struct watchdog_data watchdog = {
163 .lock = __MUTEX_INITIALIZER(watchdog.lock),
164 };
165
166 /* Super I/O functions */
167 static inline int superio_inb(int base, int reg)
168 {
169 outb(reg, base);
170 return inb(base + 1);
171 }
172
173 static int superio_inw(int base, int reg)
174 {
175 int val;
176 val = superio_inb(base, reg) << 8;
177 val |= superio_inb(base, reg + 1);
178 return val;
179 }
180
181 static inline void superio_outb(int base, int reg, u8 val)
182 {
183 outb(reg, base);
184 outb(val, base + 1);
185 }
186
187 static inline void superio_set_bit(int base, int reg, int bit)
188 {
189 unsigned long val = superio_inb(base, reg);
190 __set_bit(bit, &val);
191 superio_outb(base, reg, val);
192 }
193
194 static inline void superio_clear_bit(int base, int reg, int bit)
195 {
196 unsigned long val = superio_inb(base, reg);
197 __clear_bit(bit, &val);
198 superio_outb(base, reg, val);
199 }
200
201 static inline int superio_enter(int base)
202 {
203 /* Don't step on other drivers' I/O space by accident */
204 if (!request_muxed_region(base, 2, DRVNAME)) {
205 pr_err("I/O address 0x%04x already in use\n", (int)base);
206 return -EBUSY;
207 }
208
209 /* according to the datasheet the key must be sent twice! */
210 outb(SIO_UNLOCK_KEY, base);
211 outb(SIO_UNLOCK_KEY, base);
212
213 return 0;
214 }
215
216 static inline void superio_select(int base, int ld)
217 {
218 outb(SIO_REG_LDSEL, base);
219 outb(ld, base + 1);
220 }
221
222 static inline void superio_exit(int base)
223 {
224 outb(SIO_LOCK_KEY, base);
225 release_region(base, 2);
226 }
227
228 static int watchdog_set_timeout(int timeout)
229 {
230 if (timeout <= 0
231 || timeout > max_timeout) {
232 pr_err("watchdog timeout out of range\n");
233 return -EINVAL;
234 }
235
236 mutex_lock(&watchdog.lock);
237
238 watchdog.timeout = timeout;
239 if (timeout > 0xff) {
240 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
241 watchdog.minutes_mode = true;
242 } else {
243 watchdog.timer_val = timeout;
244 watchdog.minutes_mode = false;
245 }
246
247 mutex_unlock(&watchdog.lock);
248
249 return 0;
250 }
251
252 static int watchdog_set_pulse_width(unsigned int pw)
253 {
254 int err = 0;
255
256 mutex_lock(&watchdog.lock);
257
258 if (pw <= 1) {
259 watchdog.pulse_val = 0;
260 } else if (pw <= 25) {
261 watchdog.pulse_val = 1;
262 } else if (pw <= 125) {
263 watchdog.pulse_val = 2;
264 } else if (pw <= 5000) {
265 watchdog.pulse_val = 3;
266 } else {
267 pr_err("pulse width out of range\n");
268 err = -EINVAL;
269 goto exit_unlock;
270 }
271
272 watchdog.pulse_mode = pw;
273
274 exit_unlock:
275 mutex_unlock(&watchdog.lock);
276 return err;
277 }
278
279 static int watchdog_keepalive(void)
280 {
281 int err = 0;
282
283 mutex_lock(&watchdog.lock);
284 err = superio_enter(watchdog.sioaddr);
285 if (err)
286 goto exit_unlock;
287 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
288
289 if (watchdog.minutes_mode)
290 /* select minutes for timer units */
291 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
292 F71808FG_FLAG_WD_UNIT);
293 else
294 /* select seconds for timer units */
295 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
296 F71808FG_FLAG_WD_UNIT);
297
298 /* Set timer value */
299 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
300 watchdog.timer_val);
301
302 superio_exit(watchdog.sioaddr);
303
304 exit_unlock:
305 mutex_unlock(&watchdog.lock);
306 return err;
307 }
308
309 static int f71862fg_pin_configure(unsigned short ioaddr)
310 {
311 /* When ioaddr is non-zero the calling function has to take care of
312 mutex handling and superio preparation! */
313
314 if (f71862fg_pin == 63) {
315 if (ioaddr) {
316 /* SPI must be disabled first to use this pin! */
317 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
318 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
319 }
320 } else if (f71862fg_pin == 56) {
321 if (ioaddr)
322 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
323 } else {
324 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
325 return -EINVAL;
326 }
327 return 0;
328 }
329
330 static int watchdog_start(void)
331 {
332 /* Make sure we don't die as soon as the watchdog is enabled below */
333 int err = watchdog_keepalive();
334 if (err)
335 return err;
336
337 mutex_lock(&watchdog.lock);
338 err = superio_enter(watchdog.sioaddr);
339 if (err)
340 goto exit_unlock;
341 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
342
343 /* Watchdog pin configuration */
344 switch (watchdog.type) {
345 case f71808fg:
346 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
347 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
348 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
349 break;
350
351 case f71862fg:
352 err = f71862fg_pin_configure(watchdog.sioaddr);
353 if (err)
354 goto exit_superio;
355 break;
356
357 case f71869:
358 /* GPIO14 --> WDTRST# */
359 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
360 break;
361
362 case f71882fg:
363 /* Set pin 56 to WDTRST# */
364 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
365 break;
366
367 case f71889fg:
368 /* set pin 40 to WDTRST# */
369 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
370 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
371 break;
372
373 case f81865:
374 /* Set pin 70 to WDTRST# */
375 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
376 break;
377
378 case f81866:
379 /* Set pin 70 to WDTRST# */
380 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
381 BIT(3) | BIT(0));
382 superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL,
383 BIT(2));
384 /*
385 * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
386 * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
387 * BIT5: 0 -> WDTRST#
388 * 1 -> GPIO15
389 */
390 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1,
391 BIT(5));
392 break;
393
394 default:
395 /*
396 * 'default' label to shut up the compiler and catch
397 * programmer errors
398 */
399 err = -ENODEV;
400 goto exit_superio;
401 }
402
403 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
404 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
405
406 if (watchdog.type == f81865 || watchdog.type == f81866)
407 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
408 F81865_FLAG_WDOUT_EN);
409 else
410 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
411 F71808FG_FLAG_WDOUT_EN);
412
413 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
414 F71808FG_FLAG_WD_EN);
415
416 if (watchdog.pulse_mode) {
417 /* Select "pulse" output mode with given duration */
418 u8 wdt_conf = superio_inb(watchdog.sioaddr,
419 F71808FG_REG_WDT_CONF);
420
421 /* Set WD_PSWIDTH bits (1:0) */
422 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
423 /* Set WD_PULSE to "pulse" mode */
424 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
425
426 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
427 wdt_conf);
428 } else {
429 /* Select "level" output mode */
430 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
431 F71808FG_FLAG_WD_PULSE);
432 }
433
434 exit_superio:
435 superio_exit(watchdog.sioaddr);
436 exit_unlock:
437 mutex_unlock(&watchdog.lock);
438
439 return err;
440 }
441
442 static int watchdog_stop(void)
443 {
444 int err = 0;
445
446 mutex_lock(&watchdog.lock);
447 err = superio_enter(watchdog.sioaddr);
448 if (err)
449 goto exit_unlock;
450 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
451
452 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
453 F71808FG_FLAG_WD_EN);
454
455 superio_exit(watchdog.sioaddr);
456
457 exit_unlock:
458 mutex_unlock(&watchdog.lock);
459
460 return err;
461 }
462
463 static int watchdog_get_status(void)
464 {
465 int status = 0;
466
467 mutex_lock(&watchdog.lock);
468 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
469 mutex_unlock(&watchdog.lock);
470
471 return status;
472 }
473
474 static bool watchdog_is_running(void)
475 {
476 /*
477 * if we fail to determine the watchdog's status assume it to be
478 * running to be on the safe side
479 */
480 bool is_running = true;
481
482 mutex_lock(&watchdog.lock);
483 if (superio_enter(watchdog.sioaddr))
484 goto exit_unlock;
485 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
486
487 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
488 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
489 & F71808FG_FLAG_WD_EN);
490
491 superio_exit(watchdog.sioaddr);
492
493 exit_unlock:
494 mutex_unlock(&watchdog.lock);
495 return is_running;
496 }
497
498 /* /dev/watchdog api */
499
500 static int watchdog_open(struct inode *inode, struct file *file)
501 {
502 int err;
503
504 /* If the watchdog is alive we don't need to start it again */
505 if (test_and_set_bit(0, &watchdog.opened))
506 return -EBUSY;
507
508 err = watchdog_start();
509 if (err) {
510 clear_bit(0, &watchdog.opened);
511 return err;
512 }
513
514 if (nowayout)
515 __module_get(THIS_MODULE);
516
517 watchdog.expect_close = 0;
518 return nonseekable_open(inode, file);
519 }
520
521 static int watchdog_release(struct inode *inode, struct file *file)
522 {
523 clear_bit(0, &watchdog.opened);
524
525 if (!watchdog.expect_close) {
526 watchdog_keepalive();
527 pr_crit("Unexpected close, not stopping watchdog!\n");
528 } else if (!nowayout) {
529 watchdog_stop();
530 }
531 return 0;
532 }
533
534 /*
535 * watchdog_write:
536 * @file: file handle to the watchdog
537 * @buf: buffer to write
538 * @count: count of bytes
539 * @ppos: pointer to the position to write. No seeks allowed
540 *
541 * A write to a watchdog device is defined as a keepalive signal. Any
542 * write of data will do, as we we don't define content meaning.
543 */
544
545 static ssize_t watchdog_write(struct file *file, const char __user *buf,
546 size_t count, loff_t *ppos)
547 {
548 if (count) {
549 if (!nowayout) {
550 size_t i;
551
552 /* In case it was set long ago */
553 bool expect_close = false;
554
555 for (i = 0; i != count; i++) {
556 char c;
557 if (get_user(c, buf + i))
558 return -EFAULT;
559 expect_close = (c == 'V');
560 }
561
562 /* Properly order writes across fork()ed processes */
563 mutex_lock(&watchdog.lock);
564 watchdog.expect_close = expect_close;
565 mutex_unlock(&watchdog.lock);
566 }
567
568 /* someone wrote to us, we should restart timer */
569 watchdog_keepalive();
570 }
571 return count;
572 }
573
574 /*
575 * watchdog_ioctl:
576 * @inode: inode of the device
577 * @file: file handle to the device
578 * @cmd: watchdog command
579 * @arg: argument pointer
580 *
581 * The watchdog API defines a common set of functions for all watchdogs
582 * according to their available features.
583 */
584 static long watchdog_ioctl(struct file *file, unsigned int cmd,
585 unsigned long arg)
586 {
587 int status;
588 int new_options;
589 int new_timeout;
590 union {
591 struct watchdog_info __user *ident;
592 int __user *i;
593 } uarg;
594
595 uarg.i = (int __user *)arg;
596
597 switch (cmd) {
598 case WDIOC_GETSUPPORT:
599 return copy_to_user(uarg.ident, &watchdog.ident,
600 sizeof(watchdog.ident)) ? -EFAULT : 0;
601
602 case WDIOC_GETSTATUS:
603 status = watchdog_get_status();
604 if (status < 0)
605 return status;
606 return put_user(status, uarg.i);
607
608 case WDIOC_GETBOOTSTATUS:
609 return put_user(0, uarg.i);
610
611 case WDIOC_SETOPTIONS:
612 if (get_user(new_options, uarg.i))
613 return -EFAULT;
614
615 if (new_options & WDIOS_DISABLECARD)
616 watchdog_stop();
617
618 if (new_options & WDIOS_ENABLECARD)
619 return watchdog_start();
620
621
622 case WDIOC_KEEPALIVE:
623 watchdog_keepalive();
624 return 0;
625
626 case WDIOC_SETTIMEOUT:
627 if (get_user(new_timeout, uarg.i))
628 return -EFAULT;
629
630 if (watchdog_set_timeout(new_timeout))
631 return -EINVAL;
632
633 watchdog_keepalive();
634 /* Fall */
635
636 case WDIOC_GETTIMEOUT:
637 return put_user(watchdog.timeout, uarg.i);
638
639 default:
640 return -ENOTTY;
641
642 }
643 }
644
645 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
646 void *unused)
647 {
648 if (code == SYS_DOWN || code == SYS_HALT)
649 watchdog_stop();
650 return NOTIFY_DONE;
651 }
652
653 static const struct file_operations watchdog_fops = {
654 .owner = THIS_MODULE,
655 .llseek = no_llseek,
656 .open = watchdog_open,
657 .release = watchdog_release,
658 .write = watchdog_write,
659 .unlocked_ioctl = watchdog_ioctl,
660 };
661
662 static struct miscdevice watchdog_miscdev = {
663 .minor = WATCHDOG_MINOR,
664 .name = "watchdog",
665 .fops = &watchdog_fops,
666 };
667
668 static struct notifier_block watchdog_notifier = {
669 .notifier_call = watchdog_notify_sys,
670 };
671
672 static int __init watchdog_init(int sioaddr)
673 {
674 int wdt_conf, err = 0;
675
676 /* No need to lock watchdog.lock here because no entry points
677 * into the module have been registered yet.
678 */
679 watchdog.sioaddr = sioaddr;
680 watchdog.ident.options = WDIOC_SETTIMEOUT
681 | WDIOF_MAGICCLOSE
682 | WDIOF_KEEPALIVEPING;
683
684 snprintf(watchdog.ident.identity,
685 sizeof(watchdog.ident.identity), "%s watchdog",
686 f71808e_names[watchdog.type]);
687
688 err = superio_enter(sioaddr);
689 if (err)
690 return err;
691 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
692
693 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
694 watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
695
696 superio_exit(sioaddr);
697
698 err = watchdog_set_timeout(timeout);
699 if (err)
700 return err;
701 err = watchdog_set_pulse_width(pulse_width);
702 if (err)
703 return err;
704
705 err = register_reboot_notifier(&watchdog_notifier);
706 if (err)
707 return err;
708
709 err = misc_register(&watchdog_miscdev);
710 if (err) {
711 pr_err("cannot register miscdev on minor=%d\n",
712 watchdog_miscdev.minor);
713 goto exit_reboot;
714 }
715
716 if (start_withtimeout) {
717 if (start_withtimeout <= 0
718 || start_withtimeout > max_timeout) {
719 pr_err("starting timeout out of range\n");
720 err = -EINVAL;
721 goto exit_miscdev;
722 }
723
724 err = watchdog_start();
725 if (err) {
726 pr_err("cannot start watchdog timer\n");
727 goto exit_miscdev;
728 }
729
730 mutex_lock(&watchdog.lock);
731 err = superio_enter(sioaddr);
732 if (err)
733 goto exit_unlock;
734 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
735
736 if (start_withtimeout > 0xff) {
737 /* select minutes for timer units */
738 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
739 F71808FG_FLAG_WD_UNIT);
740 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
741 DIV_ROUND_UP(start_withtimeout, 60));
742 } else {
743 /* select seconds for timer units */
744 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
745 F71808FG_FLAG_WD_UNIT);
746 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
747 start_withtimeout);
748 }
749
750 superio_exit(sioaddr);
751 mutex_unlock(&watchdog.lock);
752
753 if (nowayout)
754 __module_get(THIS_MODULE);
755
756 pr_info("watchdog started with initial timeout of %u sec\n",
757 start_withtimeout);
758 }
759
760 return 0;
761
762 exit_unlock:
763 mutex_unlock(&watchdog.lock);
764 exit_miscdev:
765 misc_deregister(&watchdog_miscdev);
766 exit_reboot:
767 unregister_reboot_notifier(&watchdog_notifier);
768
769 return err;
770 }
771
772 static int __init f71808e_find(int sioaddr)
773 {
774 u16 devid;
775 int err = superio_enter(sioaddr);
776 if (err)
777 return err;
778
779 devid = superio_inw(sioaddr, SIO_REG_MANID);
780 if (devid != SIO_FINTEK_ID) {
781 pr_debug("Not a Fintek device\n");
782 err = -ENODEV;
783 goto exit;
784 }
785
786 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
787 switch (devid) {
788 case SIO_F71808_ID:
789 watchdog.type = f71808fg;
790 break;
791 case SIO_F71862_ID:
792 watchdog.type = f71862fg;
793 err = f71862fg_pin_configure(0); /* validate module parameter */
794 break;
795 case SIO_F71869_ID:
796 case SIO_F71869A_ID:
797 watchdog.type = f71869;
798 break;
799 case SIO_F71882_ID:
800 watchdog.type = f71882fg;
801 break;
802 case SIO_F71889_ID:
803 watchdog.type = f71889fg;
804 break;
805 case SIO_F71858_ID:
806 /* Confirmed (by datasheet) not to have a watchdog. */
807 err = -ENODEV;
808 goto exit;
809 case SIO_F81865_ID:
810 watchdog.type = f81865;
811 break;
812 case SIO_F81866_ID:
813 watchdog.type = f81866;
814 break;
815 default:
816 pr_info("Unrecognized Fintek device: %04x\n",
817 (unsigned int)devid);
818 err = -ENODEV;
819 goto exit;
820 }
821
822 pr_info("Found %s watchdog chip, revision %d\n",
823 f71808e_names[watchdog.type],
824 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
825 exit:
826 superio_exit(sioaddr);
827 return err;
828 }
829
830 static int __init f71808e_init(void)
831 {
832 static const unsigned short addrs[] = { 0x2e, 0x4e };
833 int err = -ENODEV;
834 int i;
835
836 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
837 err = f71808e_find(addrs[i]);
838 if (err == 0)
839 break;
840 }
841 if (i == ARRAY_SIZE(addrs))
842 return err;
843
844 return watchdog_init(addrs[i]);
845 }
846
847 static void __exit f71808e_exit(void)
848 {
849 if (watchdog_is_running()) {
850 pr_warn("Watchdog timer still running, stopping it\n");
851 watchdog_stop();
852 }
853 misc_deregister(&watchdog_miscdev);
854 unregister_reboot_notifier(&watchdog_notifier);
855 }
856
857 MODULE_DESCRIPTION("F71808E Watchdog Driver");
858 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
859 MODULE_LICENSE("GPL");
860
861 module_init(f71808e_init);
862 module_exit(f71808e_exit);
Linux with added FPC-III support