Merge branch 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6
[linux/fpc-iii.git] / drivers / staging / vt6656 / upc.h
blobacd1b661490db496cfa8e016a4116bbc17a00bec
1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 * File: upc.h
21 * Purpose: Macros to access device
23 * Author: Tevin Chen
25 * Date: Mar 17, 1997
29 #ifndef __UPC_H__
30 #define __UPC_H__
32 #include "device.h"
33 #include "ttype.h"
35 /*--------------------- Export Definitions -------------------------*/
39 // For IO mapped
42 #ifdef IO_MAP
44 #define VNSvInPortB(dwIOAddress, pbyData) { \
45 *(pbyData) = inb(dwIOAddress); \
49 #define VNSvInPortW(dwIOAddress, pwData) { \
50 *(pwData) = inw(dwIOAddress); \
53 #define VNSvInPortD(dwIOAddress, pdwData) { \
54 *(pdwData) = inl(dwIOAddress); \
58 #define VNSvOutPortB(dwIOAddress, byData) { \
59 outb(byData, dwIOAddress); \
63 #define VNSvOutPortW(dwIOAddress, wData) { \
64 outw(wData, dwIOAddress); \
67 #define VNSvOutPortD(dwIOAddress, dwData) { \
68 outl(dwData, dwIOAddress); \
71 #else
74 // For memory mapped IO
78 #define VNSvInPortB(dwIOAddress, pbyData) { \
79 volatile BYTE* pbyAddr = ((PBYTE)(dwIOAddress)); \
80 *(pbyData) = readb(pbyAddr); \
84 #define VNSvInPortW(dwIOAddress, pwData) { \
85 volatile WORD* pwAddr = ((PWORD)(dwIOAddress)); \
86 *(pwData) = readw(pwAddr); \
89 #define VNSvInPortD(dwIOAddress, pdwData) { \
90 volatile DWORD* pdwAddr = ((PDWORD)(dwIOAddress)); \
91 *(pdwData) = readl(pdwAddr); \
95 #define VNSvOutPortB(dwIOAddress, byData) { \
96 volatile BYTE* pbyAddr = ((PBYTE)(dwIOAddress)); \
97 writeb((BYTE)byData, pbyAddr); \
101 #define VNSvOutPortW(dwIOAddress, wData) { \
102 volatile WORD* pwAddr = ((PWORD)(dwIOAddress)); \
103 writew((WORD)wData, pwAddr); \
106 #define VNSvOutPortD(dwIOAddress, dwData) { \
107 volatile DWORD* pdwAddr = ((PDWORD)(dwIOAddress)); \
108 writel((DWORD)dwData, pdwAddr); \
111 #endif
115 // ALWAYS IO-Mapped IO when in 16-bit/32-bit environment
117 #define PCBvInPortB(dwIOAddress, pbyData) { \
118 *(pbyData) = inb(dwIOAddress); \
121 #define PCBvInPortW(dwIOAddress, pwData) { \
122 *(pwData) = inw(dwIOAddress); \
125 #define PCBvInPortD(dwIOAddress, pdwData) { \
126 *(pdwData) = inl(dwIOAddress); \
129 #define PCBvOutPortB(dwIOAddress, byData) { \
130 outb(byData, dwIOAddress); \
133 #define PCBvOutPortW(dwIOAddress, wData) { \
134 outw(wData, dwIOAddress); \
137 #define PCBvOutPortD(dwIOAddress, dwData) { \
138 outl(dwData, dwIOAddress); \
142 #define PCAvDelayByIO(uDelayUnit) { \
143 BYTE byData; \
144 ULONG ii; \
146 if (uDelayUnit <= 50) { \
147 udelay(uDelayUnit); \
149 else { \
150 for (ii = 0; ii < (uDelayUnit); ii++) \
151 byData = inb(0x61); \
156 /*--------------------- Export Classes ----------------------------*/
158 /*--------------------- Export Variables --------------------------*/
160 /*--------------------- Export Functions --------------------------*/
165 #endif // __UPC_H__