arch/arm/mach-exynos4/include/mach/regs-mct.h

   1 /* arch/arm/mach-exynos4/include/mach/regs-mct.h
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * EXYNOS4 MCT configutation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #ifndef __ASM_ARCH_REGS_MCT_H
  14 #define __ASM_ARCH_REGS_MCT_H __FILE__
  15
  16 #include <mach/map.h>
  17
  18 #define EXYNOS4_MCTREG(x)               (S5P_VA_SYSTIMER + (x))
  19
  20 #define EXYNOS4_MCT_G_CNT_L             EXYNOS4_MCTREG(0x100)
  21 #define EXYNOS4_MCT_G_CNT_U             EXYNOS4_MCTREG(0x104)
  22 #define EXYNOS4_MCT_G_CNT_WSTAT         EXYNOS4_MCTREG(0x110)
  23
  24 #define EXYNOS4_MCT_G_COMP0_L           EXYNOS4_MCTREG(0x200)
  25 #define EXYNOS4_MCT_G_COMP0_U           EXYNOS4_MCTREG(0x204)
  26 #define EXYNOS4_MCT_G_COMP0_ADD_INCR    EXYNOS4_MCTREG(0x208)
  27
  28 #define EXYNOS4_MCT_G_TCON              EXYNOS4_MCTREG(0x240)
  29
  30 #define EXYNOS4_MCT_G_INT_CSTAT         EXYNOS4_MCTREG(0x244)
  31 #define EXYNOS4_MCT_G_INT_ENB           EXYNOS4_MCTREG(0x248)
  32 #define EXYNOS4_MCT_G_WSTAT             EXYNOS4_MCTREG(0x24C)
  33
  34 #define EXYNOS4_MCT_L0_BASE             EXYNOS4_MCTREG(0x300)
  35 #define EXYNOS4_MCT_L1_BASE             EXYNOS4_MCTREG(0x400)
  36
  37 #define MCT_L_TCNTB_OFFSET              (0x00)
  38 #define MCT_L_ICNTB_OFFSET              (0x08)
  39 #define MCT_L_TCON_OFFSET               (0x20)
  40 #define MCT_L_INT_CSTAT_OFFSET          (0x30)
  41 #define MCT_L_INT_ENB_OFFSET            (0x34)
  42 #define MCT_L_WSTAT_OFFSET              (0x40)
  43
  44 #define MCT_G_TCON_START                (1 << 8)
  45 #define MCT_G_TCON_COMP0_AUTO_INC       (1 << 1)
  46 #define MCT_G_TCON_COMP0_ENABLE         (1 << 0)
  47
  48 #define MCT_L_TCON_INTERVAL_MODE        (1 << 2)
  49 #define MCT_L_TCON_INT_START            (1 << 1)
  50 #define MCT_L_TCON_TIMER_START          (1 << 0)
  51
  52 #endif /* __ASM_ARCH_REGS_MCT_H */