ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / arm / mach-ks8695 / include / mach / regs-timer.h
blobe620cda99d2dde1e03129b8ebecdb8d9b3ee9c74
1 /*
2 * arch/arm/mach-ks8695/include/mach/regs-timer.h
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
7 * KS8695 - Timer registers and bit definitions.
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #ifndef KS8695_TIMER_H
15 #define KS8695_TIMER_H
17 #define KS8695_TMR_OFFSET (0xF0000 + 0xE400)
18 #define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET)
19 #define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET)
23 * Timer registers
25 #define KS8695_TMCON (0x00) /* Timer Control Register */
26 #define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */
27 #define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */
28 #define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */
29 #define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */
32 /* Timer Control Register */
33 #define TMCON_T1EN (1 << 1) /* Timer 1 Enable */
34 #define TMCON_T0EN (1 << 0) /* Timer 0 Enable */
36 /* Timer0 Timeout Counter Register */
37 #define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */
40 #endif