ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / arm / mach-omap2 / sr_device.c
blob10d3c5ee80187f42560eb07d9a5f5d2ecab4c6c9
1 /*
2 * OMAP3/OMAP4 smartreflex device file
4 * Author: Thara Gopinath <thara@ti.com>
6 * Based originally on code from smartreflex.c
7 * Copyright (C) 2010 Texas Instruments, Inc.
8 * Thara Gopinath <thara@ti.com>
10 * Copyright (C) 2008 Nokia Corporation
11 * Kalle Jokiniemi
13 * Copyright (C) 2007 Texas Instruments, Inc.
14 * Lesly A M <x0080970@ti.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
21 #include <linux/err.h>
22 #include <linux/slab.h>
23 #include <linux/io.h>
25 #include <plat/omap_device.h>
27 #include "smartreflex.h"
28 #include "voltage.h"
29 #include "control.h"
30 #include "pm.h"
32 static bool sr_enable_on_init;
34 static struct omap_device_pm_latency omap_sr_latency[] = {
36 .deactivate_func = omap_device_idle_hwmods,
37 .activate_func = omap_device_enable_hwmods,
38 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST
42 /* Read EFUSE values from control registers for OMAP3430 */
43 static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
44 struct omap_sr_data *sr_data)
46 struct omap_sr_nvalue_table *nvalue_table;
47 int i, count = 0;
49 while (volt_data[count].volt_nominal)
50 count++;
52 nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
53 GFP_KERNEL);
55 for (i = 0; i < count; i++) {
56 u32 v;
58 * In OMAP4 the efuse registers are 24 bit aligned.
59 * A __raw_readl will fail for non-32 bit aligned address
60 * and hence the 8-bit read and shift.
62 if (cpu_is_omap44xx()) {
63 u16 offset = volt_data[i].sr_efuse_offs;
65 v = omap_ctrl_readb(offset) |
66 omap_ctrl_readb(offset + 1) << 8 |
67 omap_ctrl_readb(offset + 2) << 16;
68 } else {
69 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
72 nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs;
73 nvalue_table[i].nvalue = v;
76 sr_data->nvalue_table = nvalue_table;
77 sr_data->nvalue_count = count;
80 static int sr_dev_init(struct omap_hwmod *oh, void *user)
82 struct omap_sr_data *sr_data;
83 struct omap_device *od;
84 struct omap_volt_data *volt_data;
85 char *name = "smartreflex";
86 static int i;
88 sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
89 if (!sr_data) {
90 pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
91 __func__, oh->name);
92 return -ENOMEM;
95 if (!oh->vdd_name) {
96 pr_err("%s: No voltage domain specified for %s."
97 "Cannot initialize\n", __func__, oh->name);
98 goto exit;
101 sr_data->ip_type = oh->class->rev;
102 sr_data->senn_mod = 0x1;
103 sr_data->senp_mod = 0x1;
105 sr_data->voltdm = omap_voltage_domain_lookup(oh->vdd_name);
106 if (IS_ERR(sr_data->voltdm)) {
107 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
108 __func__, oh->vdd_name);
109 goto exit;
112 omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
113 if (!volt_data) {
114 pr_warning("%s: No Voltage table registerd fo VDD%d."
115 "Something really wrong\n\n", __func__, i + 1);
116 goto exit;
119 sr_set_nvalues(volt_data, sr_data);
121 sr_data->enable_on_init = sr_enable_on_init;
123 od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
124 omap_sr_latency,
125 ARRAY_SIZE(omap_sr_latency), 0);
126 if (IS_ERR(od))
127 pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
128 __func__, name, oh->name);
129 exit:
130 i++;
131 kfree(sr_data);
132 return 0;
136 * API to be called from board files to enable smartreflex
137 * autocompensation at init.
139 void __init omap_enable_smartreflex_on_init(void)
141 sr_enable_on_init = true;
144 int __init omap_devinit_smartreflex(void)
146 return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);