ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / arm / mach-pnx4008 / serial.c
blobf40961e519146d88ea39f92ca352dd9799a97211
1 /*
2 * linux/arch/arm/mach-pnx4008/serial.c
4 * PNX4008 UART initialization
6 * Copyright: MontaVista Software Inc. (c) 2005
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/io.h>
17 #include <mach/platform.h>
18 #include <mach/hardware.h>
20 #include <linux/serial_core.h>
21 #include <linux/serial_reg.h>
22 #include <mach/gpio.h>
24 #include <mach/clock.h>
26 #define UART_3 0
27 #define UART_4 1
28 #define UART_5 2
29 #define UART_6 3
30 #define UART_UNKNOWN (-1)
32 #define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE)
33 #define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE)
34 #define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE)
35 #define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
37 #define UART_FCR_OFFSET 8
38 #define UART_FIFO_SIZE 64
40 void pnx4008_uart_init(void)
42 u32 tmp;
43 int i = UART_FIFO_SIZE;
45 __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET);
46 __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET);
48 /* Send a NULL to fix the UART HW bug */
49 __raw_writel(0x00, UART5_BASE_VA);
50 __raw_writel(0x00, UART3_BASE_VA);
52 while (i--) {
53 tmp = __raw_readl(UART5_BASE_VA);
54 tmp = __raw_readl(UART3_BASE_VA);
56 __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET);
57 __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
59 /* setup wakeup interrupt */
60 start_int_set_rising_edge(SE_U3_RX_INT);
61 start_int_ack(SE_U3_RX_INT);
62 start_int_umask(SE_U3_RX_INT);
64 start_int_set_rising_edge(SE_U5_RX_INT);
65 start_int_ack(SE_U5_RX_INT);
66 start_int_umask(SE_U5_RX_INT);