ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / sparc / mm / hugetlbpage.c
blobf4e97646ce23140781a143f47a66c7ebca578bcf
1 /*
2 * SPARC64 Huge TLB page support.
4 * Copyright (C) 2002, 2003, 2006 David S. Miller (davem@davemloft.net)
5 */
7 #include <linux/init.h>
8 #include <linux/module.h>
9 #include <linux/fs.h>
10 #include <linux/mm.h>
11 #include <linux/hugetlb.h>
12 #include <linux/pagemap.h>
13 #include <linux/sysctl.h>
15 #include <asm/mman.h>
16 #include <asm/pgalloc.h>
17 #include <asm/tlb.h>
18 #include <asm/tlbflush.h>
19 #include <asm/cacheflush.h>
20 #include <asm/mmu_context.h>
22 /* Slightly simplified from the non-hugepage variant because by
23 * definition we don't have to worry about any page coloring stuff
25 #define VA_EXCLUDE_START (0x0000080000000000UL - (1UL << 32UL))
26 #define VA_EXCLUDE_END (0xfffff80000000000UL + (1UL << 32UL))
28 static unsigned long hugetlb_get_unmapped_area_bottomup(struct file *filp,
29 unsigned long addr,
30 unsigned long len,
31 unsigned long pgoff,
32 unsigned long flags)
34 struct mm_struct *mm = current->mm;
35 struct vm_area_struct * vma;
36 unsigned long task_size = TASK_SIZE;
37 unsigned long start_addr;
39 if (test_thread_flag(TIF_32BIT))
40 task_size = STACK_TOP32;
41 if (unlikely(len >= VA_EXCLUDE_START))
42 return -ENOMEM;
44 if (len > mm->cached_hole_size) {
45 start_addr = addr = mm->free_area_cache;
46 } else {
47 start_addr = addr = TASK_UNMAPPED_BASE;
48 mm->cached_hole_size = 0;
51 task_size -= len;
53 full_search:
54 addr = ALIGN(addr, HPAGE_SIZE);
56 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
57 /* At this point: (!vma || addr < vma->vm_end). */
58 if (addr < VA_EXCLUDE_START &&
59 (addr + len) >= VA_EXCLUDE_START) {
60 addr = VA_EXCLUDE_END;
61 vma = find_vma(mm, VA_EXCLUDE_END);
63 if (unlikely(task_size < addr)) {
64 if (start_addr != TASK_UNMAPPED_BASE) {
65 start_addr = addr = TASK_UNMAPPED_BASE;
66 mm->cached_hole_size = 0;
67 goto full_search;
69 return -ENOMEM;
71 if (likely(!vma || addr + len <= vma->vm_start)) {
73 * Remember the place where we stopped the search:
75 mm->free_area_cache = addr + len;
76 return addr;
78 if (addr + mm->cached_hole_size < vma->vm_start)
79 mm->cached_hole_size = vma->vm_start - addr;
81 addr = ALIGN(vma->vm_end, HPAGE_SIZE);
85 static unsigned long
86 hugetlb_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
87 const unsigned long len,
88 const unsigned long pgoff,
89 const unsigned long flags)
91 struct vm_area_struct *vma;
92 struct mm_struct *mm = current->mm;
93 unsigned long addr = addr0;
95 /* This should only ever run for 32-bit processes. */
96 BUG_ON(!test_thread_flag(TIF_32BIT));
98 /* check if free_area_cache is useful for us */
99 if (len <= mm->cached_hole_size) {
100 mm->cached_hole_size = 0;
101 mm->free_area_cache = mm->mmap_base;
104 /* either no address requested or can't fit in requested address hole */
105 addr = mm->free_area_cache & HPAGE_MASK;
107 /* make sure it can fit in the remaining address space */
108 if (likely(addr > len)) {
109 vma = find_vma(mm, addr-len);
110 if (!vma || addr <= vma->vm_start) {
111 /* remember the address as a hint for next time */
112 return (mm->free_area_cache = addr-len);
116 if (unlikely(mm->mmap_base < len))
117 goto bottomup;
119 addr = (mm->mmap_base-len) & HPAGE_MASK;
121 do {
123 * Lookup failure means no vma is above this address,
124 * else if new region fits below vma->vm_start,
125 * return with success:
127 vma = find_vma(mm, addr);
128 if (likely(!vma || addr+len <= vma->vm_start)) {
129 /* remember the address as a hint for next time */
130 return (mm->free_area_cache = addr);
133 /* remember the largest hole we saw so far */
134 if (addr + mm->cached_hole_size < vma->vm_start)
135 mm->cached_hole_size = vma->vm_start - addr;
137 /* try just below the current vma->vm_start */
138 addr = (vma->vm_start-len) & HPAGE_MASK;
139 } while (likely(len < vma->vm_start));
141 bottomup:
143 * A failed mmap() very likely causes application failure,
144 * so fall back to the bottom-up function here. This scenario
145 * can happen with large stack limits and large mmap()
146 * allocations.
148 mm->cached_hole_size = ~0UL;
149 mm->free_area_cache = TASK_UNMAPPED_BASE;
150 addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
152 * Restore the topdown base:
154 mm->free_area_cache = mm->mmap_base;
155 mm->cached_hole_size = ~0UL;
157 return addr;
160 unsigned long
161 hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
162 unsigned long len, unsigned long pgoff, unsigned long flags)
164 struct mm_struct *mm = current->mm;
165 struct vm_area_struct *vma;
166 unsigned long task_size = TASK_SIZE;
168 if (test_thread_flag(TIF_32BIT))
169 task_size = STACK_TOP32;
171 if (len & ~HPAGE_MASK)
172 return -EINVAL;
173 if (len > task_size)
174 return -ENOMEM;
176 if (flags & MAP_FIXED) {
177 if (prepare_hugepage_range(file, addr, len))
178 return -EINVAL;
179 return addr;
182 if (addr) {
183 addr = ALIGN(addr, HPAGE_SIZE);
184 vma = find_vma(mm, addr);
185 if (task_size - len >= addr &&
186 (!vma || addr + len <= vma->vm_start))
187 return addr;
189 if (mm->get_unmapped_area == arch_get_unmapped_area)
190 return hugetlb_get_unmapped_area_bottomup(file, addr, len,
191 pgoff, flags);
192 else
193 return hugetlb_get_unmapped_area_topdown(file, addr, len,
194 pgoff, flags);
197 pte_t *huge_pte_alloc(struct mm_struct *mm,
198 unsigned long addr, unsigned long sz)
200 pgd_t *pgd;
201 pud_t *pud;
202 pmd_t *pmd;
203 pte_t *pte = NULL;
205 /* We must align the address, because our caller will run
206 * set_huge_pte_at() on whatever we return, which writes out
207 * all of the sub-ptes for the hugepage range. So we have
208 * to give it the first such sub-pte.
210 addr &= HPAGE_MASK;
212 pgd = pgd_offset(mm, addr);
213 pud = pud_alloc(mm, pgd, addr);
214 if (pud) {
215 pmd = pmd_alloc(mm, pud, addr);
216 if (pmd)
217 pte = pte_alloc_map(mm, NULL, pmd, addr);
219 return pte;
222 pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
224 pgd_t *pgd;
225 pud_t *pud;
226 pmd_t *pmd;
227 pte_t *pte = NULL;
229 addr &= HPAGE_MASK;
231 pgd = pgd_offset(mm, addr);
232 if (!pgd_none(*pgd)) {
233 pud = pud_offset(pgd, addr);
234 if (!pud_none(*pud)) {
235 pmd = pmd_offset(pud, addr);
236 if (!pmd_none(*pmd))
237 pte = pte_offset_map(pmd, addr);
240 return pte;
243 int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
245 return 0;
248 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
249 pte_t *ptep, pte_t entry)
251 int i;
253 if (!pte_present(*ptep) && pte_present(entry))
254 mm->context.huge_pte_count++;
256 addr &= HPAGE_MASK;
257 for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
258 set_pte_at(mm, addr, ptep, entry);
259 ptep++;
260 addr += PAGE_SIZE;
261 pte_val(entry) += PAGE_SIZE;
265 pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
266 pte_t *ptep)
268 pte_t entry;
269 int i;
271 entry = *ptep;
272 if (pte_present(entry))
273 mm->context.huge_pte_count--;
275 addr &= HPAGE_MASK;
277 for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
278 pte_clear(mm, addr, ptep);
279 addr += PAGE_SIZE;
280 ptep++;
283 return entry;
286 struct page *follow_huge_addr(struct mm_struct *mm,
287 unsigned long address, int write)
289 return ERR_PTR(-EINVAL);
292 int pmd_huge(pmd_t pmd)
294 return 0;
297 int pud_huge(pud_t pud)
299 return 0;
302 struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
303 pmd_t *pmd, int write)
305 return NULL;
308 static void context_reload(void *__data)
310 struct mm_struct *mm = __data;
312 if (mm == current->mm)
313 load_secondary_context(mm);
316 void hugetlb_prefault_arch_hook(struct mm_struct *mm)
318 struct tsb_config *tp = &mm->context.tsb_block[MM_TSB_HUGE];
320 if (likely(tp->tsb != NULL))
321 return;
323 tsb_grow(mm, MM_TSB_HUGE, 0);
324 tsb_context_switch(mm);
325 smp_tsb_sync(mm);
327 /* On UltraSPARC-III+ and later, configure the second half of
328 * the Data-TLB for huge pages.
330 if (tlb_type == cheetah_plus) {
331 unsigned long ctx;
333 spin_lock(&ctx_alloc_lock);
334 ctx = mm->context.sparc64_ctx_val;
335 ctx &= ~CTX_PGSZ_MASK;
336 ctx |= CTX_PGSZ_BASE << CTX_PGSZ0_SHIFT;
337 ctx |= CTX_PGSZ_HUGE << CTX_PGSZ1_SHIFT;
339 if (ctx != mm->context.sparc64_ctx_val) {
340 /* When changing the page size fields, we
341 * must perform a context flush so that no
342 * stale entries match. This flush must
343 * occur with the original context register
344 * settings.
346 do_flush_tlb_mm(mm);
348 /* Reload the context register of all processors
349 * also executing in this address space.
351 mm->context.sparc64_ctx_val = ctx;
352 on_each_cpu(context_reload, mm, 0);
354 spin_unlock(&ctx_alloc_lock);