ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / x86 / kernel / microcode_amd.c
blobb727450f5d78fcdca65083704c4e38abc6b307fb
1 /*
2 * AMD CPU Microcode Update Driver for Linux
3 * Copyright (C) 2008 Advanced Micro Devices Inc.
5 * Author: Peter Oruba <peter.oruba@amd.com>
7 * Based on work by:
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors.
13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/firmware.h>
20 #include <linux/pci_ids.h>
21 #include <linux/uaccess.h>
22 #include <linux/vmalloc.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
27 #include <asm/microcode.h>
28 #include <asm/processor.h>
29 #include <asm/msr.h>
31 MODULE_DESCRIPTION("AMD Microcode Update Driver");
32 MODULE_AUTHOR("Peter Oruba");
33 MODULE_LICENSE("GPL v2");
35 #define UCODE_MAGIC 0x00414d44
36 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
37 #define UCODE_UCODE_TYPE 0x00000001
39 struct equiv_cpu_entry {
40 u32 installed_cpu;
41 u32 fixed_errata_mask;
42 u32 fixed_errata_compare;
43 u16 equiv_cpu;
44 u16 res;
45 } __attribute__((packed));
47 struct microcode_header_amd {
48 u32 data_code;
49 u32 patch_id;
50 u16 mc_patch_data_id;
51 u8 mc_patch_data_len;
52 u8 init_flag;
53 u32 mc_patch_data_checksum;
54 u32 nb_dev_id;
55 u32 sb_dev_id;
56 u16 processor_rev_id;
57 u8 nb_rev_id;
58 u8 sb_rev_id;
59 u8 bios_api_rev;
60 u8 reserved1[3];
61 u32 match_reg[8];
62 } __attribute__((packed));
64 struct microcode_amd {
65 struct microcode_header_amd hdr;
66 unsigned int mpb[0];
69 #define UCODE_CONTAINER_SECTION_HDR 8
70 #define UCODE_CONTAINER_HEADER_SIZE 12
72 static struct equiv_cpu_entry *equiv_cpu_table;
74 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
76 struct cpuinfo_x86 *c = &cpu_data(cpu);
77 u32 dummy;
79 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
80 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
81 return -1;
84 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
85 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
87 return 0;
90 static int get_matching_microcode(int cpu, struct microcode_header_amd *mc_hdr,
91 int rev)
93 unsigned int current_cpu_id;
94 u16 equiv_cpu_id = 0;
95 unsigned int i = 0;
97 BUG_ON(equiv_cpu_table == NULL);
98 current_cpu_id = cpuid_eax(0x00000001);
100 while (equiv_cpu_table[i].installed_cpu != 0) {
101 if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
102 equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
103 break;
105 i++;
108 if (!equiv_cpu_id)
109 return 0;
111 if (mc_hdr->processor_rev_id != equiv_cpu_id)
112 return 0;
114 /* ucode might be chipset specific -- currently we don't support this */
115 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
116 pr_err("CPU%d: chipset specific code not yet supported\n",
117 cpu);
118 return 0;
121 if (mc_hdr->patch_id <= rev)
122 return 0;
124 return 1;
127 static int apply_microcode_amd(int cpu)
129 u32 rev, dummy;
130 int cpu_num = raw_smp_processor_id();
131 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
132 struct microcode_amd *mc_amd = uci->mc;
134 /* We should bind the task to the CPU */
135 BUG_ON(cpu_num != cpu);
137 if (mc_amd == NULL)
138 return 0;
140 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
141 /* get patch id after patching */
142 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
144 /* check current patch id and patch's id for match */
145 if (rev != mc_amd->hdr.patch_id) {
146 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
147 cpu, mc_amd->hdr.patch_id);
148 return -1;
151 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
152 uci->cpu_sig.rev = rev;
154 return 0;
157 static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
159 struct cpuinfo_x86 *c = &cpu_data(cpu);
160 unsigned int max_size, actual_size;
162 #define F1XH_MPB_MAX_SIZE 2048
163 #define F14H_MPB_MAX_SIZE 1824
164 #define F15H_MPB_MAX_SIZE 4096
166 switch (c->x86) {
167 case 0x14:
168 max_size = F14H_MPB_MAX_SIZE;
169 break;
170 case 0x15:
171 max_size = F15H_MPB_MAX_SIZE;
172 break;
173 default:
174 max_size = F1XH_MPB_MAX_SIZE;
175 break;
178 actual_size = buf[4] + (buf[5] << 8);
180 if (actual_size > size || actual_size > max_size) {
181 pr_err("section size mismatch\n");
182 return 0;
185 return actual_size;
188 static struct microcode_header_amd *
189 get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
191 struct microcode_header_amd *mc = NULL;
192 unsigned int actual_size = 0;
194 if (buf[0] != UCODE_UCODE_TYPE) {
195 pr_err("invalid type field in container file section header\n");
196 goto out;
199 actual_size = verify_ucode_size(cpu, buf, size);
200 if (!actual_size)
201 goto out;
203 mc = vzalloc(actual_size);
204 if (!mc)
205 goto out;
207 get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR, actual_size);
208 *mc_size = actual_size + UCODE_CONTAINER_SECTION_HDR;
210 out:
211 return mc;
214 static int install_equiv_cpu_table(const u8 *buf)
216 unsigned int *ibuf = (unsigned int *)buf;
217 unsigned int type = ibuf[1];
218 unsigned int size = ibuf[2];
220 if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
221 pr_err("empty section/"
222 "invalid type field in container file section header\n");
223 return -EINVAL;
226 equiv_cpu_table = vmalloc(size);
227 if (!equiv_cpu_table) {
228 pr_err("failed to allocate equivalent CPU table\n");
229 return -ENOMEM;
232 get_ucode_data(equiv_cpu_table, buf + UCODE_CONTAINER_HEADER_SIZE, size);
234 return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
237 static void free_equiv_cpu_table(void)
239 vfree(equiv_cpu_table);
240 equiv_cpu_table = NULL;
243 static enum ucode_state
244 generic_load_microcode(int cpu, const u8 *data, size_t size)
246 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
247 struct microcode_header_amd *mc_hdr = NULL;
248 unsigned int mc_size, leftover;
249 int offset;
250 const u8 *ucode_ptr = data;
251 void *new_mc = NULL;
252 unsigned int new_rev = uci->cpu_sig.rev;
253 enum ucode_state state = UCODE_OK;
255 offset = install_equiv_cpu_table(ucode_ptr);
256 if (offset < 0) {
257 pr_err("failed to create equivalent cpu table\n");
258 return UCODE_ERROR;
261 ucode_ptr += offset;
262 leftover = size - offset;
264 while (leftover) {
265 mc_hdr = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
266 if (!mc_hdr)
267 break;
269 if (get_matching_microcode(cpu, mc_hdr, new_rev)) {
270 vfree(new_mc);
271 new_rev = mc_hdr->patch_id;
272 new_mc = mc_hdr;
273 } else
274 vfree(mc_hdr);
276 ucode_ptr += mc_size;
277 leftover -= mc_size;
280 if (!new_mc) {
281 state = UCODE_NFOUND;
282 goto free_table;
285 if (!leftover) {
286 vfree(uci->mc);
287 uci->mc = new_mc;
288 pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
289 cpu, uci->cpu_sig.rev, new_rev);
290 } else {
291 vfree(new_mc);
292 state = UCODE_ERROR;
295 free_table:
296 free_equiv_cpu_table();
298 return state;
302 * AMD microcode firmware naming convention, up to family 15h they are in
303 * the legacy file:
305 * amd-ucode/microcode_amd.bin
307 * This legacy file is always smaller than 2K in size.
309 * Starting at family 15h they are in family specific firmware files:
311 * amd-ucode/microcode_amd_fam15h.bin
312 * amd-ucode/microcode_amd_fam16h.bin
313 * ...
315 * These might be larger than 2K.
317 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
319 char fw_name[36] = "amd-ucode/microcode_amd.bin";
320 const struct firmware *fw;
321 enum ucode_state ret = UCODE_NFOUND;
322 struct cpuinfo_x86 *c = &cpu_data(cpu);
324 if (c->x86 >= 0x15)
325 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
327 if (request_firmware(&fw, (const char *)fw_name, device)) {
328 pr_err("failed to load file %s\n", fw_name);
329 goto out;
332 ret = UCODE_ERROR;
333 if (*(u32 *)fw->data != UCODE_MAGIC) {
334 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
335 goto fw_release;
338 ret = generic_load_microcode(cpu, fw->data, fw->size);
340 fw_release:
341 release_firmware(fw);
343 out:
344 return ret;
347 static enum ucode_state
348 request_microcode_user(int cpu, const void __user *buf, size_t size)
350 pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
351 return UCODE_ERROR;
354 static void microcode_fini_cpu_amd(int cpu)
356 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
358 vfree(uci->mc);
359 uci->mc = NULL;
362 static struct microcode_ops microcode_amd_ops = {
363 .request_microcode_user = request_microcode_user,
364 .request_microcode_fw = request_microcode_amd,
365 .collect_cpu_info = collect_cpu_info_amd,
366 .apply_microcode = apply_microcode_amd,
367 .microcode_fini_cpu = microcode_fini_cpu_amd,
370 struct microcode_ops * __init init_amd_microcode(void)
372 return &microcode_amd_ops;