2 * Copyright (C) 2008-2010
4 * - Kurt Van Dijck, EIA Electronics
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/firmware.h>
21 #include <linux/sched.h>
22 #include <asm/div64.h>
27 * low level DPRAM command.
28 * Make sure that card->dpram[DPRAM_FCT_HOST] is preset
30 static int _softing_fct_cmd(struct softing
*card
, int16_t cmd
, uint16_t vector
,
36 iowrite16(cmd
, &card
->dpram
[DPRAM_FCT_PARAM
]);
37 iowrite8(vector
>> 8, &card
->dpram
[DPRAM_FCT_HOST
+ 1]);
38 iowrite8(vector
, &card
->dpram
[DPRAM_FCT_HOST
]);
39 /* be sure to flush this to the card */
41 stamp
= jiffies
+ 1 * HZ
;
44 /* DPRAM_FCT_HOST is _not_ aligned */
45 ret
= ioread8(&card
->dpram
[DPRAM_FCT_HOST
]) +
46 (ioread8(&card
->dpram
[DPRAM_FCT_HOST
+ 1]) << 8);
47 /* don't have any cached variables */
50 /* read return-value now */
51 return ioread16(&card
->dpram
[DPRAM_FCT_RESULT
]);
53 if ((ret
!= vector
) || time_after(jiffies
, stamp
))
55 /* process context => relax */
56 usleep_range(500, 10000);
59 ret
= (ret
== RES_NONE
) ? -ETIMEDOUT
: -ECANCELED
;
60 dev_alert(&card
->pdev
->dev
, "firmware %s failed (%i)\n", msg
, ret
);
64 static int softing_fct_cmd(struct softing
*card
, int16_t cmd
, const char *msg
)
68 ret
= _softing_fct_cmd(card
, cmd
, 0, msg
);
70 dev_alert(&card
->pdev
->dev
, "%s returned %u\n", msg
, ret
);
76 int softing_bootloader_command(struct softing
*card
, int16_t cmd
,
82 iowrite16(RES_NONE
, &card
->dpram
[DPRAM_RECEIPT
]);
83 iowrite16(cmd
, &card
->dpram
[DPRAM_COMMAND
]);
84 /* be sure to flush this to the card */
86 stamp
= jiffies
+ 3 * HZ
;
89 ret
= ioread16(&card
->dpram
[DPRAM_RECEIPT
]);
90 /* don't have any cached variables */
94 if (time_after(jiffies
, stamp
))
96 /* process context => relax */
97 usleep_range(500, 10000);
98 } while (!signal_pending(current
));
100 ret
= (ret
== RES_NONE
) ? -ETIMEDOUT
: -ECANCELED
;
101 dev_alert(&card
->pdev
->dev
, "bootloader %s failed (%i)\n", msg
, ret
);
105 static int fw_parse(const uint8_t **pmem
, uint16_t *ptype
, uint32_t *paddr
,
106 uint16_t *plen
, const uint8_t **pdat
)
108 uint16_t checksum
[2];
113 * firmware records are a binary, unaligned stream composed of:
119 * all values in little endian.
120 * We could define a struct for this, with __attribute__((packed)),
121 * but would that solve the alignment in _all_ cases (cfr. the
122 * struct itself may be an odd address)?
124 * I chose to use leXX_to_cpup() since this solves both
125 * endianness & alignment.
128 *ptype
= le16_to_cpup((void *)&mem
[0]);
129 *paddr
= le32_to_cpup((void *)&mem
[2]);
130 *plen
= le16_to_cpup((void *)&mem
[6]);
132 /* verify checksum */
133 end
= &mem
[8 + *plen
];
134 checksum
[0] = le16_to_cpup((void *)end
);
135 for (checksum
[1] = 0; mem
< end
; ++mem
)
137 if (checksum
[0] != checksum
[1])
144 int softing_load_fw(const char *file
, struct softing
*card
,
145 __iomem
uint8_t *dpram
, unsigned int size
, int offset
)
147 const struct firmware
*fw
;
149 const uint8_t *mem
, *end
, *dat
;
156 ret
= request_firmware(&fw
, file
, &card
->pdev
->dev
);
159 dev_dbg(&card
->pdev
->dev
, "%s, firmware(%s) got %u bytes"
160 ", offset %c0x%04x\n",
161 card
->pdat
->name
, file
, (unsigned int)fw
->size
,
162 (offset
>= 0) ? '+' : '-', (unsigned int)abs(offset
));
163 /* parse the firmware */
165 end
= &mem
[fw
->size
];
166 /* look for header record */
167 ret
= fw_parse(&mem
, &type
, &addr
, &len
, &dat
);
172 if (strncmp("Structured Binary Format, Softing GmbH" , dat
, len
)) {
176 /* ok, we had a header */
178 ret
= fw_parse(&mem
, &type
, &addr
, &len
, &dat
);
182 /* start address, not used here */
184 } else if (type
== 1) {
188 } else if (type
!= 0) {
193 if ((addr
+ len
+ offset
) > size
)
195 memcpy_toio(&dpram
[addr
+ offset
], dat
, len
);
196 /* be sure to flush caches from IO space */
200 buflen
= (len
+ (1024-1)) & ~(1024-1);
201 buf
= krealloc(buf
, buflen
, GFP_KERNEL
);
207 /* verify record data */
208 memcpy_fromio(buf
, &dpram
[addr
+ offset
], len
);
209 if (memcmp(buf
, dat
, len
)) {
211 dev_alert(&card
->pdev
->dev
, "DPRAM readback failed\n");
217 /* no end record seen */
222 release_firmware(fw
);
224 dev_info(&card
->pdev
->dev
, "firmware %s failed\n", file
);
228 int softing_load_app_fw(const char *file
, struct softing
*card
)
230 const struct firmware
*fw
;
231 const uint8_t *mem
, *end
, *dat
;
234 uint32_t addr
, start_addr
= 0;
235 unsigned int sum
, rx_sum
;
236 int8_t type_end
= 0, type_entrypoint
= 0;
238 ret
= request_firmware(&fw
, file
, &card
->pdev
->dev
);
240 dev_alert(&card
->pdev
->dev
, "request_firmware(%s) got %i\n",
244 dev_dbg(&card
->pdev
->dev
, "firmware(%s) got %lu bytes\n",
245 file
, (unsigned long)fw
->size
);
246 /* parse the firmware */
248 end
= &mem
[fw
->size
];
249 /* look for header record */
250 ret
= fw_parse(&mem
, &type
, &addr
, &len
, &dat
);
254 if (type
!= 0xffff) {
255 dev_alert(&card
->pdev
->dev
, "firmware starts with type 0x%x\n",
259 if (strncmp("Structured Binary Format, Softing GmbH", dat
, len
)) {
260 dev_alert(&card
->pdev
->dev
, "firmware string '%.*s' fault\n",
264 /* ok, we had a header */
266 ret
= fw_parse(&mem
, &type
, &addr
, &len
, &dat
);
275 } else if (type
== 1) {
279 } else if (type
!= 0) {
280 dev_alert(&card
->pdev
->dev
,
281 "unknown record type 0x%04x\n", type
);
287 for (sum
= 0, j
= 0; j
< len
; ++j
)
289 /* work in 16bit (target) */
292 memcpy_toio(&card
->dpram
[card
->pdat
->app
.offs
], dat
, len
);
293 iowrite32(card
->pdat
->app
.offs
+ card
->pdat
->app
.addr
,
294 &card
->dpram
[DPRAM_COMMAND
+ 2]);
295 iowrite32(addr
, &card
->dpram
[DPRAM_COMMAND
+ 6]);
296 iowrite16(len
, &card
->dpram
[DPRAM_COMMAND
+ 10]);
297 iowrite8(1, &card
->dpram
[DPRAM_COMMAND
+ 12]);
298 ret
= softing_bootloader_command(card
, 1, "loading app.");
301 /* verify checksum */
302 rx_sum
= ioread16(&card
->dpram
[DPRAM_RECEIPT
+ 2]);
304 dev_alert(&card
->pdev
->dev
, "SRAM seems to be damaged"
305 ", wanted 0x%04x, got 0x%04x\n", sum
, rx_sum
);
310 if (!type_end
|| !type_entrypoint
)
312 /* start application in card */
313 iowrite32(start_addr
, &card
->dpram
[DPRAM_COMMAND
+ 2]);
314 iowrite8(1, &card
->dpram
[DPRAM_COMMAND
+ 6]);
315 ret
= softing_bootloader_command(card
, 3, "start app.");
320 release_firmware(fw
);
322 dev_info(&card
->pdev
->dev
, "firmware %s failed\n", file
);
326 static int softing_reset_chip(struct softing
*card
)
332 iowrite8(0, &card
->dpram
[DPRAM_RESET_RX_FIFO
]);
333 iowrite8(0, &card
->dpram
[DPRAM_RESET_RX_FIFO
+1]);
334 iowrite8(1, &card
->dpram
[DPRAM_RESET
]);
335 iowrite8(0, &card
->dpram
[DPRAM_RESET
+1]);
337 ret
= softing_fct_cmd(card
, 0, "reset_can");
340 if (signal_pending(current
))
341 /* don't wait any longer */
344 card
->tx
.pending
= 0;
348 int softing_chip_poweron(struct softing
*card
)
352 ret
= _softing_fct_cmd(card
, 99, 0x55, "sync-a");
356 ret
= _softing_fct_cmd(card
, 99, 0xaa, "sync-b");
360 ret
= softing_reset_chip(card
);
364 ret
= softing_fct_cmd(card
, 43, "get_serial_number");
367 card
->id
.serial
= ioread32(&card
->dpram
[DPRAM_FCT_PARAM
]);
369 ret
= softing_fct_cmd(card
, 12, "get_version");
372 card
->id
.fw_version
= ioread16(&card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
373 card
->id
.hw_version
= ioread16(&card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
374 card
->id
.license
= ioread16(&card
->dpram
[DPRAM_FCT_PARAM
+ 6]);
375 card
->id
.chip
[0] = ioread16(&card
->dpram
[DPRAM_FCT_PARAM
+ 8]);
376 card
->id
.chip
[1] = ioread16(&card
->dpram
[DPRAM_FCT_PARAM
+ 10]);
382 static void softing_initialize_timestamp(struct softing
*card
)
386 card
->ts_ref
= ktime_get();
388 /* 16MHz is the reference */
389 ovf
= 0x100000000ULL
* 16;
390 do_div(ovf
, card
->pdat
->freq
?: 16);
392 card
->ts_overflow
= ktime_add_us(ktime_set(0, 0), ovf
);
395 ktime_t
softing_raw2ktime(struct softing
*card
, u32 raw
)
398 ktime_t now
, real_offset
;
403 real_offset
= ktime_sub(ktime_get_real(), now
);
405 /* find nsec from card */
407 do_div(rawl
, card
->pdat
->freq
?: 16);
408 target
= ktime_add_us(card
->ts_ref
, rawl
);
409 /* test for overflows */
410 tmp
= ktime_add(target
, card
->ts_overflow
);
411 while (unlikely(ktime_to_ns(tmp
) > ktime_to_ns(now
))) {
412 card
->ts_ref
= ktime_add(card
->ts_ref
, card
->ts_overflow
);
414 tmp
= ktime_add(target
, card
->ts_overflow
);
416 return ktime_add(target
, real_offset
);
419 static inline int softing_error_reporting(struct net_device
*netdev
)
421 struct softing_priv
*priv
= netdev_priv(netdev
);
423 return (priv
->can
.ctrlmode
& CAN_CTRLMODE_BERR_REPORTING
)
427 int softing_startstop(struct net_device
*dev
, int up
)
430 struct softing
*card
;
431 struct softing_priv
*priv
;
432 struct net_device
*netdev
;
433 int bus_bitmask_start
;
434 int j
, error_reporting
;
435 struct can_frame msg
;
436 const struct can_bittiming
*bt
;
438 priv
= netdev_priv(dev
);
444 ret
= mutex_lock_interruptible(&card
->fw
.lock
);
448 bus_bitmask_start
= 0;
450 /* prepare to start this bus as well */
451 bus_bitmask_start
|= (1 << priv
->index
);
452 /* bring netdevs down */
453 for (j
= 0; j
< ARRAY_SIZE(card
->net
); ++j
) {
454 netdev
= card
->net
[j
];
457 priv
= netdev_priv(netdev
);
460 netif_stop_queue(netdev
);
462 if (netif_running(netdev
)) {
464 bus_bitmask_start
|= (1 << j
);
465 priv
->tx
.pending
= 0;
466 priv
->tx
.echo_put
= 0;
467 priv
->tx
.echo_get
= 0;
469 * this bus' may just have called open_candev()
470 * which is rather stupid to call close_candev()
472 * but we may come here from busoff recovery too
473 * in which case the echo_skb _needs_ flushing too.
474 * just be sure to call open_candev() again
476 close_candev(netdev
);
478 priv
->can
.state
= CAN_STATE_STOPPED
;
480 card
->tx
.pending
= 0;
482 softing_enable_irq(card
, 0);
483 ret
= softing_reset_chip(card
);
486 if (!bus_bitmask_start
)
487 /* no busses to be brought up */
490 if ((bus_bitmask_start
& 1) && (bus_bitmask_start
& 2)
491 && (softing_error_reporting(card
->net
[0])
492 != softing_error_reporting(card
->net
[1]))) {
493 dev_alert(&card
->pdev
->dev
,
494 "err_reporting flag differs for busses\n");
498 if (bus_bitmask_start
& 1) {
499 netdev
= card
->net
[0];
500 priv
= netdev_priv(netdev
);
501 error_reporting
+= softing_error_reporting(netdev
);
503 bt
= &priv
->can
.bittiming
;
504 iowrite16(bt
->brp
, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
505 iowrite16(bt
->sjw
, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
506 iowrite16(bt
->phase_seg1
+ bt
->prop_seg
,
507 &card
->dpram
[DPRAM_FCT_PARAM
+ 6]);
508 iowrite16(bt
->phase_seg2
, &card
->dpram
[DPRAM_FCT_PARAM
+ 8]);
509 iowrite16((priv
->can
.ctrlmode
& CAN_CTRLMODE_3_SAMPLES
) ? 1 : 0,
510 &card
->dpram
[DPRAM_FCT_PARAM
+ 10]);
511 ret
= softing_fct_cmd(card
, 1, "initialize_chip[0]");
515 iowrite16(0, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
516 iowrite16(0, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
517 ret
= softing_fct_cmd(card
, 3, "set_mode[0]");
521 /* 11bit id & mask */
522 iowrite16(0x0000, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
523 iowrite16(0x07ff, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
524 /* 29bit id.lo & mask.lo & id.hi & mask.hi */
525 iowrite16(0x0000, &card
->dpram
[DPRAM_FCT_PARAM
+ 6]);
526 iowrite16(0xffff, &card
->dpram
[DPRAM_FCT_PARAM
+ 8]);
527 iowrite16(0x0000, &card
->dpram
[DPRAM_FCT_PARAM
+ 10]);
528 iowrite16(0x1fff, &card
->dpram
[DPRAM_FCT_PARAM
+ 12]);
529 ret
= softing_fct_cmd(card
, 7, "set_filter[0]");
532 /* set output control */
533 iowrite16(priv
->output
, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
534 ret
= softing_fct_cmd(card
, 5, "set_output[0]");
538 if (bus_bitmask_start
& 2) {
539 netdev
= card
->net
[1];
540 priv
= netdev_priv(netdev
);
541 error_reporting
+= softing_error_reporting(netdev
);
543 bt
= &priv
->can
.bittiming
;
544 iowrite16(bt
->brp
, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
545 iowrite16(bt
->sjw
, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
546 iowrite16(bt
->phase_seg1
+ bt
->prop_seg
,
547 &card
->dpram
[DPRAM_FCT_PARAM
+ 6]);
548 iowrite16(bt
->phase_seg2
, &card
->dpram
[DPRAM_FCT_PARAM
+ 8]);
549 iowrite16((priv
->can
.ctrlmode
& CAN_CTRLMODE_3_SAMPLES
) ? 1 : 0,
550 &card
->dpram
[DPRAM_FCT_PARAM
+ 10]);
551 ret
= softing_fct_cmd(card
, 2, "initialize_chip[1]");
555 iowrite16(0, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
556 iowrite16(0, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
557 ret
= softing_fct_cmd(card
, 4, "set_mode[1]");
561 /* 11bit id & mask */
562 iowrite16(0x0000, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
563 iowrite16(0x07ff, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
564 /* 29bit id.lo & mask.lo & id.hi & mask.hi */
565 iowrite16(0x0000, &card
->dpram
[DPRAM_FCT_PARAM
+ 6]);
566 iowrite16(0xffff, &card
->dpram
[DPRAM_FCT_PARAM
+ 8]);
567 iowrite16(0x0000, &card
->dpram
[DPRAM_FCT_PARAM
+ 10]);
568 iowrite16(0x1fff, &card
->dpram
[DPRAM_FCT_PARAM
+ 12]);
569 ret
= softing_fct_cmd(card
, 8, "set_filter[1]");
572 /* set output control2 */
573 iowrite16(priv
->output
, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
574 ret
= softing_fct_cmd(card
, 6, "set_output[1]");
578 /* enable_error_frame */
580 * Error reporting is switched off at the moment since
581 * the receiving of them is not yet 100% verified
582 * This should be enabled sooner or later
584 if (error_reporting) {
585 ret = softing_fct_cmd(card, 51, "enable_error_frame");
590 /* initialize interface */
591 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 2]);
592 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 4]);
593 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 6]);
594 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 8]);
595 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 10]);
596 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 12]);
597 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 14]);
598 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 16]);
599 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 18]);
600 iowrite16(1, &card
->dpram
[DPRAM_FCT_PARAM
+ 20]);
601 ret
= softing_fct_cmd(card
, 17, "initialize_interface");
605 ret
= softing_fct_cmd(card
, 36, "enable_fifo");
608 /* enable fifo tx ack */
609 ret
= softing_fct_cmd(card
, 13, "fifo_tx_ack[0]");
612 /* enable fifo tx ack2 */
613 ret
= softing_fct_cmd(card
, 14, "fifo_tx_ack[1]");
617 ret
= softing_fct_cmd(card
, 11, "start_chip");
620 iowrite8(0, &card
->dpram
[DPRAM_INFO_BUSSTATE
]);
621 iowrite8(0, &card
->dpram
[DPRAM_INFO_BUSSTATE2
]);
622 if (card
->pdat
->generation
< 2) {
623 iowrite8(0, &card
->dpram
[DPRAM_V2_IRQ_TOHOST
]);
624 /* flush the DPRAM caches */
628 softing_initialize_timestamp(card
);
631 * do socketcan notifications/status changes
632 * from here, no errors should occur, or the failed: part
635 memset(&msg
, 0, sizeof(msg
));
636 msg
.can_id
= CAN_ERR_FLAG
| CAN_ERR_RESTARTED
;
637 msg
.can_dlc
= CAN_ERR_DLC
;
638 for (j
= 0; j
< ARRAY_SIZE(card
->net
); ++j
) {
639 if (!(bus_bitmask_start
& (1 << j
)))
641 netdev
= card
->net
[j
];
644 priv
= netdev_priv(netdev
);
645 priv
->can
.state
= CAN_STATE_ERROR_ACTIVE
;
648 /* notify other busses on the restart */
649 softing_netdev_rx(netdev
, &msg
, ktime_set(0, 0));
650 ++priv
->can
.can_stats
.restarts
;
652 netif_wake_queue(netdev
);
655 /* enable interrupts */
656 ret
= softing_enable_irq(card
, 1);
660 mutex_unlock(&card
->fw
.lock
);
665 softing_enable_irq(card
, 0);
666 softing_reset_chip(card
);
667 mutex_unlock(&card
->fw
.lock
);
668 /* bring all other interfaces down */
669 for (j
= 0; j
< ARRAY_SIZE(card
->net
); ++j
) {
670 netdev
= card
->net
[j
];
678 int softing_default_output(struct net_device
*netdev
)
680 struct softing_priv
*priv
= netdev_priv(netdev
);
681 struct softing
*card
= priv
->card
;
683 switch (priv
->chip
) {
685 return (card
->pdat
->generation
< 2) ? 0xfb : 0xfa;