drivers/i2c/busses/i2c-s3c2410.c

   1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
   2  *
   3  * Copyright (C) 2004,2005,2009 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 I2C Controller
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21 */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25
  26 #include <linux/i2c.h>
  27 #include <linux/init.h>
  28 #include <linux/time.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/delay.h>
  31 #include <linux/errno.h>
  32 #include <linux/err.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/pm_runtime.h>
  35 #include <linux/clk.h>
  36 #include <linux/cpufreq.h>
  37 #include <linux/slab.h>
  38 #include <linux/io.h>
  39 #include <linux/of_i2c.h>
  40 #include <linux/of_gpio.h>
  41
  42 #include <asm/irq.h>
  43
  44 #include <plat/regs-iic.h>
  45 #include <plat/iic.h>
  46
  47 /* i2c controller state */
  48
  49 enum s3c24xx_i2c_state {
  50         STATE_IDLE,
  51         STATE_START,
  52         STATE_READ,
  53         STATE_WRITE,
  54         STATE_STOP
  55 };
  56
  57 enum s3c24xx_i2c_type {
  58         TYPE_S3C2410,
  59         TYPE_S3C2440,
  60 };
  61
  62 struct s3c24xx_i2c {
  63         spinlock_t              lock;
  64         wait_queue_head_t       wait;
  65         unsigned int            suspended:1;
  66
  67         struct i2c_msg          *msg;
  68         unsigned int            msg_num;
  69         unsigned int            msg_idx;
  70         unsigned int            msg_ptr;
  71
  72         unsigned int            tx_setup;
  73         unsigned int            irq;
  74
  75         enum s3c24xx_i2c_state  state;
  76         unsigned long           clkrate;
  77
  78         void __iomem            *regs;
  79         struct clk              *clk;
  80         struct device           *dev;
  81         struct resource         *ioarea;
  82         struct i2c_adapter      adap;
  83
  84         struct s3c2410_platform_i2c     *pdata;
  85         int                     gpios[2];
  86 #ifdef CONFIG_CPU_FREQ
  87         struct notifier_block   freq_transition;
  88 #endif
  89 };
  90
  91 /* default platform data removed, dev should always carry data. */
  92
  93 /* s3c24xx_i2c_is2440()
  94  *
  95  * return true is this is an s3c2440
  96 */
  97
  98 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
  99 {
 100         struct platform_device *pdev = to_platform_device(i2c->dev);
 101         enum s3c24xx_i2c_type type;
 102
 103 #ifdef CONFIG_OF
 104         if (i2c->dev->of_node)
 105                 return of_device_is_compatible(i2c->dev->of_node,
 106                                 "samsung,s3c2440-i2c");
 107 #endif
 108
 109         type = platform_get_device_id(pdev)->driver_data;
 110         return type == TYPE_S3C2440;
 111 }
 112
 113 /* s3c24xx_i2c_master_complete
 114  *
 115  * complete the message and wake up the caller, using the given return code,
 116  * or zero to mean ok.
 117 */
 118
 119 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
 120 {
 121         dev_dbg(i2c->dev, "master_complete %d\n", ret);
 122
 123         i2c->msg_ptr = 0;
 124         i2c->msg = NULL;
 125         i2c->msg_idx++;
 126         i2c->msg_num = 0;
 127         if (ret)
 128                 i2c->msg_idx = ret;
 129
 130         wake_up(&i2c->wait);
 131 }
 132
 133 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
 134 {
 135         unsigned long tmp;
 136
 137         tmp = readl(i2c->regs + S3C2410_IICCON);
 138         writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
 139 }
 140
 141 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
 142 {
 143         unsigned long tmp;
 144
 145         tmp = readl(i2c->regs + S3C2410_IICCON);
 146         writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
 147 }
 148
 149 /* irq enable/disable functions */
 150
 151 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
 152 {
 153         unsigned long tmp;
 154
 155         tmp = readl(i2c->regs + S3C2410_IICCON);
 156         writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
 157 }
 158
 159 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
 160 {
 161         unsigned long tmp;
 162
 163         tmp = readl(i2c->regs + S3C2410_IICCON);
 164         writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
 165 }
 166
 167
 168 /* s3c24xx_i2c_message_start
 169  *
 170  * put the start of a message onto the bus
 171 */
 172
 173 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
 174                                       struct i2c_msg *msg)
 175 {
 176         unsigned int addr = (msg->addr & 0x7f) << 1;
 177         unsigned long stat;
 178         unsigned long iiccon;
 179
 180         stat = 0;
 181         stat |=  S3C2410_IICSTAT_TXRXEN;
 182
 183         if (msg->flags & I2C_M_RD) {
 184                 stat |= S3C2410_IICSTAT_MASTER_RX;
 185                 addr |= 1;
 186         } else
 187                 stat |= S3C2410_IICSTAT_MASTER_TX;
 188
 189         if (msg->flags & I2C_M_REV_DIR_ADDR)
 190                 addr ^= 1;
 191
 192         /* todo - check for wether ack wanted or not */
 193         s3c24xx_i2c_enable_ack(i2c);
 194
 195         iiccon = readl(i2c->regs + S3C2410_IICCON);
 196         writel(stat, i2c->regs + S3C2410_IICSTAT);
 197
 198         dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
 199         writeb(addr, i2c->regs + S3C2410_IICDS);
 200
 201         /* delay here to ensure the data byte has gotten onto the bus
 202          * before the transaction is started */
 203
 204         ndelay(i2c->tx_setup);
 205
 206         dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
 207         writel(iiccon, i2c->regs + S3C2410_IICCON);
 208
 209         stat |= S3C2410_IICSTAT_START;
 210         writel(stat, i2c->regs + S3C2410_IICSTAT);
 211 }
 212
 213 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
 214 {
 215         unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 216
 217         dev_dbg(i2c->dev, "STOP\n");
 218
 219         /* stop the transfer */
 220         iicstat &= ~S3C2410_IICSTAT_START;
 221         writel(iicstat, i2c->regs + S3C2410_IICSTAT);
 222
 223         i2c->state = STATE_STOP;
 224
 225         s3c24xx_i2c_master_complete(i2c, ret);
 226         s3c24xx_i2c_disable_irq(i2c);
 227 }
 228
 229 /* helper functions to determine the current state in the set of
 230  * messages we are sending */
 231
 232 /* is_lastmsg()
 233  *
 234  * returns TRUE if the current message is the last in the set
 235 */
 236
 237 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
 238 {
 239         return i2c->msg_idx >= (i2c->msg_num - 1);
 240 }
 241
 242 /* is_msglast
 243  *
 244  * returns TRUE if we this is the last byte in the current message
 245 */
 246
 247 static inline int is_msglast(struct s3c24xx_i2c *i2c)
 248 {
 249         return i2c->msg_ptr == i2c->msg->len-1;
 250 }
 251
 252 /* is_msgend
 253  *
 254  * returns TRUE if we reached the end of the current message
 255 */
 256
 257 static inline int is_msgend(struct s3c24xx_i2c *i2c)
 258 {
 259         return i2c->msg_ptr >= i2c->msg->len;
 260 }
 261
 262 /* i2c_s3c_irq_nextbyte
 263  *
 264  * process an interrupt and work out what to do
 265  */
 266
 267 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
 268 {
 269         unsigned long tmp;
 270         unsigned char byte;
 271         int ret = 0;
 272
 273         switch (i2c->state) {
 274
 275         case STATE_IDLE:
 276                 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
 277                 goto out;
 278
 279         case STATE_STOP:
 280                 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
 281                 s3c24xx_i2c_disable_irq(i2c);
 282                 goto out_ack;
 283
 284         case STATE_START:
 285                 /* last thing we did was send a start condition on the
 286                  * bus, or started a new i2c message
 287                  */
 288
 289                 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
 290                     !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
 291                         /* ack was not received... */
 292
 293                         dev_dbg(i2c->dev, "ack was not received\n");
 294                         s3c24xx_i2c_stop(i2c, -ENXIO);
 295                         goto out_ack;
 296                 }
 297
 298                 if (i2c->msg->flags & I2C_M_RD)
 299                         i2c->state = STATE_READ;
 300                 else
 301                         i2c->state = STATE_WRITE;
 302
 303                 /* terminate the transfer if there is nothing to do
 304                  * as this is used by the i2c probe to find devices. */
 305
 306                 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
 307                         s3c24xx_i2c_stop(i2c, 0);
 308                         goto out_ack;
 309                 }
 310
 311                 if (i2c->state == STATE_READ)
 312                         goto prepare_read;
 313
 314                 /* fall through to the write state, as we will need to
 315                  * send a byte as well */
 316
 317         case STATE_WRITE:
 318                 /* we are writing data to the device... check for the
 319                  * end of the message, and if so, work out what to do
 320                  */
 321
 322                 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
 323                         if (iicstat & S3C2410_IICSTAT_LASTBIT) {
 324                                 dev_dbg(i2c->dev, "WRITE: No Ack\n");
 325
 326                                 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
 327                                 goto out_ack;
 328                         }
 329                 }
 330
 331  retry_write:
 332
 333                 if (!is_msgend(i2c)) {
 334                         byte = i2c->msg->buf[i2c->msg_ptr++];
 335                         writeb(byte, i2c->regs + S3C2410_IICDS);
 336
 337                         /* delay after writing the byte to allow the
 338                          * data setup time on the bus, as writing the
 339                          * data to the register causes the first bit
 340                          * to appear on SDA, and SCL will change as
 341                          * soon as the interrupt is acknowledged */
 342
 343                         ndelay(i2c->tx_setup);
 344
 345                 } else if (!is_lastmsg(i2c)) {
 346                         /* we need to go to the next i2c message */
 347
 348                         dev_dbg(i2c->dev, "WRITE: Next Message\n");
 349
 350                         i2c->msg_ptr = 0;
 351                         i2c->msg_idx++;
 352                         i2c->msg++;
 353
 354                         /* check to see if we need to do another message */
 355                         if (i2c->msg->flags & I2C_M_NOSTART) {
 356
 357                                 if (i2c->msg->flags & I2C_M_RD) {
 358                                         /* cannot do this, the controller
 359                                          * forces us to send a new START
 360                                          * when we change direction */
 361
 362                                         s3c24xx_i2c_stop(i2c, -EINVAL);
 363                                 }
 364
 365                                 goto retry_write;
 366                         } else {
 367                                 /* send the new start */
 368                                 s3c24xx_i2c_message_start(i2c, i2c->msg);
 369                                 i2c->state = STATE_START;
 370                         }
 371
 372                 } else {
 373                         /* send stop */
 374
 375                         s3c24xx_i2c_stop(i2c, 0);
 376                 }
 377                 break;
 378
 379         case STATE_READ:
 380                 /* we have a byte of data in the data register, do
 381                  * something with it, and then work out wether we are
 382                  * going to do any more read/write
 383                  */
 384
 385                 byte = readb(i2c->regs + S3C2410_IICDS);
 386                 i2c->msg->buf[i2c->msg_ptr++] = byte;
 387
 388  prepare_read:
 389                 if (is_msglast(i2c)) {
 390                         /* last byte of buffer */
 391
 392                         if (is_lastmsg(i2c))
 393                                 s3c24xx_i2c_disable_ack(i2c);
 394
 395                 } else if (is_msgend(i2c)) {
 396                         /* ok, we've read the entire buffer, see if there
 397                          * is anything else we need to do */
 398
 399                         if (is_lastmsg(i2c)) {
 400                                 /* last message, send stop and complete */
 401                                 dev_dbg(i2c->dev, "READ: Send Stop\n");
 402
 403                                 s3c24xx_i2c_stop(i2c, 0);
 404                         } else {
 405                                 /* go to the next transfer */
 406                                 dev_dbg(i2c->dev, "READ: Next Transfer\n");
 407
 408                                 i2c->msg_ptr = 0;
 409                                 i2c->msg_idx++;
 410                                 i2c->msg++;
 411                         }
 412                 }
 413
 414                 break;
 415         }
 416
 417         /* acknowlegde the IRQ and get back on with the work */
 418
 419  out_ack:
 420         tmp = readl(i2c->regs + S3C2410_IICCON);
 421         tmp &= ~S3C2410_IICCON_IRQPEND;
 422         writel(tmp, i2c->regs + S3C2410_IICCON);
 423  out:
 424         return ret;
 425 }
 426
 427 /* s3c24xx_i2c_irq
 428  *
 429  * top level IRQ servicing routine
 430 */
 431
 432 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
 433 {
 434         struct s3c24xx_i2c *i2c = dev_id;
 435         unsigned long status;
 436         unsigned long tmp;
 437
 438         status = readl(i2c->regs + S3C2410_IICSTAT);
 439
 440         if (status & S3C2410_IICSTAT_ARBITR) {
 441                 /* deal with arbitration loss */
 442                 dev_err(i2c->dev, "deal with arbitration loss\n");
 443         }
 444
 445         if (i2c->state == STATE_IDLE) {
 446                 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
 447
 448                 tmp = readl(i2c->regs + S3C2410_IICCON);
 449                 tmp &= ~S3C2410_IICCON_IRQPEND;
 450                 writel(tmp, i2c->regs +  S3C2410_IICCON);
 451                 goto out;
 452         }
 453
 454         /* pretty much this leaves us with the fact that we've
 455          * transmitted or received whatever byte we last sent */
 456
 457         i2c_s3c_irq_nextbyte(i2c, status);
 458
 459  out:
 460         return IRQ_HANDLED;
 461 }
 462
 463
 464 /* s3c24xx_i2c_set_master
 465  *
 466  * get the i2c bus for a master transaction
 467 */
 468
 469 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
 470 {
 471         unsigned long iicstat;
 472         int timeout = 400;
 473
 474         while (timeout-- > 0) {
 475                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 476
 477                 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
 478                         return 0;
 479
 480                 msleep(1);
 481         }
 482
 483         return -ETIMEDOUT;
 484 }
 485
 486 /* s3c24xx_i2c_doxfer
 487  *
 488  * this starts an i2c transfer
 489 */
 490
 491 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
 492                               struct i2c_msg *msgs, int num)
 493 {
 494         unsigned long iicstat, timeout;
 495         int spins = 20;
 496         int ret;
 497
 498         if (i2c->suspended)
 499                 return -EIO;
 500
 501         ret = s3c24xx_i2c_set_master(i2c);
 502         if (ret != 0) {
 503                 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
 504                 ret = -EAGAIN;
 505                 goto out;
 506         }
 507
 508         spin_lock_irq(&i2c->lock);
 509
 510         i2c->msg     = msgs;
 511         i2c->msg_num = num;
 512         i2c->msg_ptr = 0;
 513         i2c->msg_idx = 0;
 514         i2c->state   = STATE_START;
 515
 516         s3c24xx_i2c_enable_irq(i2c);
 517         s3c24xx_i2c_message_start(i2c, msgs);
 518         spin_unlock_irq(&i2c->lock);
 519
 520         timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
 521
 522         ret = i2c->msg_idx;
 523
 524         /* having these next two as dev_err() makes life very
 525          * noisy when doing an i2cdetect */
 526
 527         if (timeout == 0)
 528                 dev_dbg(i2c->dev, "timeout\n");
 529         else if (ret != num)
 530                 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
 531
 532         /* ensure the stop has been through the bus */
 533
 534         dev_dbg(i2c->dev, "waiting for bus idle\n");
 535
 536         /* first, try busy waiting briefly */
 537         do {
 538                 cpu_relax();
 539                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 540         } while ((iicstat & S3C2410_IICSTAT_START) && --spins);
 541
 542         /* if that timed out sleep */
 543         if (!spins) {
 544                 msleep(1);
 545                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 546         }
 547
 548         if (iicstat & S3C2410_IICSTAT_START)
 549                 dev_warn(i2c->dev, "timeout waiting for bus idle\n");
 550
 551  out:
 552         return ret;
 553 }
 554
 555 /* s3c24xx_i2c_xfer
 556  *
 557  * first port of call from the i2c bus code when an message needs
 558  * transferring across the i2c bus.
 559 */
 560
 561 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
 562                         struct i2c_msg *msgs, int num)
 563 {
 564         struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
 565         int retry;
 566         int ret;
 567
 568         pm_runtime_get_sync(&adap->dev);
 569         clk_enable(i2c->clk);
 570
 571         for (retry = 0; retry < adap->retries; retry++) {
 572
 573                 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
 574
 575                 if (ret != -EAGAIN) {
 576                         clk_disable(i2c->clk);
 577                         pm_runtime_put_sync(&adap->dev);
 578                         return ret;
 579                 }
 580
 581                 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
 582
 583                 udelay(100);
 584         }
 585
 586         clk_disable(i2c->clk);
 587         pm_runtime_put_sync(&adap->dev);
 588         return -EREMOTEIO;
 589 }
 590
 591 /* declare our i2c functionality */
 592 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
 593 {
 594         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
 595 }
 596
 597 /* i2c bus registration info */
 598
 599 static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
 600         .master_xfer            = s3c24xx_i2c_xfer,
 601         .functionality          = s3c24xx_i2c_func,
 602 };
 603
 604 /* s3c24xx_i2c_calcdivisor
 605  *
 606  * return the divisor settings for a given frequency
 607 */
 608
 609 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
 610                                    unsigned int *div1, unsigned int *divs)
 611 {
 612         unsigned int calc_divs = clkin / wanted;
 613         unsigned int calc_div1;
 614
 615         if (calc_divs > (16*16))
 616                 calc_div1 = 512;
 617         else
 618                 calc_div1 = 16;
 619
 620         calc_divs += calc_div1-1;
 621         calc_divs /= calc_div1;
 622
 623         if (calc_divs == 0)
 624                 calc_divs = 1;
 625         if (calc_divs > 17)
 626                 calc_divs = 17;
 627
 628         *divs = calc_divs;
 629         *div1 = calc_div1;
 630
 631         return clkin / (calc_divs * calc_div1);
 632 }
 633
 634 /* s3c24xx_i2c_clockrate
 635  *
 636  * work out a divisor for the user requested frequency setting,
 637  * either by the requested frequency, or scanning the acceptable
 638  * range of frequencies until something is found
 639 */
 640
 641 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
 642 {
 643         struct s3c2410_platform_i2c *pdata = i2c->pdata;
 644         unsigned long clkin = clk_get_rate(i2c->clk);
 645         unsigned int divs, div1;
 646         unsigned long target_frequency;
 647         u32 iiccon;
 648         int freq;
 649
 650         i2c->clkrate = clkin;
 651         clkin /= 1000;          /* clkin now in KHz */
 652
 653         dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency);
 654
 655         target_frequency = pdata->frequency ? pdata->frequency : 100000;
 656
 657         target_frequency /= 1000; /* Target frequency now in KHz */
 658
 659         freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs);
 660
 661         if (freq > target_frequency) {
 662                 dev_err(i2c->dev,
 663                         "Unable to achieve desired frequency %luKHz."   \
 664                         " Lowest achievable %dKHz\n", target_frequency, freq);
 665                 return -EINVAL;
 666         }
 667
 668         *got = freq;
 669
 670         iiccon = readl(i2c->regs + S3C2410_IICCON);
 671         iiccon &= ~(S3C2410_IICCON_SCALEMASK | S3C2410_IICCON_TXDIV_512);
 672         iiccon |= (divs-1);
 673
 674         if (div1 == 512)
 675                 iiccon |= S3C2410_IICCON_TXDIV_512;
 676
 677         writel(iiccon, i2c->regs + S3C2410_IICCON);
 678
 679         if (s3c24xx_i2c_is2440(i2c)) {
 680                 unsigned long sda_delay;
 681
 682                 if (pdata->sda_delay) {
 683                         sda_delay = clkin * pdata->sda_delay;
 684                         sda_delay = DIV_ROUND_UP(sda_delay, 1000000);
 685                         sda_delay = DIV_ROUND_UP(sda_delay, 5);
 686                         if (sda_delay > 3)
 687                                 sda_delay = 3;
 688                         sda_delay |= S3C2410_IICLC_FILTER_ON;
 689                 } else
 690                         sda_delay = 0;
 691
 692                 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay);
 693                 writel(sda_delay, i2c->regs + S3C2440_IICLC);
 694         }
 695
 696         return 0;
 697 }
 698
 699 #ifdef CONFIG_CPU_FREQ
 700
 701 #define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
 702
 703 static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb,
 704                                           unsigned long val, void *data)
 705 {
 706         struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
 707         unsigned long flags;
 708         unsigned int got;
 709         int delta_f;
 710         int ret;
 711
 712         delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
 713
 714         /* if we're post-change and the input clock has slowed down
 715          * or at pre-change and the clock is about to speed up, then
 716          * adjust our clock rate. <0 is slow, >0 speedup.
 717          */
 718
 719         if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
 720             (val == CPUFREQ_PRECHANGE && delta_f > 0)) {
 721                 spin_lock_irqsave(&i2c->lock, flags);
 722                 ret = s3c24xx_i2c_clockrate(i2c, &got);
 723                 spin_unlock_irqrestore(&i2c->lock, flags);
 724
 725                 if (ret < 0)
 726                         dev_err(i2c->dev, "cannot find frequency\n");
 727                 else
 728                         dev_info(i2c->dev, "setting freq %d\n", got);
 729         }
 730
 731         return 0;
 732 }
 733
 734 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
 735 {
 736         i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
 737
 738         return cpufreq_register_notifier(&i2c->freq_transition,
 739                                          CPUFREQ_TRANSITION_NOTIFIER);
 740 }
 741
 742 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
 743 {
 744         cpufreq_unregister_notifier(&i2c->freq_transition,
 745                                     CPUFREQ_TRANSITION_NOTIFIER);
 746 }
 747
 748 #else
 749 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
 750 {
 751         return 0;
 752 }
 753
 754 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
 755 {
 756 }
 757 #endif
 758
 759 #ifdef CONFIG_OF
 760 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
 761 {
 762         int idx, gpio, ret;
 763
 764         for (idx = 0; idx < 2; idx++) {
 765                 gpio = of_get_gpio(i2c->dev->of_node, idx);
 766                 if (!gpio_is_valid(gpio)) {
 767                         dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio);
 768                         goto free_gpio;
 769                 }
 770
 771                 ret = gpio_request(gpio, "i2c-bus");
 772                 if (ret) {
 773                         dev_err(i2c->dev, "gpio [%d] request failed\n", gpio);
 774                         goto free_gpio;
 775                 }
 776         }
 777         return 0;
 778
 779 free_gpio:
 780         while (--idx >= 0)
 781                 gpio_free(i2c->gpios[idx]);
 782         return -EINVAL;
 783 }
 784
 785 static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
 786 {
 787         unsigned int idx;
 788         for (idx = 0; idx < 2; idx++)
 789                 gpio_free(i2c->gpios[idx]);
 790 }
 791 #else
 792 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
 793 {
 794         return 0;
 795 }
 796
 797 static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
 798 {
 799 }
 800 #endif
 801
 802 /* s3c24xx_i2c_init
 803  *
 804  * initialise the controller, set the IO lines and frequency
 805 */
 806
 807 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
 808 {
 809         unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
 810         struct s3c2410_platform_i2c *pdata;
 811         unsigned int freq;
 812
 813         /* get the plafrom data */
 814
 815         pdata = i2c->pdata;
 816
 817         /* inititalise the gpio */
 818
 819         if (pdata->cfg_gpio)
 820                 pdata->cfg_gpio(to_platform_device(i2c->dev));
 821         else
 822                 if (s3c24xx_i2c_parse_dt_gpio(i2c))
 823                         return -EINVAL;
 824
 825         /* write slave address */
 826
 827         writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
 828
 829         dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
 830
 831         writel(iicon, i2c->regs + S3C2410_IICCON);
 832
 833         /* we need to work out the divisors for the clock... */
 834
 835         if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
 836                 writel(0, i2c->regs + S3C2410_IICCON);
 837                 dev_err(i2c->dev, "cannot meet bus frequency required\n");
 838                 return -EINVAL;
 839         }
 840
 841         /* todo - check that the i2c lines aren't being dragged anywhere */
 842
 843         dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
 844         dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
 845
 846         return 0;
 847 }
 848
 849 #ifdef CONFIG_OF
 850 /* s3c24xx_i2c_parse_dt
 851  *
 852  * Parse the device tree node and retreive the platform data.
 853 */
 854
 855 static void
 856 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c)
 857 {
 858         struct s3c2410_platform_i2c *pdata = i2c->pdata;
 859
 860         if (!np)
 861                 return;
 862
 863         pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
 864         of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
 865         of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
 866         of_property_read_u32(np, "samsung,i2c-max-bus-freq",
 867                                 (u32 *)&pdata->frequency);
 868 }
 869 #else
 870 static void
 871 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c)
 872 {
 873         return;
 874 }
 875 #endif
 876
 877 /* s3c24xx_i2c_probe
 878  *
 879  * called by the bus driver when a suitable device is found
 880 */
 881
 882 static int s3c24xx_i2c_probe(struct platform_device *pdev)
 883 {
 884         struct s3c24xx_i2c *i2c;
 885         struct s3c2410_platform_i2c *pdata = NULL;
 886         struct resource *res;
 887         int ret;
 888
 889         if (!pdev->dev.of_node) {
 890                 pdata = pdev->dev.platform_data;
 891                 if (!pdata) {
 892                         dev_err(&pdev->dev, "no platform data\n");
 893                         return -EINVAL;
 894                 }
 895         }
 896
 897         i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL);
 898         if (!i2c) {
 899                 dev_err(&pdev->dev, "no memory for state\n");
 900                 return -ENOMEM;
 901         }
 902
 903         i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 904         if (!i2c->pdata) {
 905                 ret = -ENOMEM;
 906                 goto err_noclk;
 907         }
 908
 909         if (pdata)
 910                 memcpy(i2c->pdata, pdata, sizeof(*pdata));
 911         else
 912                 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c);
 913
 914         strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));
 915         i2c->adap.owner   = THIS_MODULE;
 916         i2c->adap.algo    = &s3c24xx_i2c_algorithm;
 917         i2c->adap.retries = 2;
 918         i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 919         i2c->tx_setup     = 50;
 920
 921         spin_lock_init(&i2c->lock);
 922         init_waitqueue_head(&i2c->wait);
 923
 924         /* find the clock and enable it */
 925
 926         i2c->dev = &pdev->dev;
 927         i2c->clk = clk_get(&pdev->dev, "i2c");
 928         if (IS_ERR(i2c->clk)) {
 929                 dev_err(&pdev->dev, "cannot get clock\n");
 930                 ret = -ENOENT;
 931                 goto err_noclk;
 932         }
 933
 934         dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
 935
 936         clk_enable(i2c->clk);
 937
 938         /* map the registers */
 939
 940         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 941         if (res == NULL) {
 942                 dev_err(&pdev->dev, "cannot find IO resource\n");
 943                 ret = -ENOENT;
 944                 goto err_clk;
 945         }
 946
 947         i2c->ioarea = request_mem_region(res->start, resource_size(res),
 948                                          pdev->name);
 949
 950         if (i2c->ioarea == NULL) {
 951                 dev_err(&pdev->dev, "cannot request IO\n");
 952                 ret = -ENXIO;
 953                 goto err_clk;
 954         }
 955
 956         i2c->regs = ioremap(res->start, resource_size(res));
 957
 958         if (i2c->regs == NULL) {
 959                 dev_err(&pdev->dev, "cannot map IO\n");
 960                 ret = -ENXIO;
 961                 goto err_ioarea;
 962         }
 963
 964         dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
 965                 i2c->regs, i2c->ioarea, res);
 966
 967         /* setup info block for the i2c core */
 968
 969         i2c->adap.algo_data = i2c;
 970         i2c->adap.dev.parent = &pdev->dev;
 971
 972         /* initialise the i2c controller */
 973
 974         ret = s3c24xx_i2c_init(i2c);
 975         if (ret != 0)
 976                 goto err_iomap;
 977
 978         /* find the IRQ for this unit (note, this relies on the init call to
 979          * ensure no current IRQs pending
 980          */
 981
 982         i2c->irq = ret = platform_get_irq(pdev, 0);
 983         if (ret <= 0) {
 984                 dev_err(&pdev->dev, "cannot find IRQ\n");
 985                 goto err_iomap;
 986         }
 987
 988         ret = request_irq(i2c->irq, s3c24xx_i2c_irq, 0,
 989                           dev_name(&pdev->dev), i2c);
 990
 991         if (ret != 0) {
 992                 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
 993                 goto err_iomap;
 994         }
 995
 996         ret = s3c24xx_i2c_register_cpufreq(i2c);
 997         if (ret < 0) {
 998                 dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
 999                 goto err_irq;
1000         }
1001
1002         /* Note, previous versions of the driver used i2c_add_adapter()
1003          * to add the bus at any number. We now pass the bus number via
1004          * the platform data, so if unset it will now default to always
1005          * being bus 0.
1006          */
1007
1008         i2c->adap.nr = i2c->pdata->bus_num;
1009         i2c->adap.dev.of_node = pdev->dev.of_node;
1010
1011         ret = i2c_add_numbered_adapter(&i2c->adap);
1012         if (ret < 0) {
1013                 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
1014                 goto err_cpufreq;
1015         }
1016
1017         of_i2c_register_devices(&i2c->adap);
1018         platform_set_drvdata(pdev, i2c);
1019
1020         pm_runtime_enable(&pdev->dev);
1021         pm_runtime_enable(&i2c->adap.dev);
1022
1023         dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
1024         clk_disable(i2c->clk);
1025         return 0;
1026
1027  err_cpufreq:
1028         s3c24xx_i2c_deregister_cpufreq(i2c);
1029
1030  err_irq:
1031         free_irq(i2c->irq, i2c);
1032
1033  err_iomap:
1034         iounmap(i2c->regs);
1035
1036  err_ioarea:
1037         release_resource(i2c->ioarea);
1038         kfree(i2c->ioarea);
1039
1040  err_clk:
1041         clk_disable(i2c->clk);
1042         clk_put(i2c->clk);
1043
1044  err_noclk:
1045         return ret;
1046 }
1047
1048 /* s3c24xx_i2c_remove
1049  *
1050  * called when device is removed from the bus
1051 */
1052
1053 static int s3c24xx_i2c_remove(struct platform_device *pdev)
1054 {
1055         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1056
1057         pm_runtime_disable(&i2c->adap.dev);
1058         pm_runtime_disable(&pdev->dev);
1059
1060         s3c24xx_i2c_deregister_cpufreq(i2c);
1061
1062         i2c_del_adapter(&i2c->adap);
1063         free_irq(i2c->irq, i2c);
1064
1065         clk_disable(i2c->clk);
1066         clk_put(i2c->clk);
1067
1068         iounmap(i2c->regs);
1069
1070         release_resource(i2c->ioarea);
1071         s3c24xx_i2c_dt_gpio_free(i2c);
1072         kfree(i2c->ioarea);
1073
1074         return 0;
1075 }
1076
1077 #ifdef CONFIG_PM
1078 static int s3c24xx_i2c_suspend_noirq(struct device *dev)
1079 {
1080         struct platform_device *pdev = to_platform_device(dev);
1081         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1082
1083         i2c->suspended = 1;
1084
1085         return 0;
1086 }
1087
1088 static int s3c24xx_i2c_resume(struct device *dev)
1089 {
1090         struct platform_device *pdev = to_platform_device(dev);
1091         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1092
1093         i2c->suspended = 0;
1094         clk_enable(i2c->clk);
1095         s3c24xx_i2c_init(i2c);
1096         clk_disable(i2c->clk);
1097
1098         return 0;
1099 }
1100
1101 static const struct dev_pm_ops s3c24xx_i2c_dev_pm_ops = {
1102         .suspend_noirq = s3c24xx_i2c_suspend_noirq,
1103         .resume = s3c24xx_i2c_resume,
1104 };
1105
1106 #define S3C24XX_DEV_PM_OPS (&s3c24xx_i2c_dev_pm_ops)
1107 #else
1108 #define S3C24XX_DEV_PM_OPS NULL
1109 #endif
1110
1111 /* device driver for platform bus bits */
1112
1113 static struct platform_device_id s3c24xx_driver_ids[] = {
1114         {
1115                 .name           = "s3c2410-i2c",
1116                 .driver_data    = TYPE_S3C2410,
1117         }, {
1118                 .name           = "s3c2440-i2c",
1119                 .driver_data    = TYPE_S3C2440,
1120         }, { },
1121 };
1122 MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
1123
1124 #ifdef CONFIG_OF
1125 static const struct of_device_id s3c24xx_i2c_match[] = {
1126         { .compatible = "samsung,s3c2410-i2c" },
1127         { .compatible = "samsung,s3c2440-i2c" },
1128         {},
1129 };
1130 MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);
1131 #else
1132 #define s3c24xx_i2c_match NULL
1133 #endif
1134
1135 static struct platform_driver s3c24xx_i2c_driver = {
1136         .probe          = s3c24xx_i2c_probe,
1137         .remove         = s3c24xx_i2c_remove,
1138         .id_table       = s3c24xx_driver_ids,
1139         .driver         = {
1140                 .owner  = THIS_MODULE,
1141                 .name   = "s3c-i2c",
1142                 .pm     = S3C24XX_DEV_PM_OPS,
1143                 .of_match_table = s3c24xx_i2c_match,
1144         },
1145 };
1146
1147 static int __init i2c_adap_s3c_init(void)
1148 {
1149         return platform_driver_register(&s3c24xx_i2c_driver);
1150 }
1151 subsys_initcall(i2c_adap_s3c_init);
1152
1153 static void __exit i2c_adap_s3c_exit(void)
1154 {
1155         platform_driver_unregister(&s3c24xx_i2c_driver);
1156 }
1157 module_exit(i2c_adap_s3c_exit);
1158
1159 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
1160 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
1161 MODULE_LICENSE("GPL");