arm64: dts: msm8916-longcheer-l8150: Enable WCNSS for WiFi and BT
[linux/fpc-iii.git] / arch / alpha / kernel / es1888.c
blob297476bb08fb484ccaa4f3e58b2633933b53d2c4
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * linux/arch/alpha/kernel/es1888.c
5 * Init the built-in ES1888 sound chip (SB16 compatible)
6 */
8 #include <linux/init.h>
9 #include <asm/io.h>
10 #include "proto.h"
12 void __init
13 es1888_init(void)
15 /* Sequence of IO reads to init the audio controller */
16 inb(0x0229);
17 inb(0x0229);
18 inb(0x0229);
19 inb(0x022b);
20 inb(0x0229);
21 inb(0x022b);
22 inb(0x0229);
23 inb(0x0229);
24 inb(0x022b);
25 inb(0x0229);
26 inb(0x0220); /* This sets the base address to 0x220 */
28 /* Sequence to set DMA channels */
29 outb(0x01, 0x0226); /* reset */
30 inb(0x0226); /* pause */
31 outb(0x00, 0x0226); /* release reset */
32 while (!(inb(0x022e) & 0x80)) /* wait for bit 7 to assert*/
33 continue;
34 inb(0x022a); /* pause */
35 outb(0xc6, 0x022c); /* enable extended mode */
36 inb(0x022a); /* pause, also forces the write */
37 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
38 continue;
39 outb(0xb1, 0x022c); /* setup for write to Interrupt CR */
40 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
41 continue;
42 outb(0x14, 0x022c); /* set IRQ 5 */
43 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
44 continue;
45 outb(0xb2, 0x022c); /* setup for write to DMA CR */
46 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
47 continue;
48 outb(0x18, 0x022c); /* set DMA channel 1 */
49 inb(0x022c); /* force the write */