1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010,2015 Broadcom
4 * Copyright (C) 2013-2014 Lubomir Rintel
5 * Copyright (C) 2013 Craig McGeachie
7 * Parts of the driver are based on:
8 * - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
9 * obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
11 * - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
12 * https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
13 * mailbox/bcm2835-ipc.c
14 * - documentation available on the following web site:
15 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/err.h>
21 #include <linux/interrupt.h>
22 #include <linux/irq.h>
23 #include <linux/kernel.h>
24 #include <linux/mailbox_controller.h>
25 #include <linux/module.h>
26 #include <linux/of_address.h>
27 #include <linux/of_irq.h>
28 #include <linux/platform_device.h>
29 #include <linux/spinlock.h>
32 #define ARM_0_MAIL0 0x00
33 #define ARM_0_MAIL1 0x20
36 * Mailbox registers. We basically only support mailbox 0 & 1. We
37 * deliver to the VC in mailbox 1, it delivers to us in mailbox 0. See
38 * BCM2835-ARM-Peripherals.pdf section 1.3 for an explanation about
39 * the placement of memory barriers.
41 #define MAIL0_RD (ARM_0_MAIL0 + 0x00)
42 #define MAIL0_POL (ARM_0_MAIL0 + 0x10)
43 #define MAIL0_STA (ARM_0_MAIL0 + 0x18)
44 #define MAIL0_CNF (ARM_0_MAIL0 + 0x1C)
45 #define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
46 #define MAIL1_STA (ARM_0_MAIL1 + 0x18)
48 /* Status register: FIFO state. */
49 #define ARM_MS_FULL BIT(31)
50 #define ARM_MS_EMPTY BIT(30)
52 /* Configuration register: Enable interrupts. */
53 #define ARM_MC_IHAVEDATAIRQEN BIT(0)
58 struct mbox_controller controller
;
61 static struct bcm2835_mbox
*bcm2835_link_mbox(struct mbox_chan
*link
)
63 return container_of(link
->mbox
, struct bcm2835_mbox
, controller
);
66 static irqreturn_t
bcm2835_mbox_irq(int irq
, void *dev_id
)
68 struct bcm2835_mbox
*mbox
= dev_id
;
69 struct device
*dev
= mbox
->controller
.dev
;
70 struct mbox_chan
*link
= &mbox
->controller
.chans
[0];
72 while (!(readl(mbox
->regs
+ MAIL0_STA
) & ARM_MS_EMPTY
)) {
73 u32 msg
= readl(mbox
->regs
+ MAIL0_RD
);
74 dev_dbg(dev
, "Reply 0x%08X\n", msg
);
75 mbox_chan_received_data(link
, &msg
);
80 static int bcm2835_send_data(struct mbox_chan
*link
, void *data
)
82 struct bcm2835_mbox
*mbox
= bcm2835_link_mbox(link
);
83 u32 msg
= *(u32
*)data
;
85 spin_lock(&mbox
->lock
);
86 writel(msg
, mbox
->regs
+ MAIL1_WRT
);
87 dev_dbg(mbox
->controller
.dev
, "Request 0x%08X\n", msg
);
88 spin_unlock(&mbox
->lock
);
92 static int bcm2835_startup(struct mbox_chan
*link
)
94 struct bcm2835_mbox
*mbox
= bcm2835_link_mbox(link
);
96 /* Enable the interrupt on data reception */
97 writel(ARM_MC_IHAVEDATAIRQEN
, mbox
->regs
+ MAIL0_CNF
);
102 static void bcm2835_shutdown(struct mbox_chan
*link
)
104 struct bcm2835_mbox
*mbox
= bcm2835_link_mbox(link
);
106 writel(0, mbox
->regs
+ MAIL0_CNF
);
109 static bool bcm2835_last_tx_done(struct mbox_chan
*link
)
111 struct bcm2835_mbox
*mbox
= bcm2835_link_mbox(link
);
114 spin_lock(&mbox
->lock
);
115 ret
= !(readl(mbox
->regs
+ MAIL1_STA
) & ARM_MS_FULL
);
116 spin_unlock(&mbox
->lock
);
120 static const struct mbox_chan_ops bcm2835_mbox_chan_ops
= {
121 .send_data
= bcm2835_send_data
,
122 .startup
= bcm2835_startup
,
123 .shutdown
= bcm2835_shutdown
,
124 .last_tx_done
= bcm2835_last_tx_done
127 static struct mbox_chan
*bcm2835_mbox_index_xlate(struct mbox_controller
*mbox
,
128 const struct of_phandle_args
*sp
)
130 if (sp
->args_count
!= 0)
131 return ERR_PTR(-EINVAL
);
133 return &mbox
->chans
[0];
136 static int bcm2835_mbox_probe(struct platform_device
*pdev
)
138 struct device
*dev
= &pdev
->dev
;
140 struct resource
*iomem
;
141 struct bcm2835_mbox
*mbox
;
143 mbox
= devm_kzalloc(dev
, sizeof(*mbox
), GFP_KERNEL
);
146 spin_lock_init(&mbox
->lock
);
148 ret
= devm_request_irq(dev
, irq_of_parse_and_map(dev
->of_node
, 0),
149 bcm2835_mbox_irq
, 0, dev_name(dev
), mbox
);
151 dev_err(dev
, "Failed to register a mailbox IRQ handler: %d\n",
156 iomem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
157 mbox
->regs
= devm_ioremap_resource(&pdev
->dev
, iomem
);
158 if (IS_ERR(mbox
->regs
)) {
159 ret
= PTR_ERR(mbox
->regs
);
160 dev_err(&pdev
->dev
, "Failed to remap mailbox regs: %d\n", ret
);
164 mbox
->controller
.txdone_poll
= true;
165 mbox
->controller
.txpoll_period
= 5;
166 mbox
->controller
.ops
= &bcm2835_mbox_chan_ops
;
167 mbox
->controller
.of_xlate
= &bcm2835_mbox_index_xlate
;
168 mbox
->controller
.dev
= dev
;
169 mbox
->controller
.num_chans
= 1;
170 mbox
->controller
.chans
= devm_kzalloc(dev
,
171 sizeof(*mbox
->controller
.chans
), GFP_KERNEL
);
172 if (!mbox
->controller
.chans
)
175 ret
= devm_mbox_controller_register(dev
, &mbox
->controller
);
179 platform_set_drvdata(pdev
, mbox
);
180 dev_info(dev
, "mailbox enabled\n");
185 static const struct of_device_id bcm2835_mbox_of_match
[] = {
186 { .compatible
= "brcm,bcm2835-mbox", },
189 MODULE_DEVICE_TABLE(of
, bcm2835_mbox_of_match
);
191 static struct platform_driver bcm2835_mbox_driver
= {
193 .name
= "bcm2835-mbox",
194 .of_match_table
= bcm2835_mbox_of_match
,
196 .probe
= bcm2835_mbox_probe
,
198 module_platform_driver(bcm2835_mbox_driver
);
200 MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
201 MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
202 MODULE_LICENSE("GPL v2");