include/drm/drm_hdcp.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright (C) 2017 Google, Inc.
   4  *
   5  * Authors:
   6  * Sean Paul <seanpaul@chromium.org>
   7  */
   8
   9 #ifndef _DRM_HDCP_H_INCLUDED_
  10 #define _DRM_HDCP_H_INCLUDED_
  11
  12 /* Period of hdcp checks (to ensure we're still authenticated) */
  13 #define DRM_HDCP_CHECK_PERIOD_MS                (128 * 16)
  14
  15 /* Shared lengths/masks between HDMI/DVI/DisplayPort */
  16 #define DRM_HDCP_AN_LEN                         8
  17 #define DRM_HDCP_BSTATUS_LEN                    2
  18 #define DRM_HDCP_KSV_LEN                        5
  19 #define DRM_HDCP_RI_LEN                         2
  20 #define DRM_HDCP_V_PRIME_PART_LEN               4
  21 #define DRM_HDCP_V_PRIME_NUM_PARTS              5
  22 #define DRM_HDCP_NUM_DOWNSTREAM(x)              (x & 0x7f)
  23 #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x)        (x & BIT(3))
  24 #define DRM_HDCP_MAX_DEVICE_EXCEEDED(x)         (x & BIT(7))
  25
  26 /* Slave address for the HDCP registers in the receiver */
  27 #define DRM_HDCP_DDC_ADDR                       0x3A
  28
  29 /* HDCP register offsets for HDMI/DVI devices */
  30 #define DRM_HDCP_DDC_BKSV                       0x00
  31 #define DRM_HDCP_DDC_RI_PRIME                   0x08
  32 #define DRM_HDCP_DDC_AKSV                       0x10
  33 #define DRM_HDCP_DDC_AN                         0x18
  34 #define DRM_HDCP_DDC_V_PRIME(h)                 (0x20 + h * 4)
  35 #define DRM_HDCP_DDC_BCAPS                      0x40
  36 #define  DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT    BIT(6)
  37 #define  DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY      BIT(5)
  38 #define DRM_HDCP_DDC_BSTATUS                    0x41
  39 #define DRM_HDCP_DDC_KSV_FIFO                   0x43
  40
  41 #endif