netfilter: Convert uses of __constant_<foo> to <foo>
[linux/fpc-iii.git] / virt / kvm / ioapic.c
blobce9ed99ad7dcde1bd513161bebf741c6c417f83c
1 /*
2 * Copyright (C) 2001 MandrakeSoft S.A.
3 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
5 * MandrakeSoft S.A.
6 * 43, rue d'Aboukir
7 * 75002 Paris - France
8 * http://www.linux-mandrake.com/
9 * http://www.mandrakesoft.com/
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Yunhong Jiang <yunhong.jiang@intel.com>
26 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
27 * Based on Xen 3.1 code.
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
32 #include <linux/mm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
36 #include <linux/io.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
40 #include <asm/page.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
44 #include "ioapic.h"
45 #include "lapic.h"
46 #include "irq.h"
48 #if 0
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
50 #else
51 #define ioapic_debug(fmt, arg...)
52 #endif
53 static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq,
54 bool line_status);
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
57 unsigned long addr,
58 unsigned long length)
60 unsigned long result = 0;
62 switch (ioapic->ioregsel) {
63 case IOAPIC_REG_VERSION:
64 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
65 | (IOAPIC_VERSION_ID & 0xff));
66 break;
68 case IOAPIC_REG_APIC_ID:
69 case IOAPIC_REG_ARB_ID:
70 result = ((ioapic->id & 0xf) << 24);
71 break;
73 default:
75 u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
76 u64 redir_content;
78 if (redir_index < IOAPIC_NUM_PINS)
79 redir_content =
80 ioapic->redirtbl[redir_index].bits;
81 else
82 redir_content = ~0ULL;
84 result = (ioapic->ioregsel & 0x1) ?
85 (redir_content >> 32) & 0xffffffff :
86 redir_content & 0xffffffff;
87 break;
91 return result;
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
96 ioapic->rtc_status.pending_eoi = 0;
97 bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
100 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
102 bool new_val, old_val;
103 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
104 union kvm_ioapic_redirect_entry *e;
106 e = &ioapic->redirtbl[RTC_GSI];
107 if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
108 e->fields.dest_mode))
109 return;
111 new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
112 old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
114 if (new_val == old_val)
115 return;
117 if (new_val) {
118 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
119 ioapic->rtc_status.pending_eoi++;
120 } else {
121 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
122 ioapic->rtc_status.pending_eoi--;
125 WARN_ON(ioapic->rtc_status.pending_eoi < 0);
128 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
130 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
132 spin_lock(&ioapic->lock);
133 __rtc_irq_eoi_tracking_restore_one(vcpu);
134 spin_unlock(&ioapic->lock);
137 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
139 struct kvm_vcpu *vcpu;
140 int i;
142 if (RTC_GSI >= IOAPIC_NUM_PINS)
143 return;
145 rtc_irq_eoi_tracking_reset(ioapic);
146 kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
147 __rtc_irq_eoi_tracking_restore_one(vcpu);
150 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
152 if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map))
153 --ioapic->rtc_status.pending_eoi;
155 WARN_ON(ioapic->rtc_status.pending_eoi < 0);
158 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
160 if (ioapic->rtc_status.pending_eoi > 0)
161 return true; /* coalesced */
163 return false;
166 static int ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx,
167 bool line_status)
169 union kvm_ioapic_redirect_entry *pent;
170 int injected = -1;
172 pent = &ioapic->redirtbl[idx];
174 if (!pent->fields.mask) {
175 injected = ioapic_deliver(ioapic, idx, line_status);
176 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
177 pent->fields.remote_irr = 1;
180 return injected;
183 static void update_handled_vectors(struct kvm_ioapic *ioapic)
185 DECLARE_BITMAP(handled_vectors, 256);
186 int i;
188 memset(handled_vectors, 0, sizeof(handled_vectors));
189 for (i = 0; i < IOAPIC_NUM_PINS; ++i)
190 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
191 memcpy(ioapic->handled_vectors, handled_vectors,
192 sizeof(handled_vectors));
193 smp_wmb();
196 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
197 u32 *tmr)
199 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
200 union kvm_ioapic_redirect_entry *e;
201 int index;
203 spin_lock(&ioapic->lock);
204 for (index = 0; index < IOAPIC_NUM_PINS; index++) {
205 e = &ioapic->redirtbl[index];
206 if (!e->fields.mask &&
207 (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
208 kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC,
209 index) || index == RTC_GSI)) {
210 if (kvm_apic_match_dest(vcpu, NULL, 0,
211 e->fields.dest_id, e->fields.dest_mode)) {
212 __set_bit(e->fields.vector,
213 (unsigned long *)eoi_exit_bitmap);
214 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
215 __set_bit(e->fields.vector,
216 (unsigned long *)tmr);
220 spin_unlock(&ioapic->lock);
223 #ifdef CONFIG_X86
224 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
226 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
228 if (!ioapic)
229 return;
230 kvm_make_scan_ioapic_request(kvm);
232 #else
233 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
235 return;
237 #endif
239 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
241 unsigned index;
242 bool mask_before, mask_after;
243 union kvm_ioapic_redirect_entry *e;
245 switch (ioapic->ioregsel) {
246 case IOAPIC_REG_VERSION:
247 /* Writes are ignored. */
248 break;
250 case IOAPIC_REG_APIC_ID:
251 ioapic->id = (val >> 24) & 0xf;
252 break;
254 case IOAPIC_REG_ARB_ID:
255 break;
257 default:
258 index = (ioapic->ioregsel - 0x10) >> 1;
260 ioapic_debug("change redir index %x val %x\n", index, val);
261 if (index >= IOAPIC_NUM_PINS)
262 return;
263 e = &ioapic->redirtbl[index];
264 mask_before = e->fields.mask;
265 if (ioapic->ioregsel & 1) {
266 e->bits &= 0xffffffff;
267 e->bits |= (u64) val << 32;
268 } else {
269 e->bits &= ~0xffffffffULL;
270 e->bits |= (u32) val;
271 e->fields.remote_irr = 0;
273 update_handled_vectors(ioapic);
274 mask_after = e->fields.mask;
275 if (mask_before != mask_after)
276 kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
277 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
278 && ioapic->irr & (1 << index))
279 ioapic_service(ioapic, index, false);
280 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
281 break;
285 static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq, bool line_status)
287 union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
288 struct kvm_lapic_irq irqe;
289 int ret;
291 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
292 "vector=%x trig_mode=%x\n",
293 entry->fields.dest_id, entry->fields.dest_mode,
294 entry->fields.delivery_mode, entry->fields.vector,
295 entry->fields.trig_mode);
297 irqe.dest_id = entry->fields.dest_id;
298 irqe.vector = entry->fields.vector;
299 irqe.dest_mode = entry->fields.dest_mode;
300 irqe.trig_mode = entry->fields.trig_mode;
301 irqe.delivery_mode = entry->fields.delivery_mode << 8;
302 irqe.level = 1;
303 irqe.shorthand = 0;
305 if (irq == RTC_GSI && line_status) {
306 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
307 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
308 ioapic->rtc_status.dest_map);
309 ioapic->rtc_status.pending_eoi = ret;
310 } else
311 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
313 return ret;
316 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
317 int level, bool line_status)
319 u32 old_irr;
320 u32 mask = 1 << irq;
321 union kvm_ioapic_redirect_entry entry;
322 int ret, irq_level;
324 BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
326 spin_lock(&ioapic->lock);
327 old_irr = ioapic->irr;
328 irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
329 irq_source_id, level);
330 entry = ioapic->redirtbl[irq];
331 irq_level ^= entry.fields.polarity;
332 if (!irq_level) {
333 ioapic->irr &= ~mask;
334 ret = 1;
335 } else {
336 int edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
338 if (irq == RTC_GSI && line_status &&
339 rtc_irq_check_coalesced(ioapic)) {
340 ret = 0; /* coalesced */
341 goto out;
343 ioapic->irr |= mask;
344 if ((edge && old_irr != ioapic->irr) ||
345 (!edge && !entry.fields.remote_irr))
346 ret = ioapic_service(ioapic, irq, line_status);
347 else
348 ret = 0; /* report coalesced interrupt */
350 out:
351 trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
352 spin_unlock(&ioapic->lock);
354 return ret;
357 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
359 int i;
361 spin_lock(&ioapic->lock);
362 for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
363 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
364 spin_unlock(&ioapic->lock);
367 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
368 struct kvm_ioapic *ioapic, int vector, int trigger_mode)
370 int i;
372 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
373 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
375 if (ent->fields.vector != vector)
376 continue;
378 if (i == RTC_GSI)
379 rtc_irq_eoi(ioapic, vcpu);
381 * We are dropping lock while calling ack notifiers because ack
382 * notifier callbacks for assigned devices call into IOAPIC
383 * recursively. Since remote_irr is cleared only after call
384 * to notifiers if the same vector will be delivered while lock
385 * is dropped it will be put into irr and will be delivered
386 * after ack notifier returns.
388 spin_unlock(&ioapic->lock);
389 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
390 spin_lock(&ioapic->lock);
392 if (trigger_mode != IOAPIC_LEVEL_TRIG)
393 continue;
395 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
396 ent->fields.remote_irr = 0;
397 if (!ent->fields.mask && (ioapic->irr & (1 << i)))
398 ioapic_service(ioapic, i, false);
402 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
404 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
405 smp_rmb();
406 return test_bit(vector, ioapic->handled_vectors);
409 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
411 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
413 spin_lock(&ioapic->lock);
414 __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
415 spin_unlock(&ioapic->lock);
418 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
420 return container_of(dev, struct kvm_ioapic, dev);
423 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
425 return ((addr >= ioapic->base_address &&
426 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
429 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
430 void *val)
432 struct kvm_ioapic *ioapic = to_ioapic(this);
433 u32 result;
434 if (!ioapic_in_range(ioapic, addr))
435 return -EOPNOTSUPP;
437 ioapic_debug("addr %lx\n", (unsigned long)addr);
438 ASSERT(!(addr & 0xf)); /* check alignment */
440 addr &= 0xff;
441 spin_lock(&ioapic->lock);
442 switch (addr) {
443 case IOAPIC_REG_SELECT:
444 result = ioapic->ioregsel;
445 break;
447 case IOAPIC_REG_WINDOW:
448 result = ioapic_read_indirect(ioapic, addr, len);
449 break;
451 default:
452 result = 0;
453 break;
455 spin_unlock(&ioapic->lock);
457 switch (len) {
458 case 8:
459 *(u64 *) val = result;
460 break;
461 case 1:
462 case 2:
463 case 4:
464 memcpy(val, (char *)&result, len);
465 break;
466 default:
467 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
469 return 0;
472 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
473 const void *val)
475 struct kvm_ioapic *ioapic = to_ioapic(this);
476 u32 data;
477 if (!ioapic_in_range(ioapic, addr))
478 return -EOPNOTSUPP;
480 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
481 (void*)addr, len, val);
482 ASSERT(!(addr & 0xf)); /* check alignment */
484 switch (len) {
485 case 8:
486 case 4:
487 data = *(u32 *) val;
488 break;
489 case 2:
490 data = *(u16 *) val;
491 break;
492 case 1:
493 data = *(u8 *) val;
494 break;
495 default:
496 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
497 return 0;
500 addr &= 0xff;
501 spin_lock(&ioapic->lock);
502 switch (addr) {
503 case IOAPIC_REG_SELECT:
504 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
505 break;
507 case IOAPIC_REG_WINDOW:
508 ioapic_write_indirect(ioapic, data);
509 break;
510 #ifdef CONFIG_IA64
511 case IOAPIC_REG_EOI:
512 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
513 break;
514 #endif
516 default:
517 break;
519 spin_unlock(&ioapic->lock);
520 return 0;
523 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
525 int i;
527 for (i = 0; i < IOAPIC_NUM_PINS; i++)
528 ioapic->redirtbl[i].fields.mask = 1;
529 ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
530 ioapic->ioregsel = 0;
531 ioapic->irr = 0;
532 ioapic->id = 0;
533 rtc_irq_eoi_tracking_reset(ioapic);
534 update_handled_vectors(ioapic);
537 static const struct kvm_io_device_ops ioapic_mmio_ops = {
538 .read = ioapic_mmio_read,
539 .write = ioapic_mmio_write,
542 int kvm_ioapic_init(struct kvm *kvm)
544 struct kvm_ioapic *ioapic;
545 int ret;
547 ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
548 if (!ioapic)
549 return -ENOMEM;
550 spin_lock_init(&ioapic->lock);
551 kvm->arch.vioapic = ioapic;
552 kvm_ioapic_reset(ioapic);
553 kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
554 ioapic->kvm = kvm;
555 mutex_lock(&kvm->slots_lock);
556 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
557 IOAPIC_MEM_LENGTH, &ioapic->dev);
558 mutex_unlock(&kvm->slots_lock);
559 if (ret < 0) {
560 kvm->arch.vioapic = NULL;
561 kfree(ioapic);
564 return ret;
567 void kvm_ioapic_destroy(struct kvm *kvm)
569 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
571 if (ioapic) {
572 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
573 kvm->arch.vioapic = NULL;
574 kfree(ioapic);
578 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
580 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
581 if (!ioapic)
582 return -EINVAL;
584 spin_lock(&ioapic->lock);
585 memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
586 spin_unlock(&ioapic->lock);
587 return 0;
590 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
592 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
593 if (!ioapic)
594 return -EINVAL;
596 spin_lock(&ioapic->lock);
597 memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
598 update_handled_vectors(ioapic);
599 kvm_vcpu_request_scan_ioapic(kvm);
600 kvm_rtc_eoi_tracking_restore_all(ioapic);
601 spin_unlock(&ioapic->lock);
602 return 0;