2 * PCI Express Hot Plug Controller Driver
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
32 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <linux/pci_hotplug.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h> /* signal_pending() */
37 #include <linux/pcieport_if.h>
38 #include <linux/mutex.h>
40 #define MY_NAME "pciehp"
42 extern int pciehp_poll_mode
;
43 extern int pciehp_poll_time
;
44 extern int pciehp_debug
;
45 extern int pciehp_force
;
46 extern struct workqueue_struct
*pciehp_wq
;
48 #define dbg(format, arg...) \
51 printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); \
53 #define err(format, arg...) \
54 printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
55 #define info(format, arg...) \
56 printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
57 #define warn(format, arg...) \
58 printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
60 #define ctrl_dbg(ctrl, format, arg...) \
63 dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
66 #define ctrl_err(ctrl, format, arg...) \
67 dev_err(&ctrl->pcie->device, format, ## arg)
68 #define ctrl_info(ctrl, format, arg...) \
69 dev_info(&ctrl->pcie->device, format, ## arg)
70 #define ctrl_warn(ctrl, format, arg...) \
71 dev_warn(&ctrl->pcie->device, format, ## arg)
73 #define SLOT_NAME_SIZE 10
80 struct controller
*ctrl
;
81 struct hpc_ops
*hpc_ops
;
82 struct hotplug_slot
*hotplug_slot
;
83 struct list_head slot_list
;
84 struct delayed_work work
; /* work for button event */
91 struct work_struct work
;
95 struct mutex crit_sect
; /* critical section mutex */
96 struct mutex ctrl_lock
; /* controller lock */
97 int num_slots
; /* Number of slots on ctlr */
98 int slot_num_inc
; /* 1 or -1 */
99 struct pci_dev
*pci_dev
;
100 struct pcie_device
*pcie
; /* PCI Express port service */
101 struct list_head slot_list
;
102 struct hpc_ops
*hpc_ops
;
103 wait_queue_head_t queue
; /* sleep & wake process */
104 u8 slot_device_offset
;
105 u32 first_slot
; /* First physical slot number */ /* PCIE only has 1 slot */
106 u8 slot_bus
; /* Bus where the slots handled by this controller sit */
109 struct timer_list poll_timer
;
110 unsigned int cmd_busy
:1;
111 unsigned int no_cmd_complete
:1;
112 unsigned int link_active_reporting
:1;
113 unsigned int notification_enabled
:1;
114 unsigned int power_fault_detected
;
117 #define INT_BUTTON_IGNORE 0
118 #define INT_PRESENCE_ON 1
119 #define INT_PRESENCE_OFF 2
120 #define INT_SWITCH_CLOSE 3
121 #define INT_SWITCH_OPEN 4
122 #define INT_POWER_FAULT 5
123 #define INT_POWER_FAULT_CLEAR 6
124 #define INT_BUTTON_PRESS 7
125 #define INT_BUTTON_RELEASE 8
126 #define INT_BUTTON_CANCEL 9
128 #define STATIC_STATE 0
129 #define BLINKINGON_STATE 1
130 #define BLINKINGOFF_STATE 2
131 #define POWERON_STATE 3
132 #define POWEROFF_STATE 4
135 #define INTERLOCK_OPEN 0x00000002
136 #define ADD_NOT_SUPPORTED 0x00000003
137 #define CARD_FUNCTIONING 0x00000005
138 #define ADAPTER_NOT_SAME 0x00000006
139 #define NO_ADAPTER_PRESENT 0x00000009
140 #define NOT_ENOUGH_RESOURCES 0x0000000B
141 #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
142 #define WRONG_BUS_FREQUENCY 0x0000000D
143 #define POWER_FAILURE 0x0000000E
145 /* Field definitions in Slot Capabilities Register */
146 #define ATTN_BUTTN_PRSN 0x00000001
147 #define PWR_CTRL_PRSN 0x00000002
148 #define MRL_SENS_PRSN 0x00000004
149 #define ATTN_LED_PRSN 0x00000008
150 #define PWR_LED_PRSN 0x00000010
151 #define HP_SUPR_RM_SUP 0x00000020
152 #define EMI_PRSN 0x00020000
153 #define NO_CMD_CMPL_SUP 0x00040000
155 #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN)
156 #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN)
157 #define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN)
158 #define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN)
159 #define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN)
160 #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP)
161 #define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN)
162 #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP)
164 extern int pciehp_sysfs_enable_slot(struct slot
*slot
);
165 extern int pciehp_sysfs_disable_slot(struct slot
*slot
);
166 extern u8
pciehp_handle_attention_button(struct slot
*p_slot
);
167 extern u8
pciehp_handle_switch_change(struct slot
*p_slot
);
168 extern u8
pciehp_handle_presence_change(struct slot
*p_slot
);
169 extern u8
pciehp_handle_power_fault(struct slot
*p_slot
);
170 extern int pciehp_configure_device(struct slot
*p_slot
);
171 extern int pciehp_unconfigure_device(struct slot
*p_slot
);
172 extern void pciehp_queue_pushbutton_work(struct work_struct
*work
);
173 struct controller
*pcie_init(struct pcie_device
*dev
);
174 int pcie_init_notification(struct controller
*ctrl
);
175 int pciehp_enable_slot(struct slot
*p_slot
);
176 int pciehp_disable_slot(struct slot
*p_slot
);
177 int pcie_enable_notification(struct controller
*ctrl
);
179 static inline const char *slot_name(struct slot
*slot
)
181 return hotplug_slot_name(slot
->hotplug_slot
);
184 static inline struct slot
*pciehp_find_slot(struct controller
*ctrl
, u8 device
)
188 list_for_each_entry(slot
, &ctrl
->slot_list
, slot_list
) {
189 if (slot
->device
== device
)
193 ctrl_err(ctrl
, "Slot (device=0x%02x) not found\n", device
);
198 int (*power_on_slot
)(struct slot
*slot
);
199 int (*power_off_slot
)(struct slot
*slot
);
200 int (*get_power_status
)(struct slot
*slot
, u8
*status
);
201 int (*get_attention_status
)(struct slot
*slot
, u8
*status
);
202 int (*set_attention_status
)(struct slot
*slot
, u8 status
);
203 int (*get_latch_status
)(struct slot
*slot
, u8
*status
);
204 int (*get_adapter_status
)(struct slot
*slot
, u8
*status
);
205 int (*get_max_bus_speed
)(struct slot
*slot
, enum pci_bus_speed
*speed
);
206 int (*get_cur_bus_speed
)(struct slot
*slot
, enum pci_bus_speed
*speed
);
207 int (*get_max_lnk_width
)(struct slot
*slot
, enum pcie_link_width
*val
);
208 int (*get_cur_lnk_width
)(struct slot
*slot
, enum pcie_link_width
*val
);
209 int (*query_power_fault
)(struct slot
*slot
);
210 void (*green_led_on
)(struct slot
*slot
);
211 void (*green_led_off
)(struct slot
*slot
);
212 void (*green_led_blink
)(struct slot
*slot
);
213 void (*release_ctlr
)(struct controller
*ctrl
);
214 int (*check_lnk_status
)(struct controller
*ctrl
);
218 #include <acpi/acpi.h>
219 #include <acpi/acpi_bus.h>
220 #include <linux/pci-acpi.h>
222 extern void __init
pciehp_acpi_slot_detection_init(void);
223 extern int pciehp_acpi_slot_detection_check(struct pci_dev
*dev
);
225 static inline void pciehp_firmware_init(void)
227 pciehp_acpi_slot_detection_init();
230 static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev
*dev
)
233 u32 flags
= (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
|
234 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
);
235 retval
= acpi_get_hp_hw_control_from_firmware(dev
, flags
);
238 return pciehp_acpi_slot_detection_check(dev
);
241 static inline int pciehp_get_hp_params_from_firmware(struct pci_dev
*dev
,
242 struct hotplug_params
*hpp
)
244 if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev
->bus
, hpp
)))
249 #define pciehp_firmware_init() do {} while (0)
250 #define pciehp_get_hp_hw_control_from_firmware(dev) 0
251 #define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV)
252 #endif /* CONFIG_ACPI */
253 #endif /* _PCIEHP_H */