2 * Base driver for Maxim MAX8925
4 * Copyright (C) 2009-2010 Marvell International Ltd.
5 * Haojian Zhuang <haojian.zhuang@marvell.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/i2c.h>
15 #include <linux/irq.h>
16 #include <linux/interrupt.h>
17 #include <linux/irqdomain.h>
18 #include <linux/platform_device.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/mfd/core.h>
21 #include <linux/mfd/max8925.h>
23 #include <linux/of_platform.h>
25 static struct resource bk_resources
[] = {
26 { 0x84, 0x84, "mode control", IORESOURCE_REG
, },
27 { 0x85, 0x85, "control", IORESOURCE_REG
, },
30 static struct mfd_cell bk_devs
[] = {
32 .name
= "max8925-backlight",
33 .num_resources
= ARRAY_SIZE(bk_resources
),
34 .resources
= &bk_resources
[0],
39 static struct resource touch_resources
[] = {
41 .name
= "max8925-tsc",
42 .start
= MAX8925_TSC_IRQ
,
43 .end
= MAX8925_ADC_RES_END
,
44 .flags
= IORESOURCE_REG
,
48 static const struct mfd_cell touch_devs
[] = {
50 .name
= "max8925-touch",
52 .resources
= &touch_resources
[0],
57 static struct resource power_supply_resources
[] = {
59 .name
= "max8925-power",
60 .start
= MAX8925_CHG_IRQ1
,
61 .end
= MAX8925_CHG_IRQ1_MASK
,
62 .flags
= IORESOURCE_REG
,
66 static const struct mfd_cell power_devs
[] = {
68 .name
= "max8925-power",
70 .resources
= &power_supply_resources
[0],
75 static struct resource rtc_resources
[] = {
77 .name
= "max8925-rtc",
78 .start
= MAX8925_IRQ_RTC_ALARM0
,
79 .end
= MAX8925_IRQ_RTC_ALARM0
,
80 .flags
= IORESOURCE_IRQ
,
84 static const struct mfd_cell rtc_devs
[] = {
86 .name
= "max8925-rtc",
88 .resources
= &rtc_resources
[0],
93 static struct resource onkey_resources
[] = {
95 .name
= "max8925-onkey",
96 .start
= MAX8925_IRQ_GPM_SW_R
,
97 .end
= MAX8925_IRQ_GPM_SW_R
,
98 .flags
= IORESOURCE_IRQ
,
100 .name
= "max8925-onkey",
101 .start
= MAX8925_IRQ_GPM_SW_F
,
102 .end
= MAX8925_IRQ_GPM_SW_F
,
103 .flags
= IORESOURCE_IRQ
,
107 static const struct mfd_cell onkey_devs
[] = {
109 .name
= "max8925-onkey",
111 .resources
= &onkey_resources
[0],
116 static struct resource sd1_resources
[] = {
117 {0x06, 0x06, "sdv", IORESOURCE_REG
, },
120 static struct resource sd2_resources
[] = {
121 {0x09, 0x09, "sdv", IORESOURCE_REG
, },
124 static struct resource sd3_resources
[] = {
125 {0x0c, 0x0c, "sdv", IORESOURCE_REG
, },
128 static struct resource ldo1_resources
[] = {
129 {0x1a, 0x1a, "ldov", IORESOURCE_REG
, },
132 static struct resource ldo2_resources
[] = {
133 {0x1e, 0x1e, "ldov", IORESOURCE_REG
, },
136 static struct resource ldo3_resources
[] = {
137 {0x22, 0x22, "ldov", IORESOURCE_REG
, },
140 static struct resource ldo4_resources
[] = {
141 {0x26, 0x26, "ldov", IORESOURCE_REG
, },
144 static struct resource ldo5_resources
[] = {
145 {0x2a, 0x2a, "ldov", IORESOURCE_REG
, },
148 static struct resource ldo6_resources
[] = {
149 {0x2e, 0x2e, "ldov", IORESOURCE_REG
, },
152 static struct resource ldo7_resources
[] = {
153 {0x32, 0x32, "ldov", IORESOURCE_REG
, },
156 static struct resource ldo8_resources
[] = {
157 {0x36, 0x36, "ldov", IORESOURCE_REG
, },
160 static struct resource ldo9_resources
[] = {
161 {0x3a, 0x3a, "ldov", IORESOURCE_REG
, },
164 static struct resource ldo10_resources
[] = {
165 {0x3e, 0x3e, "ldov", IORESOURCE_REG
, },
168 static struct resource ldo11_resources
[] = {
169 {0x42, 0x42, "ldov", IORESOURCE_REG
, },
172 static struct resource ldo12_resources
[] = {
173 {0x46, 0x46, "ldov", IORESOURCE_REG
, },
176 static struct resource ldo13_resources
[] = {
177 {0x4a, 0x4a, "ldov", IORESOURCE_REG
, },
180 static struct resource ldo14_resources
[] = {
181 {0x4e, 0x4e, "ldov", IORESOURCE_REG
, },
184 static struct resource ldo15_resources
[] = {
185 {0x52, 0x52, "ldov", IORESOURCE_REG
, },
188 static struct resource ldo16_resources
[] = {
189 {0x12, 0x12, "ldov", IORESOURCE_REG
, },
192 static struct resource ldo17_resources
[] = {
193 {0x16, 0x16, "ldov", IORESOURCE_REG
, },
196 static struct resource ldo18_resources
[] = {
197 {0x74, 0x74, "ldov", IORESOURCE_REG
, },
200 static struct resource ldo19_resources
[] = {
201 {0x5e, 0x5e, "ldov", IORESOURCE_REG
, },
204 static struct resource ldo20_resources
[] = {
205 {0x9e, 0x9e, "ldov", IORESOURCE_REG
, },
208 static struct mfd_cell reg_devs
[] = {
210 .name
= "max8925-regulator",
212 .num_resources
= ARRAY_SIZE(sd1_resources
),
213 .resources
= sd1_resources
,
215 .name
= "max8925-regulator",
217 .num_resources
= ARRAY_SIZE(sd2_resources
),
218 .resources
= sd2_resources
,
220 .name
= "max8925-regulator",
222 .num_resources
= ARRAY_SIZE(sd3_resources
),
223 .resources
= sd3_resources
,
225 .name
= "max8925-regulator",
227 .num_resources
= ARRAY_SIZE(ldo1_resources
),
228 .resources
= ldo1_resources
,
230 .name
= "max8925-regulator",
232 .num_resources
= ARRAY_SIZE(ldo2_resources
),
233 .resources
= ldo2_resources
,
235 .name
= "max8925-regulator",
237 .num_resources
= ARRAY_SIZE(ldo3_resources
),
238 .resources
= ldo3_resources
,
240 .name
= "max8925-regulator",
242 .num_resources
= ARRAY_SIZE(ldo4_resources
),
243 .resources
= ldo4_resources
,
245 .name
= "max8925-regulator",
247 .num_resources
= ARRAY_SIZE(ldo5_resources
),
248 .resources
= ldo5_resources
,
250 .name
= "max8925-regulator",
252 .num_resources
= ARRAY_SIZE(ldo6_resources
),
253 .resources
= ldo6_resources
,
255 .name
= "max8925-regulator",
257 .num_resources
= ARRAY_SIZE(ldo7_resources
),
258 .resources
= ldo7_resources
,
260 .name
= "max8925-regulator",
262 .num_resources
= ARRAY_SIZE(ldo8_resources
),
263 .resources
= ldo8_resources
,
265 .name
= "max8925-regulator",
267 .num_resources
= ARRAY_SIZE(ldo9_resources
),
268 .resources
= ldo9_resources
,
270 .name
= "max8925-regulator",
272 .num_resources
= ARRAY_SIZE(ldo10_resources
),
273 .resources
= ldo10_resources
,
275 .name
= "max8925-regulator",
277 .num_resources
= ARRAY_SIZE(ldo11_resources
),
278 .resources
= ldo11_resources
,
280 .name
= "max8925-regulator",
282 .num_resources
= ARRAY_SIZE(ldo12_resources
),
283 .resources
= ldo12_resources
,
285 .name
= "max8925-regulator",
287 .num_resources
= ARRAY_SIZE(ldo13_resources
),
288 .resources
= ldo13_resources
,
290 .name
= "max8925-regulator",
292 .num_resources
= ARRAY_SIZE(ldo14_resources
),
293 .resources
= ldo14_resources
,
295 .name
= "max8925-regulator",
297 .num_resources
= ARRAY_SIZE(ldo15_resources
),
298 .resources
= ldo15_resources
,
300 .name
= "max8925-regulator",
302 .num_resources
= ARRAY_SIZE(ldo16_resources
),
303 .resources
= ldo16_resources
,
305 .name
= "max8925-regulator",
307 .num_resources
= ARRAY_SIZE(ldo17_resources
),
308 .resources
= ldo17_resources
,
310 .name
= "max8925-regulator",
312 .num_resources
= ARRAY_SIZE(ldo18_resources
),
313 .resources
= ldo18_resources
,
315 .name
= "max8925-regulator",
317 .num_resources
= ARRAY_SIZE(ldo19_resources
),
318 .resources
= ldo19_resources
,
320 .name
= "max8925-regulator",
322 .num_resources
= ARRAY_SIZE(ldo20_resources
),
323 .resources
= ldo20_resources
,
328 FLAGS_ADC
= 1, /* register in ADC component */
329 FLAGS_RTC
, /* register in RTC component */
332 struct max8925_irq_data
{
335 int enable
; /* enable or not */
336 int offs
; /* bit offset in mask register */
341 static struct max8925_irq_data max8925_irqs
[] = {
342 [MAX8925_IRQ_VCHG_DC_OVP
] = {
343 .reg
= MAX8925_CHG_IRQ1
,
344 .mask_reg
= MAX8925_CHG_IRQ1_MASK
,
347 [MAX8925_IRQ_VCHG_DC_F
] = {
348 .reg
= MAX8925_CHG_IRQ1
,
349 .mask_reg
= MAX8925_CHG_IRQ1_MASK
,
352 [MAX8925_IRQ_VCHG_DC_R
] = {
353 .reg
= MAX8925_CHG_IRQ1
,
354 .mask_reg
= MAX8925_CHG_IRQ1_MASK
,
357 [MAX8925_IRQ_VCHG_THM_OK_R
] = {
358 .reg
= MAX8925_CHG_IRQ2
,
359 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
362 [MAX8925_IRQ_VCHG_THM_OK_F
] = {
363 .reg
= MAX8925_CHG_IRQ2
,
364 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
367 [MAX8925_IRQ_VCHG_SYSLOW_F
] = {
368 .reg
= MAX8925_CHG_IRQ2
,
369 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
372 [MAX8925_IRQ_VCHG_SYSLOW_R
] = {
373 .reg
= MAX8925_CHG_IRQ2
,
374 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
377 [MAX8925_IRQ_VCHG_RST
] = {
378 .reg
= MAX8925_CHG_IRQ2
,
379 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
382 [MAX8925_IRQ_VCHG_DONE
] = {
383 .reg
= MAX8925_CHG_IRQ2
,
384 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
387 [MAX8925_IRQ_VCHG_TOPOFF
] = {
388 .reg
= MAX8925_CHG_IRQ2
,
389 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
392 [MAX8925_IRQ_VCHG_TMR_FAULT
] = {
393 .reg
= MAX8925_CHG_IRQ2
,
394 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
397 [MAX8925_IRQ_GPM_RSTIN
] = {
398 .reg
= MAX8925_ON_OFF_IRQ1
,
399 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
402 [MAX8925_IRQ_GPM_MPL
] = {
403 .reg
= MAX8925_ON_OFF_IRQ1
,
404 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
407 [MAX8925_IRQ_GPM_SW_3SEC
] = {
408 .reg
= MAX8925_ON_OFF_IRQ1
,
409 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
412 [MAX8925_IRQ_GPM_EXTON_F
] = {
413 .reg
= MAX8925_ON_OFF_IRQ1
,
414 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
417 [MAX8925_IRQ_GPM_EXTON_R
] = {
418 .reg
= MAX8925_ON_OFF_IRQ1
,
419 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
422 [MAX8925_IRQ_GPM_SW_1SEC
] = {
423 .reg
= MAX8925_ON_OFF_IRQ1
,
424 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
427 [MAX8925_IRQ_GPM_SW_F
] = {
428 .reg
= MAX8925_ON_OFF_IRQ1
,
429 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
432 [MAX8925_IRQ_GPM_SW_R
] = {
433 .reg
= MAX8925_ON_OFF_IRQ1
,
434 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
437 [MAX8925_IRQ_GPM_SYSCKEN_F
] = {
438 .reg
= MAX8925_ON_OFF_IRQ2
,
439 .mask_reg
= MAX8925_ON_OFF_IRQ2_MASK
,
442 [MAX8925_IRQ_GPM_SYSCKEN_R
] = {
443 .reg
= MAX8925_ON_OFF_IRQ2
,
444 .mask_reg
= MAX8925_ON_OFF_IRQ2_MASK
,
447 [MAX8925_IRQ_RTC_ALARM1
] = {
448 .reg
= MAX8925_RTC_IRQ
,
449 .mask_reg
= MAX8925_RTC_IRQ_MASK
,
453 [MAX8925_IRQ_RTC_ALARM0
] = {
454 .reg
= MAX8925_RTC_IRQ
,
455 .mask_reg
= MAX8925_RTC_IRQ_MASK
,
459 [MAX8925_IRQ_TSC_STICK
] = {
460 .reg
= MAX8925_TSC_IRQ
,
461 .mask_reg
= MAX8925_TSC_IRQ_MASK
,
466 [MAX8925_IRQ_TSC_NSTICK
] = {
467 .reg
= MAX8925_TSC_IRQ
,
468 .mask_reg
= MAX8925_TSC_IRQ_MASK
,
475 static inline struct max8925_irq_data
*irq_to_max8925(struct max8925_chip
*chip
,
478 return &max8925_irqs
[irq
- chip
->irq_base
];
481 static irqreturn_t
max8925_irq(int irq
, void *data
)
483 struct max8925_chip
*chip
= data
;
484 struct max8925_irq_data
*irq_data
;
485 struct i2c_client
*i2c
;
486 int read_reg
= -1, value
= 0;
489 for (i
= 0; i
< ARRAY_SIZE(max8925_irqs
); i
++) {
490 irq_data
= &max8925_irqs
[i
];
491 /* TSC IRQ should be serviced in max8925_tsc_irq() */
492 if (irq_data
->tsc_irq
)
494 if (irq_data
->flags
== FLAGS_RTC
)
496 else if (irq_data
->flags
== FLAGS_ADC
)
500 if (read_reg
!= irq_data
->reg
) {
501 read_reg
= irq_data
->reg
;
502 value
= max8925_reg_read(i2c
, irq_data
->reg
);
504 if (value
& irq_data
->enable
)
505 handle_nested_irq(chip
->irq_base
+ i
);
510 static irqreturn_t
max8925_tsc_irq(int irq
, void *data
)
512 struct max8925_chip
*chip
= data
;
513 struct max8925_irq_data
*irq_data
;
514 struct i2c_client
*i2c
;
515 int read_reg
= -1, value
= 0;
518 for (i
= 0; i
< ARRAY_SIZE(max8925_irqs
); i
++) {
519 irq_data
= &max8925_irqs
[i
];
520 /* non TSC IRQ should be serviced in max8925_irq() */
521 if (!irq_data
->tsc_irq
)
523 if (irq_data
->flags
== FLAGS_RTC
)
525 else if (irq_data
->flags
== FLAGS_ADC
)
529 if (read_reg
!= irq_data
->reg
) {
530 read_reg
= irq_data
->reg
;
531 value
= max8925_reg_read(i2c
, irq_data
->reg
);
533 if (value
& irq_data
->enable
)
534 handle_nested_irq(chip
->irq_base
+ i
);
539 static void max8925_irq_lock(struct irq_data
*data
)
541 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
543 mutex_lock(&chip
->irq_lock
);
546 static void max8925_irq_sync_unlock(struct irq_data
*data
)
548 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
549 struct max8925_irq_data
*irq_data
;
550 static unsigned char cache_chg
[2] = {0xff, 0xff};
551 static unsigned char cache_on
[2] = {0xff, 0xff};
552 static unsigned char cache_rtc
= 0xff, cache_tsc
= 0xff;
553 unsigned char irq_chg
[2], irq_on
[2];
554 unsigned char irq_rtc
, irq_tsc
;
557 /* Load cached value. In initial, all IRQs are masked */
558 irq_chg
[0] = cache_chg
[0];
559 irq_chg
[1] = cache_chg
[1];
560 irq_on
[0] = cache_on
[0];
561 irq_on
[1] = cache_on
[1];
564 for (i
= 0; i
< ARRAY_SIZE(max8925_irqs
); i
++) {
565 irq_data
= &max8925_irqs
[i
];
566 /* 1 -- disable, 0 -- enable */
567 switch (irq_data
->mask_reg
) {
568 case MAX8925_CHG_IRQ1_MASK
:
569 irq_chg
[0] &= ~irq_data
->enable
;
571 case MAX8925_CHG_IRQ2_MASK
:
572 irq_chg
[1] &= ~irq_data
->enable
;
574 case MAX8925_ON_OFF_IRQ1_MASK
:
575 irq_on
[0] &= ~irq_data
->enable
;
577 case MAX8925_ON_OFF_IRQ2_MASK
:
578 irq_on
[1] &= ~irq_data
->enable
;
580 case MAX8925_RTC_IRQ_MASK
:
581 irq_rtc
&= ~irq_data
->enable
;
583 case MAX8925_TSC_IRQ_MASK
:
584 irq_tsc
&= ~irq_data
->enable
;
587 dev_err(chip
->dev
, "wrong IRQ\n");
591 /* update mask into registers */
592 if (cache_chg
[0] != irq_chg
[0]) {
593 cache_chg
[0] = irq_chg
[0];
594 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ1_MASK
,
597 if (cache_chg
[1] != irq_chg
[1]) {
598 cache_chg
[1] = irq_chg
[1];
599 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ2_MASK
,
602 if (cache_on
[0] != irq_on
[0]) {
603 cache_on
[0] = irq_on
[0];
604 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ1_MASK
,
607 if (cache_on
[1] != irq_on
[1]) {
608 cache_on
[1] = irq_on
[1];
609 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ2_MASK
,
612 if (cache_rtc
!= irq_rtc
) {
614 max8925_reg_write(chip
->rtc
, MAX8925_RTC_IRQ_MASK
, irq_rtc
);
616 if (cache_tsc
!= irq_tsc
) {
618 max8925_reg_write(chip
->adc
, MAX8925_TSC_IRQ_MASK
, irq_tsc
);
621 mutex_unlock(&chip
->irq_lock
);
624 static void max8925_irq_enable(struct irq_data
*data
)
626 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
627 max8925_irqs
[data
->irq
- chip
->irq_base
].enable
628 = max8925_irqs
[data
->irq
- chip
->irq_base
].offs
;
631 static void max8925_irq_disable(struct irq_data
*data
)
633 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
634 max8925_irqs
[data
->irq
- chip
->irq_base
].enable
= 0;
637 static struct irq_chip max8925_irq_chip
= {
639 .irq_bus_lock
= max8925_irq_lock
,
640 .irq_bus_sync_unlock
= max8925_irq_sync_unlock
,
641 .irq_enable
= max8925_irq_enable
,
642 .irq_disable
= max8925_irq_disable
,
645 static int max8925_irq_domain_map(struct irq_domain
*d
, unsigned int virq
,
648 irq_set_chip_data(virq
, d
->host_data
);
649 irq_set_chip_and_handler(virq
, &max8925_irq_chip
, handle_edge_irq
);
650 irq_set_nested_thread(virq
, 1);
652 set_irq_flags(virq
, IRQF_VALID
);
654 irq_set_noprobe(virq
);
659 static struct irq_domain_ops max8925_irq_domain_ops
= {
660 .map
= max8925_irq_domain_map
,
661 .xlate
= irq_domain_xlate_onetwocell
,
665 static int max8925_irq_init(struct max8925_chip
*chip
, int irq
,
666 struct max8925_platform_data
*pdata
)
668 unsigned long flags
= IRQF_TRIGGER_FALLING
| IRQF_ONESHOT
;
670 struct device_node
*node
= chip
->dev
->of_node
;
672 /* clear all interrupts */
673 max8925_reg_read(chip
->i2c
, MAX8925_CHG_IRQ1
);
674 max8925_reg_read(chip
->i2c
, MAX8925_CHG_IRQ2
);
675 max8925_reg_read(chip
->i2c
, MAX8925_ON_OFF_IRQ1
);
676 max8925_reg_read(chip
->i2c
, MAX8925_ON_OFF_IRQ2
);
677 max8925_reg_read(chip
->rtc
, MAX8925_RTC_IRQ
);
678 max8925_reg_read(chip
->adc
, MAX8925_TSC_IRQ
);
679 /* mask all interrupts except for TSC */
680 max8925_reg_write(chip
->rtc
, MAX8925_ALARM0_CNTL
, 0);
681 max8925_reg_write(chip
->rtc
, MAX8925_ALARM1_CNTL
, 0);
682 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ1_MASK
, 0xff);
683 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ2_MASK
, 0xff);
684 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ1_MASK
, 0xff);
685 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ2_MASK
, 0xff);
686 max8925_reg_write(chip
->rtc
, MAX8925_RTC_IRQ_MASK
, 0xff);
688 mutex_init(&chip
->irq_lock
);
689 chip
->irq_base
= irq_alloc_descs(-1, 0, MAX8925_NR_IRQS
, 0);
690 if (chip
->irq_base
< 0) {
691 dev_err(chip
->dev
, "Failed to allocate interrupts, ret:%d\n",
696 irq_domain_add_legacy(node
, MAX8925_NR_IRQS
, chip
->irq_base
, 0,
697 &max8925_irq_domain_ops
, chip
);
699 /* request irq handler for pmic main irq*/
700 chip
->core_irq
= irq
;
703 ret
= request_threaded_irq(irq
, NULL
, max8925_irq
, flags
| IRQF_ONESHOT
,
706 dev_err(chip
->dev
, "Failed to request core IRQ: %d\n", ret
);
711 /* request irq handler for pmic tsc irq*/
713 /* mask TSC interrupt */
714 max8925_reg_write(chip
->adc
, MAX8925_TSC_IRQ_MASK
, 0x0f);
716 if (!pdata
->tsc_irq
) {
717 dev_warn(chip
->dev
, "No interrupt support on TSC IRQ\n");
720 chip
->tsc_irq
= pdata
->tsc_irq
;
721 ret
= request_threaded_irq(chip
->tsc_irq
, NULL
, max8925_tsc_irq
,
722 flags
| IRQF_ONESHOT
, "max8925-tsc", chip
);
724 dev_err(chip
->dev
, "Failed to request TSC IRQ: %d\n", ret
);
730 static void init_regulator(struct max8925_chip
*chip
,
731 struct max8925_platform_data
*pdata
)
738 reg_devs
[0].platform_data
= pdata
->sd1
;
739 reg_devs
[0].pdata_size
= sizeof(struct regulator_init_data
);
742 reg_devs
[1].platform_data
= pdata
->sd2
;
743 reg_devs
[1].pdata_size
= sizeof(struct regulator_init_data
);
746 reg_devs
[2].platform_data
= pdata
->sd3
;
747 reg_devs
[2].pdata_size
= sizeof(struct regulator_init_data
);
750 reg_devs
[3].platform_data
= pdata
->ldo1
;
751 reg_devs
[3].pdata_size
= sizeof(struct regulator_init_data
);
754 reg_devs
[4].platform_data
= pdata
->ldo2
;
755 reg_devs
[4].pdata_size
= sizeof(struct regulator_init_data
);
758 reg_devs
[5].platform_data
= pdata
->ldo3
;
759 reg_devs
[5].pdata_size
= sizeof(struct regulator_init_data
);
762 reg_devs
[6].platform_data
= pdata
->ldo4
;
763 reg_devs
[6].pdata_size
= sizeof(struct regulator_init_data
);
766 reg_devs
[7].platform_data
= pdata
->ldo5
;
767 reg_devs
[7].pdata_size
= sizeof(struct regulator_init_data
);
770 reg_devs
[8].platform_data
= pdata
->ldo6
;
771 reg_devs
[8].pdata_size
= sizeof(struct regulator_init_data
);
774 reg_devs
[9].platform_data
= pdata
->ldo7
;
775 reg_devs
[9].pdata_size
= sizeof(struct regulator_init_data
);
778 reg_devs
[10].platform_data
= pdata
->ldo8
;
779 reg_devs
[10].pdata_size
= sizeof(struct regulator_init_data
);
782 reg_devs
[11].platform_data
= pdata
->ldo9
;
783 reg_devs
[11].pdata_size
= sizeof(struct regulator_init_data
);
786 reg_devs
[12].platform_data
= pdata
->ldo10
;
787 reg_devs
[12].pdata_size
= sizeof(struct regulator_init_data
);
790 reg_devs
[13].platform_data
= pdata
->ldo11
;
791 reg_devs
[13].pdata_size
= sizeof(struct regulator_init_data
);
794 reg_devs
[14].platform_data
= pdata
->ldo12
;
795 reg_devs
[14].pdata_size
= sizeof(struct regulator_init_data
);
798 reg_devs
[15].platform_data
= pdata
->ldo13
;
799 reg_devs
[15].pdata_size
= sizeof(struct regulator_init_data
);
802 reg_devs
[16].platform_data
= pdata
->ldo14
;
803 reg_devs
[16].pdata_size
= sizeof(struct regulator_init_data
);
806 reg_devs
[17].platform_data
= pdata
->ldo15
;
807 reg_devs
[17].pdata_size
= sizeof(struct regulator_init_data
);
810 reg_devs
[18].platform_data
= pdata
->ldo16
;
811 reg_devs
[18].pdata_size
= sizeof(struct regulator_init_data
);
814 reg_devs
[19].platform_data
= pdata
->ldo17
;
815 reg_devs
[19].pdata_size
= sizeof(struct regulator_init_data
);
818 reg_devs
[20].platform_data
= pdata
->ldo18
;
819 reg_devs
[20].pdata_size
= sizeof(struct regulator_init_data
);
822 reg_devs
[21].platform_data
= pdata
->ldo19
;
823 reg_devs
[21].pdata_size
= sizeof(struct regulator_init_data
);
826 reg_devs
[22].platform_data
= pdata
->ldo20
;
827 reg_devs
[22].pdata_size
= sizeof(struct regulator_init_data
);
829 ret
= mfd_add_devices(chip
->dev
, 0, reg_devs
, ARRAY_SIZE(reg_devs
),
832 dev_err(chip
->dev
, "Failed to add regulator subdev\n");
837 int max8925_device_init(struct max8925_chip
*chip
,
838 struct max8925_platform_data
*pdata
)
842 max8925_irq_init(chip
, chip
->i2c
->irq
, pdata
);
844 if (pdata
&& (pdata
->power
|| pdata
->touch
)) {
845 /* enable ADC to control internal reference */
846 max8925_set_bits(chip
->i2c
, MAX8925_RESET_CNFG
, 1, 1);
847 /* enable internal reference for ADC */
848 max8925_set_bits(chip
->adc
, MAX8925_TSC_CNFG1
, 3, 2);
849 /* check for internal reference IRQ */
851 ret
= max8925_reg_read(chip
->adc
, MAX8925_TSC_IRQ
);
852 } while (ret
& MAX8925_NREF_OK
);
853 /* enaable ADC scheduler, interval is 1 second */
854 max8925_set_bits(chip
->adc
, MAX8925_ADC_SCHED
, 3, 2);
857 /* enable Momentary Power Loss */
858 max8925_set_bits(chip
->rtc
, MAX8925_MPL_CNTL
, 1 << 4, 1 << 4);
860 ret
= mfd_add_devices(chip
->dev
, 0, &rtc_devs
[0],
861 ARRAY_SIZE(rtc_devs
),
862 NULL
, chip
->irq_base
, NULL
);
864 dev_err(chip
->dev
, "Failed to add rtc subdev\n");
868 ret
= mfd_add_devices(chip
->dev
, 0, &onkey_devs
[0],
869 ARRAY_SIZE(onkey_devs
),
870 NULL
, chip
->irq_base
, NULL
);
872 dev_err(chip
->dev
, "Failed to add onkey subdev\n");
876 init_regulator(chip
, pdata
);
878 if (pdata
&& pdata
->backlight
) {
879 bk_devs
[0].platform_data
= &pdata
->backlight
;
880 bk_devs
[0].pdata_size
= sizeof(struct max8925_backlight_pdata
);
882 ret
= mfd_add_devices(chip
->dev
, 0, bk_devs
, ARRAY_SIZE(bk_devs
),
885 dev_err(chip
->dev
, "Failed to add backlight subdev\n");
889 ret
= mfd_add_devices(chip
->dev
, 0, &power_devs
[0],
890 ARRAY_SIZE(power_devs
),
894 "Failed to add power supply subdev, err = %d\n", ret
);
898 if (pdata
&& pdata
->touch
) {
899 ret
= mfd_add_devices(chip
->dev
, 0, &touch_devs
[0],
900 ARRAY_SIZE(touch_devs
),
901 NULL
, chip
->tsc_irq
, NULL
);
903 dev_err(chip
->dev
, "Failed to add touch subdev\n");
910 mfd_remove_devices(chip
->dev
);
915 void max8925_device_exit(struct max8925_chip
*chip
)
918 free_irq(chip
->core_irq
, chip
);
920 free_irq(chip
->tsc_irq
, chip
);
921 mfd_remove_devices(chip
->dev
);
925 MODULE_DESCRIPTION("PMIC Driver for Maxim MAX8925");
926 MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com");
927 MODULE_LICENSE("GPL");