drivers/acpi/acpi_lpss.c

   1 /*
   2  * ACPI support for Intel Lynxpoint LPSS.
   3  *
   4  * Copyright (C) 2013, Intel Corporation
   5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/acpi.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/clk-provider.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/mutex.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/platform_data/clk-lpss.h>
  21 #include <linux/platform_data/x86/pmc_atom.h>
  22 #include <linux/pm_domain.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/pwm.h>
  25 #include <linux/suspend.h>
  26 #include <linux/delay.h>
  27
  28 #include "internal.h"
  29
  30 ACPI_MODULE_NAME("acpi_lpss");
  31
  32 #ifdef CONFIG_X86_INTEL_LPSS
  33
  34 #include <asm/cpu_device_id.h>
  35 #include <asm/intel-family.h>
  36 #include <asm/iosf_mbi.h>
  37
  38 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  39
  40 #define LPSS_CLK_SIZE   0x04
  41 #define LPSS_LTR_SIZE   0x18
  42
  43 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  44 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  45 #define LPSS_RESETS                     0x04
  46 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  47 #define LPSS_RESETS_RESET_APB           BIT(1)
  48 #define LPSS_GENERAL                    0x08
  49 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  50 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  51 #define LPSS_SW_LTR                     0x10
  52 #define LPSS_AUTO_LTR                   0x14
  53 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  54 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  55 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  56 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  57 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  58 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  59 #define LPSS_LTR_MAX_VAL                0x3FF
  60 #define LPSS_TX_INT                     0x20
  61 #define LPSS_TX_INT_MASK                BIT(1)
  62
  63 #define LPSS_PRV_REG_COUNT              9
  64
  65 /* LPSS Flags */
  66 #define LPSS_CLK                        BIT(0)
  67 #define LPSS_CLK_GATE                   BIT(1)
  68 #define LPSS_CLK_DIVIDER                BIT(2)
  69 #define LPSS_LTR                        BIT(3)
  70 #define LPSS_SAVE_CTX                   BIT(4)
  71 #define LPSS_NO_D3_DELAY                BIT(5)
  72
  73 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
  74 #define BYT_CRC_HRV                     2
  75 #define CHT_CRC_HRV                     3
  76
  77 struct lpss_private_data;
  78
  79 struct lpss_device_desc {
  80         unsigned int flags;
  81         const char *clk_con_id;
  82         unsigned int prv_offset;
  83         size_t prv_size_override;
  84         struct property_entry *properties;
  85         void (*setup)(struct lpss_private_data *pdata);
  86 };
  87
  88 static const struct lpss_device_desc lpss_dma_desc = {
  89         .flags = LPSS_CLK,
  90 };
  91
  92 struct lpss_private_data {
  93         struct acpi_device *adev;
  94         void __iomem *mmio_base;
  95         resource_size_t mmio_size;
  96         unsigned int fixed_clk_rate;
  97         struct clk *clk;
  98         const struct lpss_device_desc *dev_desc;
  99         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
 100 };
 101
 102 /* LPSS run time quirks */
 103 static unsigned int lpss_quirks;
 104
 105 /*
 106  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 107  *
 108  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 109  * it can be powered off automatically whenever the last LPSS device goes down.
 110  * In case of no power any access to the DMA controller will hang the system.
 111  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 112  * well as on ASuS T100TA transformer.
 113  *
 114  * This quirk overrides power state of entire LPSS island to keep DMA powered
 115  * on whenever we have at least one other device in use.
 116  */
 117 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 118
 119 /* UART Component Parameter Register */
 120 #define LPSS_UART_CPR                   0xF4
 121 #define LPSS_UART_CPR_AFCE              BIT(4)
 122
 123 static void lpss_uart_setup(struct lpss_private_data *pdata)
 124 {
 125         unsigned int offset;
 126         u32 val;
 127
 128         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 129         val = readl(pdata->mmio_base + offset);
 130         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 131
 132         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 133         if (!(val & LPSS_UART_CPR_AFCE)) {
 134                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 135                 val = readl(pdata->mmio_base + offset);
 136                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 137                 writel(val, pdata->mmio_base + offset);
 138         }
 139 }
 140
 141 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 142 {
 143         unsigned int offset;
 144         u32 val;
 145
 146         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 147         val = readl(pdata->mmio_base + offset);
 148         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 149         writel(val, pdata->mmio_base + offset);
 150 }
 151
 152 /*
 153  * BYT PWM used for backlight control by the i915 driver on systems without
 154  * the Crystal Cove PMIC.
 155  */
 156 static struct pwm_lookup byt_pwm_lookup[] = {
 157         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 158                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 159                                "pwm-lpss-platform"),
 160 };
 161
 162 static void byt_pwm_setup(struct lpss_private_data *pdata)
 163 {
 164         struct acpi_device *adev = pdata->adev;
 165
 166         /* Only call pwm_add_table for the first PWM controller */
 167         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 168                 return;
 169
 170         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
 171                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 172 }
 173
 174 #define LPSS_I2C_ENABLE                 0x6c
 175
 176 static void byt_i2c_setup(struct lpss_private_data *pdata)
 177 {
 178         lpss_deassert_reset(pdata);
 179
 180         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 181                 pdata->fixed_clk_rate = 133000000;
 182
 183         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 184 }
 185
 186 /* BSW PWM used for backlight control by the i915 driver */
 187 static struct pwm_lookup bsw_pwm_lookup[] = {
 188         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 189                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 190                                "pwm-lpss-platform"),
 191 };
 192
 193 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 194 {
 195         struct acpi_device *adev = pdata->adev;
 196
 197         /* Only call pwm_add_table for the first PWM controller */
 198         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 199                 return;
 200
 201         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 202 }
 203
 204 static const struct lpss_device_desc lpt_dev_desc = {
 205         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 206         .prv_offset = 0x800,
 207 };
 208
 209 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 210         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
 211         .prv_offset = 0x800,
 212 };
 213
 214 static struct property_entry uart_properties[] = {
 215         PROPERTY_ENTRY_U32("reg-io-width", 4),
 216         PROPERTY_ENTRY_U32("reg-shift", 2),
 217         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 218         { },
 219 };
 220
 221 static const struct lpss_device_desc lpt_uart_dev_desc = {
 222         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 223         .clk_con_id = "baudclk",
 224         .prv_offset = 0x800,
 225         .setup = lpss_uart_setup,
 226         .properties = uart_properties,
 227 };
 228
 229 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 230         .flags = LPSS_LTR,
 231         .prv_offset = 0x1000,
 232         .prv_size_override = 0x1018,
 233 };
 234
 235 static const struct lpss_device_desc byt_pwm_dev_desc = {
 236         .flags = LPSS_SAVE_CTX,
 237         .prv_offset = 0x800,
 238         .setup = byt_pwm_setup,
 239 };
 240
 241 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 242         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 243         .prv_offset = 0x800,
 244         .setup = bsw_pwm_setup,
 245 };
 246
 247 static const struct lpss_device_desc byt_uart_dev_desc = {
 248         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 249         .clk_con_id = "baudclk",
 250         .prv_offset = 0x800,
 251         .setup = lpss_uart_setup,
 252         .properties = uart_properties,
 253 };
 254
 255 static const struct lpss_device_desc bsw_uart_dev_desc = {
 256         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 257                         | LPSS_NO_D3_DELAY,
 258         .clk_con_id = "baudclk",
 259         .prv_offset = 0x800,
 260         .setup = lpss_uart_setup,
 261         .properties = uart_properties,
 262 };
 263
 264 static const struct lpss_device_desc byt_spi_dev_desc = {
 265         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 266         .prv_offset = 0x400,
 267 };
 268
 269 static const struct lpss_device_desc byt_sdio_dev_desc = {
 270         .flags = LPSS_CLK,
 271 };
 272
 273 static const struct lpss_device_desc byt_i2c_dev_desc = {
 274         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 275         .prv_offset = 0x800,
 276         .setup = byt_i2c_setup,
 277 };
 278
 279 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 280         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 281         .prv_offset = 0x800,
 282         .setup = byt_i2c_setup,
 283 };
 284
 285 static const struct lpss_device_desc bsw_spi_dev_desc = {
 286         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 287                         | LPSS_NO_D3_DELAY,
 288         .prv_offset = 0x400,
 289         .setup = lpss_deassert_reset,
 290 };
 291
 292 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 293
 294 static const struct x86_cpu_id lpss_cpu_ids[] = {
 295         ICPU(INTEL_FAM6_ATOM_SILVERMONT1),      /* Valleyview, Bay Trail */
 296         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 297         {}
 298 };
 299
 300 #else
 301
 302 #define LPSS_ADDR(desc) (0UL)
 303
 304 #endif /* CONFIG_X86_INTEL_LPSS */
 305
 306 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 307         /* Generic LPSS devices */
 308         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 309
 310         /* Lynxpoint LPSS devices */
 311         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 312         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 313         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 314         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 315         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 316         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 317         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 318         { "INT33C7", },
 319
 320         /* BayTrail LPSS devices */
 321         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 322         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 323         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 324         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 325         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 326         { "INT33B2", },
 327         { "INT33FC", },
 328
 329         /* Braswell LPSS devices */
 330         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 331         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 332         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 333         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 334
 335         /* Broadwell LPSS devices */
 336         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 337         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 338         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 339         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 340         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 341         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 342         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 343         { "INT3437", },
 344
 345         /* Wildcat Point LPSS devices */
 346         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 347
 348         { }
 349 };
 350
 351 #ifdef CONFIG_X86_INTEL_LPSS
 352
 353 static int is_memory(struct acpi_resource *res, void *not_used)
 354 {
 355         struct resource r;
 356         return !acpi_dev_resource_memory(res, &r);
 357 }
 358
 359 /* LPSS main clock device. */
 360 static struct platform_device *lpss_clk_dev;
 361
 362 static inline void lpt_register_clock_device(void)
 363 {
 364         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 365 }
 366
 367 static int register_device_clock(struct acpi_device *adev,
 368                                  struct lpss_private_data *pdata)
 369 {
 370         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 371         const char *devname = dev_name(&adev->dev);
 372         struct clk *clk;
 373         struct lpss_clk_data *clk_data;
 374         const char *parent, *clk_name;
 375         void __iomem *prv_base;
 376
 377         if (!lpss_clk_dev)
 378                 lpt_register_clock_device();
 379
 380         clk_data = platform_get_drvdata(lpss_clk_dev);
 381         if (!clk_data)
 382                 return -ENODEV;
 383         clk = clk_data->clk;
 384
 385         if (!pdata->mmio_base
 386             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 387                 return -ENODATA;
 388
 389         parent = clk_data->name;
 390         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 391
 392         if (pdata->fixed_clk_rate) {
 393                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 394                                               pdata->fixed_clk_rate);
 395                 goto out;
 396         }
 397
 398         if (dev_desc->flags & LPSS_CLK_GATE) {
 399                 clk = clk_register_gate(NULL, devname, parent, 0,
 400                                         prv_base, 0, 0, NULL);
 401                 parent = devname;
 402         }
 403
 404         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 405                 /* Prevent division by zero */
 406                 if (!readl(prv_base))
 407                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 408
 409                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 410                 if (!clk_name)
 411                         return -ENOMEM;
 412                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 413                                                       0, prv_base,
 414                                                       1, 15, 16, 15, 0, NULL);
 415                 parent = clk_name;
 416
 417                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 418                 if (!clk_name) {
 419                         kfree(parent);
 420                         return -ENOMEM;
 421                 }
 422                 clk = clk_register_gate(NULL, clk_name, parent,
 423                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 424                                         prv_base, 31, 0, NULL);
 425                 kfree(parent);
 426                 kfree(clk_name);
 427         }
 428 out:
 429         if (IS_ERR(clk))
 430                 return PTR_ERR(clk);
 431
 432         pdata->clk = clk;
 433         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 434         return 0;
 435 }
 436
 437 struct lpss_device_links {
 438         const char *supplier_hid;
 439         const char *supplier_uid;
 440         const char *consumer_hid;
 441         const char *consumer_uid;
 442         u32 flags;
 443 };
 444
 445 /*
 446  * The _DEP method is used to identify dependencies but instead of creating
 447  * device links for every handle in _DEP, only links in the following list are
 448  * created. That is necessary because, in the general case, _DEP can refer to
 449  * devices that might not have drivers, or that are on different buses, or where
 450  * the supplier is not enumerated until after the consumer is probed.
 451  */
 452 static const struct lpss_device_links lpss_device_links[] = {
 453         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 454 };
 455
 456 static bool hid_uid_match(const char *hid1, const char *uid1,
 457                           const char *hid2, const char *uid2)
 458 {
 459         return !strcmp(hid1, hid2) && uid1 && uid2 && !strcmp(uid1, uid2);
 460 }
 461
 462 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 463                                   const struct lpss_device_links *link)
 464 {
 465         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 466                              link->supplier_hid, link->supplier_uid);
 467 }
 468
 469 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 470                                   const struct lpss_device_links *link)
 471 {
 472         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 473                              link->consumer_hid, link->consumer_uid);
 474 }
 475
 476 struct hid_uid {
 477         const char *hid;
 478         const char *uid;
 479 };
 480
 481 static int match_hid_uid(struct device *dev, void *data)
 482 {
 483         struct acpi_device *adev = ACPI_COMPANION(dev);
 484         struct hid_uid *id = data;
 485
 486         if (!adev)
 487                 return 0;
 488
 489         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 490                              id->hid, id->uid);
 491 }
 492
 493 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 494 {
 495         struct hid_uid data = {
 496                 .hid = hid,
 497                 .uid = uid,
 498         };
 499
 500         return bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 501 }
 502
 503 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 504 {
 505         struct acpi_handle_list dep_devices;
 506         acpi_status status;
 507         int i;
 508
 509         if (!acpi_has_method(adev->handle, "_DEP"))
 510                 return false;
 511
 512         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 513                                          &dep_devices);
 514         if (ACPI_FAILURE(status)) {
 515                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 516                 return false;
 517         }
 518
 519         for (i = 0; i < dep_devices.count; i++) {
 520                 if (dep_devices.handles[i] == handle)
 521                         return true;
 522         }
 523
 524         return false;
 525 }
 526
 527 static void acpi_lpss_link_consumer(struct device *dev1,
 528                                     const struct lpss_device_links *link)
 529 {
 530         struct device *dev2;
 531
 532         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 533         if (!dev2)
 534                 return;
 535
 536         if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 537                 device_link_add(dev2, dev1, link->flags);
 538
 539         put_device(dev2);
 540 }
 541
 542 static void acpi_lpss_link_supplier(struct device *dev1,
 543                                     const struct lpss_device_links *link)
 544 {
 545         struct device *dev2;
 546
 547         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 548         if (!dev2)
 549                 return;
 550
 551         if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 552                 device_link_add(dev1, dev2, link->flags);
 553
 554         put_device(dev2);
 555 }
 556
 557 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 558                                           struct platform_device *pdev)
 559 {
 560         int i;
 561
 562         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 563                 const struct lpss_device_links *link = &lpss_device_links[i];
 564
 565                 if (acpi_lpss_is_supplier(adev, link))
 566                         acpi_lpss_link_consumer(&pdev->dev, link);
 567
 568                 if (acpi_lpss_is_consumer(adev, link))
 569                         acpi_lpss_link_supplier(&pdev->dev, link);
 570         }
 571 }
 572
 573 static int acpi_lpss_create_device(struct acpi_device *adev,
 574                                    const struct acpi_device_id *id)
 575 {
 576         const struct lpss_device_desc *dev_desc;
 577         struct lpss_private_data *pdata;
 578         struct resource_entry *rentry;
 579         struct list_head resource_list;
 580         struct platform_device *pdev;
 581         int ret;
 582
 583         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 584         if (!dev_desc) {
 585                 pdev = acpi_create_platform_device(adev, NULL);
 586                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 587         }
 588         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 589         if (!pdata)
 590                 return -ENOMEM;
 591
 592         INIT_LIST_HEAD(&resource_list);
 593         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 594         if (ret < 0)
 595                 goto err_out;
 596
 597         list_for_each_entry(rentry, &resource_list, node)
 598                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 599                         if (dev_desc->prv_size_override)
 600                                 pdata->mmio_size = dev_desc->prv_size_override;
 601                         else
 602                                 pdata->mmio_size = resource_size(rentry->res);
 603                         pdata->mmio_base = ioremap(rentry->res->start,
 604                                                    pdata->mmio_size);
 605                         break;
 606                 }
 607
 608         acpi_dev_free_resource_list(&resource_list);
 609
 610         if (!pdata->mmio_base) {
 611                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 612                 adev->pnp.type.platform_id = 0;
 613                 /* Skip the device, but continue the namespace scan. */
 614                 ret = 0;
 615                 goto err_out;
 616         }
 617
 618         pdata->adev = adev;
 619         pdata->dev_desc = dev_desc;
 620
 621         if (dev_desc->setup)
 622                 dev_desc->setup(pdata);
 623
 624         if (dev_desc->flags & LPSS_CLK) {
 625                 ret = register_device_clock(adev, pdata);
 626                 if (ret) {
 627                         /* Skip the device, but continue the namespace scan. */
 628                         ret = 0;
 629                         goto err_out;
 630                 }
 631         }
 632
 633         /*
 634          * This works around a known issue in ACPI tables where LPSS devices
 635          * have _PS0 and _PS3 without _PSC (and no power resources), so
 636          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 637          */
 638         ret = acpi_device_fix_up_power(adev);
 639         if (ret) {
 640                 /* Skip the device, but continue the namespace scan. */
 641                 ret = 0;
 642                 goto err_out;
 643         }
 644
 645         adev->driver_data = pdata;
 646         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 647         if (!IS_ERR_OR_NULL(pdev)) {
 648                 acpi_lpss_create_device_links(adev, pdev);
 649                 return 1;
 650         }
 651
 652         ret = PTR_ERR(pdev);
 653         adev->driver_data = NULL;
 654
 655  err_out:
 656         kfree(pdata);
 657         return ret;
 658 }
 659
 660 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 661 {
 662         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 663 }
 664
 665 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 666                              unsigned int reg)
 667 {
 668         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 669 }
 670
 671 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 672 {
 673         struct acpi_device *adev;
 674         struct lpss_private_data *pdata;
 675         unsigned long flags;
 676         int ret;
 677
 678         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 679         if (WARN_ON(ret))
 680                 return ret;
 681
 682         spin_lock_irqsave(&dev->power.lock, flags);
 683         if (pm_runtime_suspended(dev)) {
 684                 ret = -EAGAIN;
 685                 goto out;
 686         }
 687         pdata = acpi_driver_data(adev);
 688         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 689                 ret = -ENODEV;
 690                 goto out;
 691         }
 692         *val = __lpss_reg_read(pdata, reg);
 693
 694  out:
 695         spin_unlock_irqrestore(&dev->power.lock, flags);
 696         return ret;
 697 }
 698
 699 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 700                              char *buf)
 701 {
 702         u32 ltr_value = 0;
 703         unsigned int reg;
 704         int ret;
 705
 706         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 707         ret = lpss_reg_read(dev, reg, &ltr_value);
 708         if (ret)
 709                 return ret;
 710
 711         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 712 }
 713
 714 static ssize_t lpss_ltr_mode_show(struct device *dev,
 715                                   struct device_attribute *attr, char *buf)
 716 {
 717         u32 ltr_mode = 0;
 718         char *outstr;
 719         int ret;
 720
 721         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 722         if (ret)
 723                 return ret;
 724
 725         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 726         return sprintf(buf, "%s\n", outstr);
 727 }
 728
 729 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 730 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 731 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 732
 733 static struct attribute *lpss_attrs[] = {
 734         &dev_attr_auto_ltr.attr,
 735         &dev_attr_sw_ltr.attr,
 736         &dev_attr_ltr_mode.attr,
 737         NULL,
 738 };
 739
 740 static const struct attribute_group lpss_attr_group = {
 741         .attrs = lpss_attrs,
 742         .name = "lpss_ltr",
 743 };
 744
 745 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 746 {
 747         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 748         u32 ltr_mode, ltr_val;
 749
 750         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 751         if (val < 0) {
 752                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 753                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 754                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 755                 }
 756                 return;
 757         }
 758         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 759         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 760                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 761                 val = LPSS_LTR_MAX_VAL;
 762         } else if (val > LPSS_LTR_MAX_VAL) {
 763                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 764                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 765         } else {
 766                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 767         }
 768         ltr_val |= val;
 769         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 770         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 771                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 772                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 773         }
 774 }
 775
 776 #ifdef CONFIG_PM
 777 /**
 778  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 779  * @dev: LPSS device
 780  * @pdata: pointer to the private data of the LPSS device
 781  *
 782  * Most LPSS devices have private registers which may loose their context when
 783  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 784  * prv_reg_ctx array.
 785  */
 786 static void acpi_lpss_save_ctx(struct device *dev,
 787                                struct lpss_private_data *pdata)
 788 {
 789         unsigned int i;
 790
 791         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 792                 unsigned long offset = i * sizeof(u32);
 793
 794                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 795                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 796                         pdata->prv_reg_ctx[i], offset);
 797         }
 798 }
 799
 800 /**
 801  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 802  * @dev: LPSS device
 803  * @pdata: pointer to the private data of the LPSS device
 804  *
 805  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 806  */
 807 static void acpi_lpss_restore_ctx(struct device *dev,
 808                                   struct lpss_private_data *pdata)
 809 {
 810         unsigned int i;
 811
 812         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 813                 unsigned long offset = i * sizeof(u32);
 814
 815                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 816                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 817                         pdata->prv_reg_ctx[i], offset);
 818         }
 819 }
 820
 821 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 822 {
 823         /*
 824          * The following delay is needed or the subsequent write operations may
 825          * fail. The LPSS devices are actually PCI devices and the PCI spec
 826          * expects 10ms delay before the device can be accessed after D3 to D0
 827          * transition. However some platforms like BSW does not need this delay.
 828          */
 829         unsigned int delay = 10;        /* default 10ms delay */
 830
 831         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 832                 delay = 0;
 833
 834         msleep(delay);
 835 }
 836
 837 static int acpi_lpss_activate(struct device *dev)
 838 {
 839         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 840         int ret;
 841
 842         ret = acpi_dev_resume(dev);
 843         if (ret)
 844                 return ret;
 845
 846         acpi_lpss_d3_to_d0_delay(pdata);
 847
 848         /*
 849          * This is called only on ->probe() stage where a device is either in
 850          * known state defined by BIOS or most likely powered off. Due to this
 851          * we have to deassert reset line to be sure that ->probe() will
 852          * recognize the device.
 853          */
 854         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 855                 lpss_deassert_reset(pdata);
 856
 857         return 0;
 858 }
 859
 860 static void acpi_lpss_dismiss(struct device *dev)
 861 {
 862         acpi_dev_suspend(dev, false);
 863 }
 864
 865 /* IOSF SB for LPSS island */
 866 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 867 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 868 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 869
 870 #define LPSS_IOSF_PMCSR                 0x84
 871 #define LPSS_PMCSR_D0                   0
 872 #define LPSS_PMCSR_D3hot                3
 873 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 874
 875 #define LPSS_IOSF_GPIODEF0              0x154
 876 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 877 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 878 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 879 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 880
 881 static DEFINE_MUTEX(lpss_iosf_mutex);
 882 static bool lpss_iosf_d3_entered = true;
 883
 884 static void lpss_iosf_enter_d3_state(void)
 885 {
 886         u32 value1 = 0;
 887         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 888         u32 value2 = LPSS_PMCSR_D3hot;
 889         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 890         /*
 891          * PMC provides an information about actual status of the LPSS devices.
 892          * Here we read the values related to LPSS power island, i.e. LPSS
 893          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 894          */
 895         u32 func_dis, d3_sts_0, pmc_status, pmc_mask = 0xfe000ffe;
 896         int ret;
 897
 898         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 899         if (ret)
 900                 return;
 901
 902         mutex_lock(&lpss_iosf_mutex);
 903
 904         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 905         if (ret)
 906                 goto exit;
 907
 908         /*
 909          * Get the status of entire LPSS power island per device basis.
 910          * Shutdown both LPSS DMA controllers if and only if all other devices
 911          * are already in D3hot.
 912          */
 913         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_mask;
 914         if (pmc_status)
 915                 goto exit;
 916
 917         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 918                         LPSS_IOSF_PMCSR, value2, mask2);
 919
 920         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 921                         LPSS_IOSF_PMCSR, value2, mask2);
 922
 923         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 924                         LPSS_IOSF_GPIODEF0, value1, mask1);
 925
 926         lpss_iosf_d3_entered = true;
 927
 928 exit:
 929         mutex_unlock(&lpss_iosf_mutex);
 930 }
 931
 932 static void lpss_iosf_exit_d3_state(void)
 933 {
 934         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 935                      LPSS_GPIODEF0_DMA_LLP;
 936         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 937         u32 value2 = LPSS_PMCSR_D0;
 938         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 939
 940         mutex_lock(&lpss_iosf_mutex);
 941
 942         if (!lpss_iosf_d3_entered)
 943                 goto exit;
 944
 945         lpss_iosf_d3_entered = false;
 946
 947         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 948                         LPSS_IOSF_GPIODEF0, value1, mask1);
 949
 950         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 951                         LPSS_IOSF_PMCSR, value2, mask2);
 952
 953         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 954                         LPSS_IOSF_PMCSR, value2, mask2);
 955
 956 exit:
 957         mutex_unlock(&lpss_iosf_mutex);
 958 }
 959
 960 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
 961 {
 962         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 963         int ret;
 964
 965         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 966                 acpi_lpss_save_ctx(dev, pdata);
 967
 968         ret = acpi_dev_suspend(dev, wakeup);
 969
 970         /*
 971          * This call must be last in the sequence, otherwise PMC will return
 972          * wrong status for devices being about to be powered off. See
 973          * lpss_iosf_enter_d3_state() for further information.
 974          */
 975         if (acpi_target_system_state() == ACPI_STATE_S0 &&
 976             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
 977                 lpss_iosf_enter_d3_state();
 978
 979         return ret;
 980 }
 981
 982 static int acpi_lpss_resume(struct device *dev)
 983 {
 984         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 985         int ret;
 986
 987         /*
 988          * This call is kept first to be in symmetry with
 989          * acpi_lpss_runtime_suspend() one.
 990          */
 991         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
 992                 lpss_iosf_exit_d3_state();
 993
 994         ret = acpi_dev_resume(dev);
 995         if (ret)
 996                 return ret;
 997
 998         acpi_lpss_d3_to_d0_delay(pdata);
 999
1000         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1001                 acpi_lpss_restore_ctx(dev, pdata);
1002
1003         return 0;
1004 }
1005
1006 #ifdef CONFIG_PM_SLEEP
1007 static int acpi_lpss_suspend_late(struct device *dev)
1008 {
1009         int ret;
1010
1011         if (dev_pm_smart_suspend_and_suspended(dev))
1012                 return 0;
1013
1014         ret = pm_generic_suspend_late(dev);
1015         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1016 }
1017
1018 static int acpi_lpss_resume_early(struct device *dev)
1019 {
1020         int ret = acpi_lpss_resume(dev);
1021
1022         return ret ? ret : pm_generic_resume_early(dev);
1023 }
1024 #endif /* CONFIG_PM_SLEEP */
1025
1026 static int acpi_lpss_runtime_suspend(struct device *dev)
1027 {
1028         int ret = pm_generic_runtime_suspend(dev);
1029
1030         return ret ? ret : acpi_lpss_suspend(dev, true);
1031 }
1032
1033 static int acpi_lpss_runtime_resume(struct device *dev)
1034 {
1035         int ret = acpi_lpss_resume(dev);
1036
1037         return ret ? ret : pm_generic_runtime_resume(dev);
1038 }
1039 #endif /* CONFIG_PM */
1040
1041 static struct dev_pm_domain acpi_lpss_pm_domain = {
1042 #ifdef CONFIG_PM
1043         .activate = acpi_lpss_activate,
1044         .dismiss = acpi_lpss_dismiss,
1045 #endif
1046         .ops = {
1047 #ifdef CONFIG_PM
1048 #ifdef CONFIG_PM_SLEEP
1049                 .prepare = acpi_subsys_prepare,
1050                 .complete = acpi_subsys_complete,
1051                 .suspend = acpi_subsys_suspend,
1052                 .suspend_late = acpi_lpss_suspend_late,
1053                 .suspend_noirq = acpi_subsys_suspend_noirq,
1054                 .resume_noirq = acpi_subsys_resume_noirq,
1055                 .resume_early = acpi_lpss_resume_early,
1056                 .freeze = acpi_subsys_freeze,
1057                 .freeze_late = acpi_subsys_freeze_late,
1058                 .freeze_noirq = acpi_subsys_freeze_noirq,
1059                 .thaw_noirq = acpi_subsys_thaw_noirq,
1060                 .poweroff = acpi_subsys_suspend,
1061                 .poweroff_late = acpi_lpss_suspend_late,
1062                 .poweroff_noirq = acpi_subsys_suspend_noirq,
1063                 .restore_noirq = acpi_subsys_resume_noirq,
1064                 .restore_early = acpi_lpss_resume_early,
1065 #endif
1066                 .runtime_suspend = acpi_lpss_runtime_suspend,
1067                 .runtime_resume = acpi_lpss_runtime_resume,
1068 #endif
1069         },
1070 };
1071
1072 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1073                                      unsigned long action, void *data)
1074 {
1075         struct platform_device *pdev = to_platform_device(data);
1076         struct lpss_private_data *pdata;
1077         struct acpi_device *adev;
1078         const struct acpi_device_id *id;
1079
1080         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1081         if (!id || !id->driver_data)
1082                 return 0;
1083
1084         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1085                 return 0;
1086
1087         pdata = acpi_driver_data(adev);
1088         if (!pdata)
1089                 return 0;
1090
1091         if (pdata->mmio_base &&
1092             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1093                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1094                 return 0;
1095         }
1096
1097         switch (action) {
1098         case BUS_NOTIFY_BIND_DRIVER:
1099                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1100                 break;
1101         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1102         case BUS_NOTIFY_UNBOUND_DRIVER:
1103                 dev_pm_domain_set(&pdev->dev, NULL);
1104                 break;
1105         case BUS_NOTIFY_ADD_DEVICE:
1106                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1107                 if (pdata->dev_desc->flags & LPSS_LTR)
1108                         return sysfs_create_group(&pdev->dev.kobj,
1109                                                   &lpss_attr_group);
1110                 break;
1111         case BUS_NOTIFY_DEL_DEVICE:
1112                 if (pdata->dev_desc->flags & LPSS_LTR)
1113                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1114                 dev_pm_domain_set(&pdev->dev, NULL);
1115                 break;
1116         default:
1117                 break;
1118         }
1119
1120         return 0;
1121 }
1122
1123 static struct notifier_block acpi_lpss_nb = {
1124         .notifier_call = acpi_lpss_platform_notify,
1125 };
1126
1127 static void acpi_lpss_bind(struct device *dev)
1128 {
1129         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1130
1131         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1132                 return;
1133
1134         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1135                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1136         else
1137                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1138 }
1139
1140 static void acpi_lpss_unbind(struct device *dev)
1141 {
1142         dev->power.set_latency_tolerance = NULL;
1143 }
1144
1145 static struct acpi_scan_handler lpss_handler = {
1146         .ids = acpi_lpss_device_ids,
1147         .attach = acpi_lpss_create_device,
1148         .bind = acpi_lpss_bind,
1149         .unbind = acpi_lpss_unbind,
1150 };
1151
1152 void __init acpi_lpss_init(void)
1153 {
1154         const struct x86_cpu_id *id;
1155         int ret;
1156
1157         ret = lpt_clk_init();
1158         if (ret)
1159                 return;
1160
1161         id = x86_match_cpu(lpss_cpu_ids);
1162         if (id)
1163                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1164
1165         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1166         acpi_scan_add_handler(&lpss_handler);
1167 }
1168
1169 #else
1170
1171 static struct acpi_scan_handler lpss_handler = {
1172         .ids = acpi_lpss_device_ids,
1173 };
1174
1175 void __init acpi_lpss_init(void)
1176 {
1177         acpi_scan_add_handler(&lpss_handler);
1178 }
1179
1180 #endif /* CONFIG_X86_INTEL_LPSS */