dt-bindings: mtd: ingenic: Use standard ecc-engine property
[linux/fpc-iii.git] / drivers / soc / renesas / r8a7796-sysc.c
blob1b06f868b6e81c798dfb17614ad53e96a6f23f47
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Renesas R-Car M3-W System Controller
5 * Copyright (C) 2016 Glider bvba
6 */
8 #include <linux/bug.h>
9 #include <linux/kernel.h>
11 #include <dt-bindings/power/r8a7796-sysc.h>
13 #include "rcar-sysc.h"
15 static const struct rcar_sysc_area r8a7796_areas[] __initconst = {
16 { "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
17 { "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
18 PD_SCU },
19 { "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
20 PD_CPU_NOCR },
21 { "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
22 PD_CPU_NOCR },
23 { "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
24 PD_SCU },
25 { "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
26 PD_CPU_NOCR },
27 { "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
28 PD_CPU_NOCR },
29 { "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
30 PD_CPU_NOCR },
31 { "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
32 PD_CPU_NOCR },
33 { "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON },
34 { "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON },
35 { "a2vc0", 0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
36 { "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
37 { "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
38 { "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
39 { "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON },
42 const struct rcar_sysc_info r8a7796_sysc_info __initconst = {
43 .areas = r8a7796_areas,
44 .num_areas = ARRAY_SIZE(r8a7796_areas),