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[PATCH] s390: fix in-user atomic futex operation.
[linux/fpc-iii.git] / drivers / video / pm3fb.c
blob52c18a35fb411d0cd5c6f8b9c3d81010195ddc2a
1 /*
2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
3 *
4 * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
5 * Based on code written by:
6 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
7 * Alan Hourihane, <alanh@fairlite.demon.co.uk>
8 * Russell King, <rmk@arm.linux.org.uk>
9 * Based on linux/drivers/video/skeletonfb.c:
10 * Copyright (C) 1997 Geert Uytterhoeven
11 * Based on linux/driver/video/pm2fb.c:
12 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
13 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 *
19 * $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $
20 *
21 * CHANGELOG:
22 * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
23 * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
24 * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
25 * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
26 * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
27 * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
28 * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
29 * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
30 * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
31 * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
32 * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
33 * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
34 * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
35 * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
36 * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
37 * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
38 * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
39 * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
40 * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
41 * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
42 * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
43 * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
44 * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
45 * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
46 * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
47 * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
48 * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
49 * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
50 * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
51 * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
52 * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
53 */
54
55 #include <linux/config.h>
56 #include <linux/module.h>
57 #include <linux/kernel.h>
58 #include <linux/errno.h>
59 #include <linux/string.h>
60 #include <linux/mm.h>
61 #include <linux/tty.h>
62 #include <linux/slab.h>
63 #include <linux/vmalloc.h>
64 #include <linux/delay.h>
65 #include <linux/interrupt.h>
66 #include <linux/fb.h>
67 #include <linux/init.h>
68 #include <linux/pci.h>
69 #include <linux/ioport.h>
70 #include <linux/ctype.h>
71
72 #include <video/fbcon.h>
73 #include <video/fbcon-mfb.h>
74 #include <video/fbcon-cfb2.h>
75 #include <video/fbcon-cfb4.h>
76 #include <video/fbcon-cfb8.h>
77 #include <video/fbcon-cfb16.h>
78 #include <video/fbcon-cfb24.h>
79 #include <video/fbcon-cfb32.h>
80 #include <video/pm3fb.h>
81
82 #include <asm/io.h>
83 #include <asm/uaccess.h>
84
85 #ifdef CONFIG_FB_OF
86 #include <asm/prom.h>
87 #endif
88
89 /* ************************************* */
90 /* ***** The various "global" data ***** */
91 /* ************************************* */
92
93 /* those will need a rework for multiple board support */
94 /* Driver name */
95 static const char permedia3_name[16] = "Permedia3";
96
97 /* the fb_par struct, mandatory */
98 struct pm3fb_par {
99 u32 pixclock; /* pixclock in KHz */
100
101 u32 width; /* width of virtual screen */
102 u32 height; /* height of virtual screen */
103
104 u32 hsstart; /* horiz. sync start */
105 u32 hsend; /* horiz. sync end */
106 u32 hbend; /* horiz. blank end (also gate end) */
107 u32 htotal; /* total width (w/ sync & blank) */
108
109 u32 vsstart; /* vert. sync start */
110 u32 vsend; /* vert. sync end */
111 u32 vbend; /* vert. blank end */
112 u32 vtotal; /* total height (w/ sync & blank) */
113
114 u32 stride; /* screen stride */
115 u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
116 /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
117 u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
118 u32 video; /* video control (hsync,vsync) */
119 };
120
121 /* memory timings */
122 struct pm3fb_timings
123 {
124 unsigned long caps;
125 unsigned long timings;
126 unsigned long control;
127 unsigned long refresh;
128 unsigned long powerdown;
129 };
130 typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
131 #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
132 #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
133
134 /* the fb_info struct, mandatory */
135 struct pm3fb_info {
136 struct fb_info_gen gen;
137 unsigned long board_num; /* internal board number */
138 unsigned long use_current;
139 struct pm3fb_par *current_par;
140 struct pci_dev *dev; /* PCI device */
141 unsigned long board_type; /* index in the cardbase */
142 unsigned char *fb_base; /* framebuffer memory base */
143 u32 fb_size; /* framebuffer memory size */
144 unsigned char *p_fb; /* physical address of frame buffer */
145 unsigned char *v_fb; /* virtual address of frame buffer */
146 unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
147 unsigned char *vIOBase; /* address of registers after ioremap() */
148 struct {
149 u8 transp;
150 u8 red;
151 u8 green;
152 u8 blue;
153 } palette[256];
154 union {
155 #ifdef FBCON_HAS_CFB16
156 u16 cmap12[16]; /* RGBA 4444 */
157 u16 cmap15[16]; /* RGBA 5551 */
158 u16 cmap16[16]; /* RGBA 5650 */
159 #endif
160 #ifdef FBCON_HAS_CFB32
161 u32 cmap32[16];
162 #endif
163 } cmap;
164 struct pm3fb_timings memt;
165 };
166
167 /* regular resolution database*/
168 static struct {
169 char name[16];
170 struct pm3fb_par user_mode;
171 } mode_base[] __initdata = {
172 {
173 "default-800x600", {
174 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
175 800, 0, 8,
176 PM3VideoControl_ENABLE |
177 PM3VideoControl_HSYNC_ACTIVE_HIGH
178 |
179 PM3VideoControl_VSYNC_ACTIVE_HIGH
180 | PM3VideoControl_PIXELSIZE_8BIT}}, {
181 "1024x768-74", {
182 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
183 806, 1024, 0, 8,
184 PM3VideoControl_ENABLE |
185 PM3VideoControl_HSYNC_ACTIVE_HIGH
186 |
187 PM3VideoControl_VSYNC_ACTIVE_HIGH
188 | PM3VideoControl_PIXELSIZE_8BIT}}, {
189 "1024x768-74-32", {
190 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
191 806, 1024, 0, 32,
192 PM3VideoControl_ENABLE |
193 PM3VideoControl_HSYNC_ACTIVE_HIGH
194 |
195 PM3VideoControl_VSYNC_ACTIVE_HIGH
196 | PM3VideoControl_PIXELSIZE_32BIT}},
197 /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
198 {
199 "SGI1600SW", {
200 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
201 1056, 1600, 0, 8,
202 PM3VideoControl_ENABLE|
203 PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
204 PM3VideoControl_PIXELSIZE_32BIT}},
205 /* ##### auto-generated mode, by fbtimings2pm3 */
206 /* Generated mode : "640x480-60" */
207 {
208 "640x480-60", {
209 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
210 525, 640, 0, 8,
211 PM3VideoControl_ENABLE |
212 PM3VideoControl_HSYNC_ACTIVE_LOW
213 |
214 PM3VideoControl_VSYNC_ACTIVE_LOW
215 | PM3VideoControl_PIXELSIZE_8BIT}},
216 /* Generated mode : "640x480-72" */
217 {
218 "640x480-72", {
219 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
220 640, 0, 8,
221 PM3VideoControl_ENABLE |
222 PM3VideoControl_HSYNC_ACTIVE_LOW
223 |
224 PM3VideoControl_VSYNC_ACTIVE_LOW
225 | PM3VideoControl_PIXELSIZE_8BIT}},
226 /* Generated mode : "640x480-75" */
227 {
228 "640x480-75", {
229 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
230 640, 0, 8,
231 PM3VideoControl_ENABLE |
232 PM3VideoControl_HSYNC_ACTIVE_LOW
233 |
234 PM3VideoControl_VSYNC_ACTIVE_LOW
235 | PM3VideoControl_PIXELSIZE_8BIT}},
236 /* Generated mode : "640x480-90" */
237 {
238 "640x480-90", {
239 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
240 640, 0, 8,
241 PM3VideoControl_ENABLE |
242 PM3VideoControl_HSYNC_ACTIVE_LOW
243 |
244 PM3VideoControl_VSYNC_ACTIVE_LOW
245 | PM3VideoControl_PIXELSIZE_8BIT}},
246 /* Generated mode : "640x480-100" */
247 {
248 "640x480-100", {
249 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
250 531, 640, 0, 8,
251 PM3VideoControl_ENABLE |
252 PM3VideoControl_HSYNC_ACTIVE_LOW
253 |
254 PM3VideoControl_VSYNC_ACTIVE_LOW
255 | PM3VideoControl_PIXELSIZE_8BIT}},
256 /* Generated mode : "800x600-48-lace" */
257 /* INTERLACED NOT SUPPORTED
258 {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
259 INTERLACED NOT SUPPORTED */
260 /* Generated mode : "800x600-56" */
261 {
262 "800x600-56", {
263 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
264 800, 0, 8,
265 PM3VideoControl_ENABLE |
266 PM3VideoControl_HSYNC_ACTIVE_HIGH
267 |
268 PM3VideoControl_VSYNC_ACTIVE_HIGH
269 | PM3VideoControl_PIXELSIZE_8BIT}},
270 /* Generated mode : "800x600-60" */
271 {
272 "800x600-60", {
273 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
274 800, 0, 8,
275 PM3VideoControl_ENABLE |
276 PM3VideoControl_HSYNC_ACTIVE_HIGH
277 |
278 PM3VideoControl_VSYNC_ACTIVE_HIGH
279 | PM3VideoControl_PIXELSIZE_8BIT}},
280 /* Generated mode : "800x600-70" */
281 {
282 "800x600-70", {
283 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
284 636, 800, 0, 8,
285 PM3VideoControl_ENABLE |
286 PM3VideoControl_HSYNC_ACTIVE_HIGH
287 |
288 PM3VideoControl_VSYNC_ACTIVE_LOW
289 | PM3VideoControl_PIXELSIZE_8BIT}},
290 /* Generated mode : "800x600-72" */
291 {
292 "800x600-72", {
293 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
294 666, 800, 0, 8,
295 PM3VideoControl_ENABLE |
296 PM3VideoControl_HSYNC_ACTIVE_HIGH
297 |
298 PM3VideoControl_VSYNC_ACTIVE_HIGH
299 | PM3VideoControl_PIXELSIZE_8BIT}},
300 /* Generated mode : "800x600-75" */
301 {
302 "800x600-75", {
303 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
304 800, 0, 8,
305 PM3VideoControl_ENABLE |
306 PM3VideoControl_HSYNC_ACTIVE_HIGH
307 |
308 PM3VideoControl_VSYNC_ACTIVE_HIGH
309 | PM3VideoControl_PIXELSIZE_8BIT}},
310 /* Generated mode : "800x600-90" */
311 {
312 "800x600-90", {
313 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
314 800, 0, 8,
315 PM3VideoControl_ENABLE |
316 PM3VideoControl_HSYNC_ACTIVE_HIGH
317 |
318 PM3VideoControl_VSYNC_ACTIVE_HIGH
319 | PM3VideoControl_PIXELSIZE_8BIT}},
320 /* Generated mode : "800x600-100", from /etc/fb.modes */
321 /* DISABLED, hsstart == 0
322 {
323 "800x600-100", {
324 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
325 800, 0, 8,
326 PM3VideoControl_ENABLE |
327 PM3VideoControl_HSYNC_ACTIVE_HIGH
328 |
329 PM3VideoControl_VSYNC_ACTIVE_HIGH
330 | PM3VideoControl_PIXELSIZE_8BIT}},
331 */
332 /* Generated mode : "800x600-100", from ??? */
333 {
334 "800x600-100", {
335 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
336 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
337 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
338 /* Generated mode : "1024x768-43-lace" */
339 /* INTERLACED NOT SUPPORTED
340 {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
341 INTERLACED NOT SUPPORTED */
342 /* Generated mode : "1024x768-60" */
343 {
344 "1024x768-60", {
345 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
346 806, 1024, 0, 8,
347 PM3VideoControl_ENABLE |
348 PM3VideoControl_HSYNC_ACTIVE_LOW
349 |
350 PM3VideoControl_VSYNC_ACTIVE_LOW
351 | PM3VideoControl_PIXELSIZE_8BIT}},
352 /* Generated mode : "1024x768-70" */
353 {
354 "1024x768-70", {
355 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
356 806, 1024, 0, 8,
357 PM3VideoControl_ENABLE |
358 PM3VideoControl_HSYNC_ACTIVE_LOW
359 |
360 PM3VideoControl_VSYNC_ACTIVE_LOW
361 | PM3VideoControl_PIXELSIZE_8BIT}},
362 /* Generated mode : "1024x768-72" */
363 {
364 "1024x768-72", {
365 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
366 806, 10224, 0, 8,
367 PM3VideoControl_ENABLE |
368 PM3VideoControl_HSYNC_ACTIVE_LOW
369 |
370 PM3VideoControl_VSYNC_ACTIVE_LOW
371 | PM3VideoControl_PIXELSIZE_8BIT}},
372 /* Generated mode : "1024x768-75" */
373 {
374 "1024x768-75", {
375 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
376 800, 1024, 0, 8,
377 PM3VideoControl_ENABLE |
378 PM3VideoControl_HSYNC_ACTIVE_HIGH
379 |
380 PM3VideoControl_VSYNC_ACTIVE_HIGH
381 | PM3VideoControl_PIXELSIZE_8BIT}},
382 /* Generated mode : "1024x768-90" */
383 {
384 "1024x768-90", {
385 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
386 845, 1024, 0, 8,
387 PM3VideoControl_ENABLE |
388 PM3VideoControl_HSYNC_ACTIVE_LOW
389 |
390 PM3VideoControl_VSYNC_ACTIVE_LOW
391 | PM3VideoControl_PIXELSIZE_8BIT}},
392 /* Generated mode : "1024x768-100", from /etc/fb.modes */
393 /* DISABLED, vsstart == 0
394 {
395 "1024x768-100", {
396 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
397 1024, 0, 8,
398 PM3VideoControl_ENABLE |
399 PM3VideoControl_HSYNC_ACTIVE_LOW
400 |
401 PM3VideoControl_VSYNC_ACTIVE_LOW
402 | PM3VideoControl_PIXELSIZE_8BIT}},
403 */
404 /* Generated mode : "1024x768-100", from ??? */
405 {
406 "1024x768-100", {
407 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
408 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
409 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
410 /* Generated mode : "1152x864-43-lace" */
411 /* INTERLACED NOT SUPPORTED
412 {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
413 INTERLACED NOT SUPPORTED */
414 /* Generated mode : "1152x864-47-lace" */
415 /* INTERLACED NOT SUPPORTED
416 {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
417 INTERLACED NOT SUPPORTED */
418 /* Generated mode : "1152x864-60" */
419 {
420 "1152x864-60", {
421 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
422 916, 1152, 0, 8,
423 PM3VideoControl_ENABLE |
424 PM3VideoControl_HSYNC_ACTIVE_HIGH
425 |
426 PM3VideoControl_VSYNC_ACTIVE_HIGH
427 | PM3VideoControl_PIXELSIZE_8BIT}},
428 /* Generated mode : "1152x864-70" */
429 {
430 "1152x864-70", {
431 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
432 945, 1152, 0, 8,
433 PM3VideoControl_ENABLE |
434 PM3VideoControl_HSYNC_ACTIVE_HIGH
435 |
436 PM3VideoControl_VSYNC_ACTIVE_HIGH
437 | PM3VideoControl_PIXELSIZE_8BIT}},
438 /* Generated mode : "1152x864-75" */
439 {
440 "1152x864-75", {
441 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
442 1002, 1152, 0, 8,
443 PM3VideoControl_ENABLE |
444 PM3VideoControl_HSYNC_ACTIVE_HIGH
445 |
446 PM3VideoControl_VSYNC_ACTIVE_HIGH
447 | PM3VideoControl_PIXELSIZE_8BIT}},
448 /* Generated mode : "1152x864-80" */
449 {
450 "1152x864-80", {
451 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
452 958, 1152, 0, 8,
453 PM3VideoControl_ENABLE |
454 PM3VideoControl_HSYNC_ACTIVE_HIGH
455 |
456 PM3VideoControl_VSYNC_ACTIVE_HIGH
457 | PM3VideoControl_PIXELSIZE_8BIT}},
458 /* Generated mode : "1280x1024-43-lace" */
459 /* INTERLACED NOT SUPPORTED
460 {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
461 INTERLACED NOT SUPPORTED */
462 /* Generated mode : "1280x1024-47-lace" */
463 /* INTERLACED NOT SUPPORTED
464 {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
465 INTERLACED NOT SUPPORTED */
466 /* Generated mode : "1280x1024-60" */
467 {
468 "1280x1024-60", {
469 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
470 1066, 1280, 0, 8,
471 PM3VideoControl_ENABLE |
472 PM3VideoControl_HSYNC_ACTIVE_HIGH
473 |
474 PM3VideoControl_VSYNC_ACTIVE_HIGH
475 | PM3VideoControl_PIXELSIZE_8BIT}},
476 /* Generated mode : "1280x1024-70" */
477 {
478 "1280x1024-70", {
479 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
480 1066, 1280, 0, 8,
481 PM3VideoControl_ENABLE |
482 PM3VideoControl_HSYNC_ACTIVE_HIGH
483 |
484 PM3VideoControl_VSYNC_ACTIVE_HIGH
485 | PM3VideoControl_PIXELSIZE_8BIT}},
486 /* Generated mode : "1280x1024-74" */
487 {
488 "1280x1024-74", {
489 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
490 1064, 1280, 0, 8,
491 PM3VideoControl_ENABLE |
492 PM3VideoControl_HSYNC_ACTIVE_HIGH
493 |
494 PM3VideoControl_VSYNC_ACTIVE_HIGH
495 | PM3VideoControl_PIXELSIZE_8BIT}},
496 /* Generated mode : "1280x1024-75" */
497 {
498 "1280x1024-75", {
499 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
500 1066, 1280, 0, 8,
501 PM3VideoControl_ENABLE |
502 PM3VideoControl_HSYNC_ACTIVE_HIGH
503 |
504 PM3VideoControl_VSYNC_ACTIVE_HIGH
505 | PM3VideoControl_PIXELSIZE_8BIT}},
506 /* Generated mode : "1600x1200-60" */
507 {
508 "1600x1200-60", {
509 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
510 1270, 1600, 0, 8,
511 PM3VideoControl_ENABLE |
512 PM3VideoControl_HSYNC_ACTIVE_LOW
513 |
514 PM3VideoControl_VSYNC_ACTIVE_LOW
515 | PM3VideoControl_PIXELSIZE_8BIT}},
516 /* Generated mode : "1600x1200-66" */
517 {
518 "1600x1200-66", {
519 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
520 1253, 1600, 0, 8,
521 PM3VideoControl_ENABLE |
522 PM3VideoControl_HSYNC_ACTIVE_LOW
523 |
524 PM3VideoControl_VSYNC_ACTIVE_LOW
525 | PM3VideoControl_PIXELSIZE_8BIT}},
526 /* Generated mode : "1600x1200-76" */
527 {
528 "1600x1200-76", {
529 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
530 1250, 1600, 0, 8,
531 PM3VideoControl_ENABLE |
532 PM3VideoControl_HSYNC_ACTIVE_LOW
533 |
534 PM3VideoControl_VSYNC_ACTIVE_LOW
535 | PM3VideoControl_PIXELSIZE_8BIT}},
536 /* ##### end of auto-generated mode */
537 {
538 "\0",}
539 };
540
541 /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
542 static struct pm3fb_info fb_info[PM3_MAX_BOARD];
543 static struct pm3fb_par current_par[PM3_MAX_BOARD];
544 static int current_par_valid[PM3_MAX_BOARD];
545 /* to allow explicit filtering of board */
546 short bus[PM3_MAX_BOARD];
547 short slot[PM3_MAX_BOARD];
548 short func[PM3_MAX_BOARD];
549 short disable[PM3_MAX_BOARD];
550 short noaccel[PM3_MAX_BOARD];
551 char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
552 short depth[PM3_MAX_BOARD];
553 short flatpanel[PM3_MAX_BOARD];
554 static struct display disp[PM3_MAX_BOARD];
555 static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
556 short printtimings = 0;
557 short forcesize[PM3_MAX_BOARD];
558
559 /* ********************* */
560 /* ***** prototype ***** */
561 /* ********************* */
562 /* card-specific */
563 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
564 /* permedia3-specific */
565 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
566 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
567 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
568 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
569 unsigned long r);
570 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
571 unsigned long refclock, /* In kHz units */
572 unsigned char *prescale, /* ClkPreScale */
573 unsigned char *feedback, /* ClkFeedBackScale */
574 unsigned char *postscale
575 /* ClkPostScale */ );
576 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
577 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
578 static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
579 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
580 unsigned long depth, int v);
581 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
582 unsigned long depth, int v);
583 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
584 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
585 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
586 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
587 #endif
588 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
589 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
590 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
591 struct pm3fb_par *curpar);
592 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
593 /* accelerated permedia3-specific */
594 #ifdef PM3FB_USE_ACCEL
595 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
596 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
597 #ifdef FBCON_HAS_CFB32
598 static void pm3fb_cfb32_clear(struct vc_data *conp,
599 struct display *p,
600 int sy, int sx, int height, int width);
601 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
602 struct display *p, int bottom_only);
603 #endif /* FBCON_HAS_CFB32 */
604 #ifdef FBCON_HAS_CFB16
605 static void pm3fb_cfb16_clear(struct vc_data *conp,
606 struct display *p,
607 int sy, int sx, int height, int width);
608 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
609 struct display *p, int bottom_only);
610 #endif /* FBCON_HAS_CFB16 */
611 #ifdef FBCON_HAS_CFB8
612 static void pm3fb_cfb8_clear(struct vc_data *conp,
613 struct display *p,
614 int sy, int sx, int height, int width);
615 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
616 struct display *p, int bottom_only);
617 #endif /* FBCON_HAS_CFB8 */
618 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
619 static void pm3fb_cfbX_bmove(struct display *p,
620 int sy, int sx,
621 int dy, int dx, int height, int width);
622 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
623 int c, int yy, int xx);
624 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
625 const unsigned short *s, int count, int yy,
626 int xx);
627 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
628 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
629 #endif /* PM3FB_USE_ACCEL */
630 /* pre-init */
631 static void pm3fb_mode_setup(char *mode, unsigned long board_num);
632 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
633 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
634 static void pm3fb_real_setup(char *options);
635 /* fbdev */
636 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
637 const void *par, struct fb_info_gen *info);
638 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
639 void *par, struct fb_info_gen *info);
640 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
641 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
642 const void *par, struct fb_info_gen *info);
643 static void pm3fb_get_par(void *par, struct fb_info_gen *info);
644 static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
645 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
646 unsigned char regno, unsigned char r,
647 unsigned char g, unsigned char b);
648 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
649 unsigned *blue, unsigned *transp,
650 struct fb_info *info);
651 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
652 unsigned blue, unsigned transp,
653 struct fb_info *info);
654 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
655 static void pm3fb_set_disp(const void *par, struct display *disp,
656 struct fb_info_gen *info);
657 static void pm3fb_detect(void);
658 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
659 struct fb_info_gen *info);
660 static int pm3fb_ioctl(struct fb_info *info, u_int cmd, u_long arg);
661
662
663 /* the struct that hold them together */
664 struct fbgen_hwswitch pm3fb_switch = {
665 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
666 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg,
667 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
668 };
669
670 static struct fb_ops pm3fb_ops = {
671 .owner = THIS_MODULE,
672 .fb_get_fix = fbgen_get_fix,
673 .fb_get_var = fbgen_get_var,
674 .fb_set_var = fbgen_set_var,
675 .fb_get_cmap = fbgen_get_cmap,
676 .fb_set_cmap = fbgen_set_cmap,
677 .fb_setcolreg = pm3fb_setcolreg,
678 .fb_pan_display =fbgen_pan_display,
679 .fb_blank = fbgen_blank,
680 .fb_ioctl = pm3fb_ioctl,
681 };
682
683 #ifdef PM3FB_USE_ACCEL
684 #ifdef FBCON_HAS_CFB32
685 static struct display_switch pm3fb_cfb32 = {
686 fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
687 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
688 NULL /* cursor() */ , NULL /* set_font() */ ,
689 pm3fb_cfb32_clear_margins,
690 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
691 };
692 #endif /* FBCON_HAS_CFB32 */
693 #ifdef FBCON_HAS_CFB16
694 static struct display_switch pm3fb_cfb16 = {
695 fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
696 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
697 NULL /* cursor() */ , NULL /* set_font() */ ,
698 pm3fb_cfb16_clear_margins,
699 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
700 };
701 #endif /* FBCON_HAS_CFB16 */
702 #ifdef FBCON_HAS_CFB8
703 static struct display_switch pm3fb_cfb8 = {
704 fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
705 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
706 NULL /* cursor() */ , NULL /* set_font() */ ,
707 pm3fb_cfb8_clear_margins,
708 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
709 };
710 #endif /* FBCON_HAS_CFB8 */
711 #endif /* PM3FB_USE_ACCEL */
712
713 /* ****************************** */
714 /* ***** card-specific data ***** */
715 /* ****************************** */
716 struct pm3fb_card_timings {
717 unsigned long memsize; /* 0 for last value (i.e. default) */
718 struct pm3fb_timings memt;
719 };
720
721 static struct pm3fb_card_timings t_FormacProFormance3[] = {
722 { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
723 { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
724 };
725
726 static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
727 { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
728 { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
729 };
730
731 static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
732 { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
733 { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
734 };
735
736 static struct {
737 char cardname[32]; /* recognized card name */
738 u16 subvendor; /* subvendor of the card */
739 u16 subdevice; /* subdevice of the card */
740 u8 func; /* function of the card to which the extra init apply */
741 void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
742 struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
743 } cardbase[] = {
744 { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
745 { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
746 t_AppianJeronimo2000
747 },
748 { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
749 t_AppianJeronimo2000
750 },
751 { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
752 t_FormacProFormance3
753 },
754 { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
755 { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
756 t_3DLabsOxygenVX1
757 },
758 { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
759 { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
760 { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
761 { "\0", 0x0, 0x0, 0, NULL, NULL }
762 };
763
764 /* ********************************** */
765 /* ***** card-specific function ***** */
766 /* ********************************** */
767 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
768 { /* the appian j2000 require more initialization of the second head */
769 /* l_fb_info must point to the _second_ head of the J2000 */
770
771 DTRACE;
772
773 l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
774
775 pm3fb_write_memory_timings(l_fb_info);
776 }
777
778 /* *************************************** */
779 /* ***** permedia3-specific function ***** */
780 /* *************************************** */
781 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
782 {
783 l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
784 l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
785 l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
786 l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
787 l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
788
789 if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
790 (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
791 (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
792 (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
793 (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
794 {
795 printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
796 return(pm3fb_try_memory_timings(l_fb_info));
797 }
798 return(pm3fb_timing_ok);
799 }
800
801 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
802 {
803 if (cardbase[l_fb_info->board_type].c_memt)
804 {
805 int i = 0, done = 0;
806 while (!done)
807 {
808 if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
809 || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
810 { /* will use the 0-sized timings by default */
811 done = 1;
812 l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
813 printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
814 l_fb_info->board_num,
815 cardbase[l_fb_info->board_type].cardname,
816 cardbase[l_fb_info->board_type].c_memt[i].memsize);
817 pm3fb_write_memory_timings(l_fb_info);
818 return(pm3fb_timing_retry);
819 }
820 i++;
821 }
822 } else
823 return(pm3fb_timing_problem);
824 return(pm3fb_timing_ok);
825 }
826
827 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
828 {
829 unsigned char m, n, p;
830 unsigned long clockused;
831
832 PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
833 PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
834 PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
835 PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
836 PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
837
838 clockused =
839 pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
840 &n, &p);
841
842 PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
843 PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
844 PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
845 PM3_WRITE_DAC_REG(PM3RD_KClkControl,
846 PM3RD_KClkControl_STATE_RUN |
847 PM3RD_KClkControl_SOURCE_PLL |
848 PM3RD_KClkControl_ENABLE);
849 PM3_WRITE_DAC_REG(PM3RD_MClkControl,
850 PM3RD_MClkControl_STATE_RUN |
851 PM3RD_MClkControl_SOURCE_KCLK |
852 PM3RD_MClkControl_ENABLE);
853 PM3_WRITE_DAC_REG(PM3RD_SClkControl,
854 PM3RD_SClkControl_STATE_RUN |
855 PM3RD_SClkControl_SOURCE_PCLK |
856 PM3RD_SClkControl_ENABLE);
857 }
858
859 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
860 unsigned long r)
861 {
862 DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
863 "l_fb_info->vIOBase mapped in read dac reg\n");
864 PM3_SET_INDEX(r);
865 mb();
866 return (PM3_READ_REG(PM3RD_IndexedData));
867 }
868
869 /* Calculating various clock parameter */
870 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
871 unsigned long refclock, /* In kHz units */
872 unsigned char *prescale, /* ClkPreScale */
873 unsigned char *feedback, /* ClkFeedBackScale */
874 unsigned char *postscale
875 /* ClkPostScale */ )
876 {
877 int f, pre, post;
878 unsigned long freq;
879 long freqerr = 1000;
880 unsigned long actualclock = 0;
881
882 DTRACE;
883
884 for (f = 1; f < 256; f++) {
885 for (pre = 1; pre < 256; pre++) {
886 for (post = 0; post < 5; post++) {
887 freq =
888 ((2 * refclock * f) /
889 (pre * (1 << post)));
890 if ((reqclock > freq - freqerr)
891 && (reqclock < freq + freqerr)) {
892 freqerr =
893 (reqclock >
894 freq) ? reqclock -
895 freq : freq - reqclock;
896 *feedback = f;
897 *prescale = pre;
898 *postscale = post;
899 actualclock = freq;
900 }
901 }
902 }
903 }
904
905 return (actualclock);
906 }
907
908 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
909 unsigned long depth, int v)
910 {
911 DTRACE;
912
913 switch (depth) {
914 case 8:
915 return (v >> 4);
916 case 12:
917 case 15:
918 case 16:
919 return (v >> 3);
920 case 32:
921 return (v >> 2);
922 }
923 DPRINTK(1, "Unsupported depth %ld\n", depth);
924 return (0);
925 }
926
927 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
928 unsigned long depth, int v)
929 {
930 DTRACE;
931
932 switch (depth) {
933 case 8:
934 return (v << 4);
935 case 12:
936 case 15:
937 case 16:
938 return (v << 3);
939 case 32:
940 return (v << 2);
941 }
942 DPRINTK(1, "Unsupported depth %ld\n", depth);
943 return (0);
944 }
945
946 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
947 {
948 DTRACE;
949
950 l_fb_info->vIOBase =
951 ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
952 l_fb_info->v_fb =
953 ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
954 DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
955 (unsigned long) l_fb_info->pIOBase,
956 (unsigned long) l_fb_info->vIOBase,
957 (unsigned long) l_fb_info->p_fb,
958 (unsigned long) l_fb_info->v_fb);
959 }
960
961 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
962 {
963 DTRACE;
964
965 iounmap(l_fb_info->vIOBase);
966 iounmap(l_fb_info->v_fb);
967 l_fb_info->vIOBase = (unsigned char *) -1;
968 l_fb_info->v_fb = (unsigned char *) -1;
969 }
970
971 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
972 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
973 {
974 DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
975 DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
976 DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
977 PM3_READ_REG(PM3ByAperture1Mode));
978 DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
979 PM3_READ_REG(PM3ByAperture2Mode));
980 DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
981 DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
982 DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
983 DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
984 DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
985 DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
986 DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
987 DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
988 PM3_READ_REG(PM3MemBypassWriteMask));
989 DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
990 PM3_READ_REG(PM3RD_IndexControl));
991 DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
992 DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
993 PM3_READ_REG(PM3ScreenStride));
994 DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
995 DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
996 DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
997 DPRINTK(2, "PM3VideoControl: 0x%08x\n",
998 PM3_READ_REG(PM3VideoControl));
999 DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
1000 DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
1001
1002 DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
1003 PM3_READ_DAC_REG(PM3RD_ColorFormat));
1004 DPRINTK(2, "PM3RD_DACControl: %ld\n",
1005 PM3_READ_DAC_REG(PM3RD_DACControl));
1006 DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
1007 PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
1008 DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
1009 PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
1010 DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
1011 PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
1012 DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
1013 PM3_READ_DAC_REG(PM3RD_IndexControl));
1014 DPRINTK(2, "PM3RD_MiscControl: %ld\n",
1015 PM3_READ_DAC_REG(PM3RD_MiscControl));
1016 DPRINTK(2, "PM3RD_PixelSize: %ld\n",
1017 PM3_READ_DAC_REG(PM3RD_PixelSize));
1018 DPRINTK(2, "PM3RD_SyncControl: %ld\n",
1019 PM3_READ_DAC_REG(PM3RD_SyncControl));
1020 }
1021
1022 #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
1023 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
1024 {
1025 u16 subvendor, subdevice;
1026
1027 if ((!pci_read_config_word
1028 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1029 &&
1030 (!pci_read_config_word
1031 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1032 /* well, nothing... */
1033 } else {
1034 subvendor = subdevice = (u16)-1;
1035 }
1036
1037 printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
1038 printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
1039 PM3_READ_REG(PM3LocalMemCaps));
1040 printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
1041 PM3_READ_REG(PM3LocalMemTimings));
1042 printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
1043 PM3_READ_REG(PM3LocalMemControl));
1044 printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
1045 PM3_READ_REG(PM3LocalMemRefresh));
1046 printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
1047 PM3_READ_REG(PM3LocalMemPowerDown));
1048 }
1049
1050 /* write the mode to registers */
1051 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
1052 {
1053 char tempsync = 0x00, tempmisc = 0x00;
1054 DTRACE;
1055
1056 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
1057 PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
1058 PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
1059 PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
1060
1061 PM3_SLOW_WRITE_REG(PM3HTotal,
1062 pm3fb_Shiftbpp(l_fb_info,
1063 l_fb_info->current_par->depth,
1064 l_fb_info->current_par->htotal -
1065 1));
1066 PM3_SLOW_WRITE_REG(PM3HsEnd,
1067 pm3fb_Shiftbpp(l_fb_info,
1068 l_fb_info->current_par->depth,
1069 l_fb_info->current_par->hsend));
1070 PM3_SLOW_WRITE_REG(PM3HsStart,
1071 pm3fb_Shiftbpp(l_fb_info,
1072 l_fb_info->current_par->depth,
1073 l_fb_info->current_par->
1074 hsstart));
1075 PM3_SLOW_WRITE_REG(PM3HbEnd,
1076 pm3fb_Shiftbpp(l_fb_info,
1077 l_fb_info->current_par->depth,
1078 l_fb_info->current_par->hbend));
1079 PM3_SLOW_WRITE_REG(PM3HgEnd,
1080 pm3fb_Shiftbpp(l_fb_info,
1081 l_fb_info->current_par->depth,
1082 l_fb_info->current_par->hbend));
1083 PM3_SLOW_WRITE_REG(PM3ScreenStride,
1084 pm3fb_Shiftbpp(l_fb_info,
1085 l_fb_info->current_par->depth,
1086 l_fb_info->current_par->stride));
1087 PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
1088 PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
1089 PM3_SLOW_WRITE_REG(PM3VsStart,
1090 l_fb_info->current_par->vsstart - 1);
1091 PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
1092
1093 switch (l_fb_info->current_par->depth) {
1094 case 8:
1095 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1096 PM3ByApertureMode_PIXELSIZE_8BIT);
1097 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1098 PM3ByApertureMode_PIXELSIZE_8BIT);
1099 break;
1100
1101 case 12:
1102 case 15:
1103 case 16:
1104 #ifndef __BIG_ENDIAN
1105 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1106 PM3ByApertureMode_PIXELSIZE_16BIT);
1107 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1108 PM3ByApertureMode_PIXELSIZE_16BIT);
1109 #else
1110 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1111 PM3ByApertureMode_PIXELSIZE_16BIT |
1112 PM3ByApertureMode_BYTESWAP_BADC);
1113 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1114 PM3ByApertureMode_PIXELSIZE_16BIT |
1115 PM3ByApertureMode_BYTESWAP_BADC);
1116 #endif /* ! __BIG_ENDIAN */
1117 break;
1118
1119 case 32:
1120 #ifndef __BIG_ENDIAN
1121 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1122 PM3ByApertureMode_PIXELSIZE_32BIT);
1123 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1124 PM3ByApertureMode_PIXELSIZE_32BIT);
1125 #else
1126 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1127 PM3ByApertureMode_PIXELSIZE_32BIT |
1128 PM3ByApertureMode_BYTESWAP_DCBA);
1129 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1130 PM3ByApertureMode_PIXELSIZE_32BIT |
1131 PM3ByApertureMode_BYTESWAP_DCBA);
1132 #endif /* ! __BIG_ENDIAN */
1133 break;
1134
1135 default:
1136 DPRINTK(1, "Unsupported depth %d\n",
1137 l_fb_info->current_par->depth);
1138 break;
1139 }
1140
1141 /*
1142 * Oxygen VX1 - it appears that setting PM3VideoControl and
1143 * then PM3RD_SyncControl to the same SYNC settings undoes
1144 * any net change - they seem to xor together. Only set the
1145 * sync options in PM3RD_SyncControl. --rmk
1146 */
1147 {
1148 unsigned int video = l_fb_info->current_par->video;
1149
1150 video &= ~(PM3VideoControl_HSYNC_MASK |
1151 PM3VideoControl_VSYNC_MASK);
1152 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
1153 PM3VideoControl_VSYNC_ACTIVE_HIGH;
1154 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
1155 }
1156 PM3_SLOW_WRITE_REG(PM3VClkCtl,
1157 (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
1158 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
1159 PM3_SLOW_WRITE_REG(PM3ChipConfig,
1160 (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
1161
1162 {
1163 unsigned char m; /* ClkPreScale */
1164 unsigned char n; /* ClkFeedBackScale */
1165 unsigned char p; /* ClkPostScale */
1166 (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
1167
1168 DPRINTK(2,
1169 "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
1170 l_fb_info->current_par->pixclock, (int) m, (int) n,
1171 (int) p);
1172
1173 PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
1174 PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
1175 PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
1176 }
1177 /*
1178 PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
1179 */
1180 /*
1181 PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
1182 */
1183 if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
1184 PM3VideoControl_HSYNC_ACTIVE_HIGH)
1185 tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
1186 if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
1187 PM3VideoControl_VSYNC_ACTIVE_HIGH)
1188 tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
1189
1190 PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
1191 DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
1192
1193 if (flatpanel[l_fb_info->board_num])
1194 {
1195 PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
1196 PM3_WAIT(2);
1197 PM3_WRITE_REG(PM3VSConfiguration, 0x06);
1198 PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
1199 tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
1200 }
1201 else
1202 PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
1203
1204 switch (l_fb_info->current_par->depth) {
1205 case 8:
1206 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1207 PM3RD_PixelSize_8_BIT_PIXELS);
1208 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1209 PM3RD_ColorFormat_CI8_COLOR |
1210 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1211 tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1212 break;
1213 case 12:
1214 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1215 PM3RD_PixelSize_16_BIT_PIXELS);
1216 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1217 PM3RD_ColorFormat_4444_COLOR |
1218 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1219 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1220 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1221 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1222 break;
1223 case 15:
1224 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1225 PM3RD_PixelSize_16_BIT_PIXELS);
1226 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1227 PM3RD_ColorFormat_5551_FRONT_COLOR |
1228 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1229 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1230 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1231 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1232 break;
1233 case 16:
1234 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1235 PM3RD_PixelSize_16_BIT_PIXELS);
1236 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1237 PM3RD_ColorFormat_565_FRONT_COLOR |
1238 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1239 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1240 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1241 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1242 break;
1243 case 32:
1244 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1245 PM3RD_PixelSize_32_BIT_PIXELS);
1246 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1247 PM3RD_ColorFormat_8888_COLOR |
1248 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1249 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1250 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1251 break;
1252 }
1253 PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
1254
1255 PM3_SHOW_CUR_MODE;
1256 }
1257
1258 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
1259 struct pm3fb_par *curpar)
1260 {
1261 unsigned long pixsize1, pixsize2, clockused;
1262 unsigned long pre, feedback, post;
1263
1264 DTRACE;
1265
1266 clockused = PM3_READ_REG(PM3VClkCtl);
1267
1268 switch (clockused) {
1269 case 3:
1270 pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
1271 feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
1272 post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
1273
1274 DPRINTK(2,
1275 "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1276 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1277 feedback,
1278 post));
1279 break;
1280 case 2:
1281 pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
1282 feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
1283 post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
1284
1285 DPRINTK(2,
1286 "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1287 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1288 feedback,
1289 post));
1290 break;
1291 case 1:
1292 pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
1293 feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
1294 post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
1295
1296 DPRINTK(2,
1297 "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1298 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1299 feedback,
1300 post));
1301 break;
1302 case 0:
1303 pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
1304 feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
1305 post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
1306
1307 DPRINTK(2,
1308 "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1309 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1310 feedback,
1311 post));
1312 break;
1313 default:
1314 pre = feedback = post = 0;
1315 DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
1316 break;
1317 }
1318
1319 curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
1320
1321 pixsize1 =
1322 PM3ByApertureMode_PIXELSIZE_MASK &
1323 (PM3_READ_REG(PM3ByAperture1Mode));
1324 pixsize2 =
1325 PM3ByApertureMode_PIXELSIZE_MASK &
1326 (PM3_READ_REG(PM3ByAperture2Mode));
1327
1328 DASSERT((pixsize1 == pixsize2),
1329 "pixsize the same in both aperture\n");
1330
1331 if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
1332 curpar->depth = 32;
1333 else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
1334 {
1335 curpar->depth = 16;
1336 }
1337 else
1338 curpar->depth = 8;
1339
1340 /* not sure if I need to add one on the next ; it give better result with */
1341 curpar->htotal =
1342 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1343 1 + PM3_READ_REG(PM3HTotal));
1344 curpar->hsend =
1345 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1346 PM3_READ_REG(PM3HsEnd));
1347 curpar->hsstart =
1348 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1349 PM3_READ_REG(PM3HsStart));
1350 curpar->hbend =
1351 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1352 PM3_READ_REG(PM3HbEnd));
1353
1354 curpar->stride =
1355 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1356 PM3_READ_REG(PM3ScreenStride));
1357
1358 curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
1359 curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
1360 curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
1361 curpar->vbend = PM3_READ_REG(PM3VbEnd);
1362
1363 curpar->video = PM3_READ_REG(PM3VideoControl);
1364
1365 curpar->base = PM3_READ_REG(PM3ScreenBase);
1366 curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
1367 curpar->height = curpar->vtotal - curpar->vbend;
1368
1369 DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
1370 curpar->width, curpar->height, curpar->pixclock,
1371 curpar->stride);
1372 }
1373
1374 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
1375 {
1376 unsigned long memsize = 0, tempBypass, i, temp1, temp2;
1377 u16 subvendor, subdevice;
1378 pm3fb_timing_result ptr;
1379
1380 DTRACE;
1381
1382 l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
1383 pm3fb_mapIO(l_fb_info); /* temporary map IO */
1384
1385 DASSERT((l_fb_info->vIOBase != NULL),
1386 "IO successfully mapped before mem detect\n");
1387 DASSERT((l_fb_info->v_fb != NULL),
1388 "FB successfully mapped before mem detect\n");
1389
1390 /* card-specific stuff, *before* accessing *any* FB memory */
1391 if ((!pci_read_config_word
1392 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1393 &&
1394 (!pci_read_config_word
1395 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1396 i = 0; l_fb_info->board_type = 0;
1397 while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
1398 if ((cardbase[i].subvendor == subvendor) &&
1399 (cardbase[i].subdevice == subdevice) &&
1400 (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
1401 DPRINTK(2, "Card #%ld is an %s\n",
1402 l_fb_info->board_num,
1403 cardbase[i].cardname);
1404 if (cardbase[i].specific_setup)
1405 cardbase[i].specific_setup(l_fb_info);
1406 l_fb_info->board_type = i;
1407 }
1408 i++;
1409 }
1410 if (!l_fb_info->board_type) {
1411 DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
1412 l_fb_info->board_num, subvendor, subdevice);
1413 }
1414 } else {
1415 printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
1416 l_fb_info->board_num);
1417 }
1418
1419 if (printtimings)
1420 pm3fb_show_cur_timing(l_fb_info);
1421
1422 /* card-specific setup is done, we preserve the final
1423 memory timing for future reference */
1424 if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
1425 return(0);
1426 }
1427
1428 tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
1429
1430 DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
1431
1432 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
1433
1434 /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
1435 for (i = 0; i < 32; i++) {
1436 fb_writel(i * 0x00345678,
1437 (l_fb_info->v_fb + (i * 1048576)));
1438 mb();
1439 temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
1440
1441 /* Let's check for wrapover, write will fail at 16MB boundary */
1442 if (temp1 == (i * 0x00345678))
1443 memsize = i;
1444 else
1445 break;
1446 }
1447
1448 DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
1449
1450 if (memsize == i) {
1451 for (i = 0; i < 32; i++) {
1452 /* Clear first 32MB ; 0 is 0, no need to byteswap */
1453 writel(0x0000000,
1454 (l_fb_info->v_fb + (i * 1048576)));
1455 mb();
1456 }
1457
1458 for (i = 32; i < 64; i++) {
1459 fb_writel(i * 0x00345678,
1460 (l_fb_info->v_fb + (i * 1048576)));
1461 mb();
1462 temp1 =
1463 fb_readl((l_fb_info->v_fb + (i * 1048576)));
1464 temp2 =
1465 fb_readl((l_fb_info->v_fb +
1466 ((i - 32) * 1048576)));
1467 if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
1468 memsize = i;
1469 else
1470 break;
1471 }
1472 }
1473
1474 DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
1475
1476 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
1477
1478 pm3fb_unmapIO(l_fb_info);
1479 memsize = 1048576 * (memsize + 1);
1480
1481 DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
1482
1483 if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
1484 {
1485 printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
1486 memsize = 1048576 * forcesize[l_fb_info->board_num];
1487 }
1488
1489 l_fb_info->fb_size = memsize;
1490
1491 if (ptr == pm3fb_timing_retry)
1492 {
1493 printk(KERN_WARNING "pm3fb: retrying memory timings check");
1494 if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
1495 return(0);
1496 }
1497
1498 return (memsize);
1499 }
1500
1501 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
1502 {
1503 int i;
1504
1505 DTRACE;
1506
1507 for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
1508 {
1509 fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1510 }
1511 }
1512
1513 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
1514 {
1515 int i;
1516
1517 DTRACE;
1518
1519 for (i = 0; i < 256 ; i++) /* fill color map with white */
1520 pm3fb_set_color(l_fb_info, i, r, g, b);
1521
1522 }
1523
1524 /* common initialisation */
1525 static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
1526 {
1527 DTRACE;
1528
1529 DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
1530 (unsigned long) l_fb_info);
1531
1532 strcpy(l_fb_info->gen.info.modename, permedia3_name);
1533 disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
1534 l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
1535 l_fb_info->gen.info.changevar = NULL;
1536 l_fb_info->gen.info.fbops = &pm3fb_ops;
1537 l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
1538 if (fontn[l_fb_info->board_num][0])
1539 strcpy(l_fb_info->gen.info.fontname,
1540 fontn[l_fb_info->board_num]);
1541 l_fb_info->gen.info.switch_con = &fbgen_switch;
1542 l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
1543 l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
1544
1545 pm3fb_mapIO(l_fb_info);
1546
1547 pm3fb_clear_memory(l_fb_info, 0);
1548 pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
1549
1550 (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
1551 &l_fb_info->gen.info);
1552
1553 if (depth[l_fb_info->board_num]) /* override mode-defined depth */
1554 {
1555 pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
1556 (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
1557 }
1558
1559 (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
1560 &l_fb_info->gen);
1561
1562 fbgen_set_disp(-1, &l_fb_info->gen);
1563
1564 do_install_cmap(0, &l_fb_info->gen.info);
1565
1566 if (register_framebuffer(&l_fb_info->gen.info) < 0) {
1567 DPRINTK(1, "Couldn't register framebuffer\n");
1568 return;
1569 }
1570
1571 PM3_WRITE_DAC_REG(PM3RD_CursorMode,
1572 PM3RD_CursorMode_CURSOR_DISABLE);
1573
1574 PM3_SHOW_CUR_MODE;
1575
1576 pm3fb_write_mode(l_fb_info);
1577
1578 printk("fb%d: %s, using %uK of video memory (%s)\n",
1579 l_fb_info->gen.info.node,
1580 permedia3_name, (u32) (l_fb_info->fb_size >> 10),
1581 cardbase[l_fb_info->board_type].cardname);
1582 }
1583
1584 /* **************************************************** */
1585 /* ***** accelerated permedia3-specific functions ***** */
1586 /* **************************************************** */
1587 #ifdef PM3FB_USE_ACCEL
1588 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
1589 {
1590 DTRACE;
1591
1592 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1593 PM3_SLOW_WRITE_REG(PM3Sync, 0);
1594 mb();
1595 do {
1596 while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
1597 rmb();
1598 } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
1599 }
1600
1601 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
1602 {
1603 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1604 PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
1605 PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
1606 PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
1607 PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
1608 PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
1609 PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
1610 PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
1611 PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
1612 PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
1613 PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
1614 PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
1615 PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
1616 PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
1617 PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
1618 PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
1619 PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
1620 PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
1621 PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
1622 PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
1623 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
1624 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
1625 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
1626 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
1627 PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
1628 PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
1629 PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
1630 PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
1631 PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
1632 PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
1633 PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
1634 PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
1635 PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
1636 PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
1637 PM3_SLOW_WRITE_REG(PM3Window, 0x0);
1638
1639 PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
1640
1641 PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
1642
1643 PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
1644 PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
1645 PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
1646
1647 PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
1648
1649 PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
1650 PM3FBDestReadEnables_E(0xff) |
1651 PM3FBDestReadEnables_R(0xff) |
1652 PM3FBDestReadEnables_ReferenceAlpha(0xff));
1653 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
1654 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
1655 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
1656 PM3FBDestReadBufferWidth_Width(l_fb_info->
1657 current_par->
1658 width));
1659
1660 PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
1661 PM3FBDestReadMode_ReadEnable |
1662 PM3FBDestReadMode_Enable0);
1663 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
1664 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
1665 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
1666 PM3FBSourceReadBufferWidth_Width(l_fb_info->
1667 current_par->
1668 width));
1669 PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
1670 PM3FBSourceReadMode_Blocking |
1671 PM3FBSourceReadMode_ReadEnable);
1672
1673 {
1674 unsigned long rm = 1;
1675 switch (l_fb_info->current_par->depth) {
1676 case 8:
1677 PM3_SLOW_WRITE_REG(PM3PixelSize,
1678 PM3PixelSize_GLOBAL_8BIT);
1679 break;
1680 case 12:
1681 case 15:
1682 case 16:
1683 PM3_SLOW_WRITE_REG(PM3PixelSize,
1684 PM3PixelSize_GLOBAL_16BIT);
1685 break;
1686 case 32:
1687 PM3_SLOW_WRITE_REG(PM3PixelSize,
1688 PM3PixelSize_GLOBAL_32BIT);
1689 break;
1690 default:
1691 DPRINTK(1, "Unsupported depth %d\n",
1692 l_fb_info->current_par->depth);
1693 break;
1694 }
1695 PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
1696 }
1697
1698 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
1699 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
1700 PM3_SLOW_WRITE_REG(PM3FBWriteMode,
1701 PM3FBWriteMode_WriteEnable |
1702 PM3FBWriteMode_OpaqueSpan |
1703 PM3FBWriteMode_Enable0);
1704 PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
1705 PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
1706 PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
1707 PM3FBWriteBufferWidth_Width(l_fb_info->
1708 current_par->
1709 width));
1710
1711 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
1712 {
1713 unsigned long sofb = (8UL * l_fb_info->fb_size) /
1714 ((depth2bpp(l_fb_info->current_par->depth))
1715 * l_fb_info->current_par->width); /* size in lines of FB */
1716 if (sofb > 4095)
1717 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
1718 else
1719 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
1720
1721 switch (l_fb_info->current_par->depth) {
1722 case 8:
1723 PM3_SLOW_WRITE_REG(PM3DitherMode,
1724 (1 << 10) | (2 << 3));
1725 break;
1726 case 12:
1727 case 15:
1728 case 16:
1729 PM3_SLOW_WRITE_REG(PM3DitherMode,
1730 (1 << 10) | (1 << 3));
1731 break;
1732 case 32:
1733 PM3_SLOW_WRITE_REG(PM3DitherMode,
1734 (1 << 10) | (0 << 3));
1735 break;
1736 default:
1737 DPRINTK(1, "Unsupported depth %d\n",
1738 l_fb_info->current_par->depth);
1739 break;
1740 }
1741 }
1742
1743 PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
1744 PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
1745 PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
1746 PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
1747 PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
1748 PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
1749 PM3_SLOW_WRITE_REG(PM3Count, 0x0);
1750
1751 /* Disable LocalBuffer. better safe than sorry */
1752 PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
1753 PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
1754 PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
1755 PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
1756
1757 pm3fb_wait_pm3(l_fb_info);
1758 }
1759
1760 #ifdef FBCON_HAS_CFB32
1761 static void pm3fb_cfb32_clear(struct vc_data *conp,
1762 struct display *p,
1763 int sy, int sx, int height, int width)
1764 {
1765 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1766 u32 c;
1767
1768 DTRACE;
1769
1770 sx = sx * fontwidth(p);
1771 width = width * fontwidth(p);
1772 sy = sy * fontheight(p);
1773 height = height * fontheight(p);
1774 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1775
1776 /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
1777 we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
1778 if ((l_fb_info->current_par->width > 1600) ||
1779 (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
1780 PM3_WAIT(4);
1781
1782 PM3_WRITE_REG(PM3Config2D,
1783 PM3Config2D_UseConstantSource |
1784 PM3Config2D_ForegroundROPEnable |
1785 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1786 PM3Config2D_FBWriteEnable);
1787
1788 PM3_WRITE_REG(PM3ForegroundColor, c);
1789
1790 PM3_WRITE_REG(PM3RectanglePosition,
1791 (PM3RectanglePosition_XOffset(sx)) |
1792 (PM3RectanglePosition_YOffset(sy)));
1793
1794 PM3_WRITE_REG(PM3Render2D,
1795 PM3Render2D_XPositive |
1796 PM3Render2D_YPositive |
1797 PM3Render2D_Operation_Normal |
1798 PM3Render2D_SpanOperation |
1799 (PM3Render2D_Width(width)) |
1800 (PM3Render2D_Height(height)));
1801 } else {
1802 PM3_WAIT(8);
1803
1804 PM3_WRITE_REG(PM3FBBlockColor, c);
1805
1806 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
1807
1808 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1809 PM3FBWriteBufferWidth_Width(l_fb_info->
1810 current_par->
1811 width << 1));
1812
1813 PM3_WRITE_REG(PM3Config2D,
1814 PM3Config2D_UseConstantSource |
1815 PM3Config2D_ForegroundROPEnable |
1816 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1817 PM3Config2D_FBWriteEnable);
1818
1819 PM3_WRITE_REG(PM3RectanglePosition,
1820 (PM3RectanglePosition_XOffset(sx << 1)) |
1821 (PM3RectanglePosition_YOffset(sy)));
1822
1823 PM3_WRITE_REG(PM3Render2D,
1824 PM3Render2D_XPositive |
1825 PM3Render2D_YPositive |
1826 PM3Render2D_Operation_Normal |
1827 (PM3Render2D_Width(width << 1)) |
1828 (PM3Render2D_Height(height)));
1829
1830 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1831 PM3FBWriteBufferWidth_Width(l_fb_info->
1832 current_par->
1833 width));
1834
1835 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
1836 }
1837
1838 pm3fb_wait_pm3(l_fb_info);
1839 }
1840
1841 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
1842 struct display *p, int bottom_only)
1843 {
1844 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1845 int sx, sy;
1846 u32 c;
1847
1848 DTRACE;
1849
1850 sx = conp->vc_cols * fontwidth(p); /* right margin */
1851 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1852 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1853
1854 if (!bottom_only) { /* right margin top->bottom */
1855 PM3_WAIT(4);
1856
1857 PM3_WRITE_REG(PM3Config2D,
1858 PM3Config2D_UseConstantSource |
1859 PM3Config2D_ForegroundROPEnable |
1860 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1861 PM3Config2D_FBWriteEnable);
1862
1863 PM3_WRITE_REG(PM3ForegroundColor, c);
1864
1865 PM3_WRITE_REG(PM3RectanglePosition,
1866 (PM3RectanglePosition_XOffset
1867 (p->var.xoffset +
1868 sx)) | (PM3RectanglePosition_YOffset(p->
1869 var.
1870 yoffset)));
1871
1872 PM3_WRITE_REG(PM3Render2D,
1873 PM3Render2D_XPositive |
1874 PM3Render2D_YPositive |
1875 PM3Render2D_Operation_Normal |
1876 PM3Render2D_SpanOperation |
1877 (PM3Render2D_Width(p->var.xres - sx)) |
1878 (PM3Render2D_Height(p->var.yres)));
1879 }
1880
1881 /* bottom margin left -> right */
1882 PM3_WAIT(4);
1883
1884 PM3_WRITE_REG(PM3Config2D,
1885 PM3Config2D_UseConstantSource |
1886 PM3Config2D_ForegroundROPEnable |
1887 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1888 PM3Config2D_FBWriteEnable);
1889
1890 PM3_WRITE_REG(PM3ForegroundColor, c);
1891
1892 PM3_WRITE_REG(PM3RectanglePosition,
1893 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
1894 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
1895
1896 PM3_WRITE_REG(PM3Render2D,
1897 PM3Render2D_XPositive |
1898 PM3Render2D_YPositive |
1899 PM3Render2D_Operation_Normal |
1900 PM3Render2D_SpanOperation |
1901 (PM3Render2D_Width(p->var.xres)) |
1902 (PM3Render2D_Height(p->var.yres - sy)));
1903
1904 pm3fb_wait_pm3(l_fb_info);
1905 }
1906 #endif /* FBCON_HAS_CFB32 */
1907 #ifdef FBCON_HAS_CFB16
1908 static void pm3fb_cfb16_clear(struct vc_data *conp,
1909 struct display *p,
1910 int sy, int sx, int height, int width)
1911 {
1912 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1913 u32 c;
1914
1915 DTRACE;
1916
1917 sx = sx * fontwidth(p);
1918 width = width * fontwidth(p);
1919 sy = sy * fontheight(p);
1920 height = height * fontheight(p);
1921 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1922 c = c | (c << 16);
1923
1924 PM3_WAIT(4);
1925
1926 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1927 PM3_WRITE_REG(PM3ForegroundColor, c);
1928 else
1929 PM3_WRITE_REG(PM3FBBlockColor, c);
1930
1931 PM3_WRITE_REG(PM3Config2D,
1932 PM3Config2D_UseConstantSource |
1933 PM3Config2D_ForegroundROPEnable |
1934 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1935 PM3Config2D_FBWriteEnable);
1936
1937 PM3_WRITE_REG(PM3RectanglePosition,
1938 (PM3RectanglePosition_XOffset(sx)) |
1939 (PM3RectanglePosition_YOffset(sy)));
1940
1941 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1942 PM3_WRITE_REG(PM3Render2D,
1943 PM3Render2D_XPositive |
1944 PM3Render2D_YPositive |
1945 PM3Render2D_Operation_Normal |
1946 PM3Render2D_SpanOperation |
1947 (PM3Render2D_Width(width)) |
1948 (PM3Render2D_Height(height)));
1949 else
1950 PM3_WRITE_REG(PM3Render2D,
1951 PM3Render2D_XPositive |
1952 PM3Render2D_YPositive |
1953 PM3Render2D_Operation_Normal |
1954 (PM3Render2D_Width(width)) |
1955 (PM3Render2D_Height(height)));
1956
1957 pm3fb_wait_pm3(l_fb_info);
1958 }
1959
1960 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
1961 struct display *p, int bottom_only)
1962 {
1963 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1964 int sx, sy;
1965 u32 c;
1966
1967 DTRACE;
1968
1969 sx = conp->vc_cols * fontwidth(p); /* right margin */
1970 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1971 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1972 c = c | (c << 16);
1973
1974 if (!bottom_only) { /* right margin top->bottom */
1975 PM3_WAIT(4);
1976
1977 PM3_WRITE_REG(PM3Config2D,
1978 PM3Config2D_UseConstantSource |
1979 PM3Config2D_ForegroundROPEnable |
1980 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1981 PM3Config2D_FBWriteEnable);
1982
1983 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1984 PM3_WRITE_REG(PM3ForegroundColor, c);
1985 else
1986 PM3_WRITE_REG(PM3FBBlockColor, c);
1987
1988 PM3_WRITE_REG(PM3RectanglePosition,
1989 (PM3RectanglePosition_XOffset
1990 (p->var.xoffset +
1991 sx)) | (PM3RectanglePosition_YOffset(p->
1992 var.
1993 yoffset)));
1994 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1995 PM3_WRITE_REG(PM3Render2D,
1996 PM3Render2D_XPositive |
1997 PM3Render2D_YPositive |
1998 PM3Render2D_Operation_Normal |
1999 PM3Render2D_SpanOperation |
2000 (PM3Render2D_Width(p->var.xres - sx)) |
2001 (PM3Render2D_Height(p->var.yres)));
2002 else
2003 PM3_WRITE_REG(PM3Render2D,
2004 PM3Render2D_XPositive |
2005 PM3Render2D_YPositive |
2006 PM3Render2D_Operation_Normal |
2007 (PM3Render2D_Width(p->var.xres - sx)) |
2008 (PM3Render2D_Height(p->var.yres)));
2009 }
2010
2011 /* bottom margin left -> right */
2012 PM3_WAIT(4);
2013
2014 PM3_WRITE_REG(PM3Config2D,
2015 PM3Config2D_UseConstantSource |
2016 PM3Config2D_ForegroundROPEnable |
2017 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2018 PM3Config2D_FBWriteEnable);
2019
2020 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2021 PM3_WRITE_REG(PM3ForegroundColor, c);
2022 else
2023 PM3_WRITE_REG(PM3FBBlockColor, c);
2024
2025
2026 PM3_WRITE_REG(PM3RectanglePosition,
2027 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2028 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2029
2030 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2031 PM3_WRITE_REG(PM3Render2D,
2032 PM3Render2D_XPositive |
2033 PM3Render2D_YPositive |
2034 PM3Render2D_Operation_Normal |
2035 PM3Render2D_SpanOperation |
2036 (PM3Render2D_Width(p->var.xres)) |
2037 (PM3Render2D_Height(p->var.yres - sy)));
2038 else
2039 PM3_WRITE_REG(PM3Render2D,
2040 PM3Render2D_XPositive |
2041 PM3Render2D_YPositive |
2042 PM3Render2D_Operation_Normal |
2043 (PM3Render2D_Width(p->var.xres)) |
2044 (PM3Render2D_Height(p->var.yres - sy)));
2045
2046 pm3fb_wait_pm3(l_fb_info);
2047 }
2048 #endif /* FBCON_HAS_CFB16 */
2049 #ifdef FBCON_HAS_CFB8
2050 static void pm3fb_cfb8_clear(struct vc_data *conp,
2051 struct display *p,
2052 int sy, int sx, int height, int width)
2053 {
2054 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2055 u32 c;
2056
2057 DTRACE;
2058
2059 sx = sx * fontwidth(p);
2060 width = width * fontwidth(p);
2061 sy = sy * fontheight(p);
2062 height = height * fontheight(p);
2063
2064 c = attr_bgcol_ec(p, conp);
2065 c |= c << 8;
2066 c |= c << 16;
2067
2068 PM3_WAIT(4);
2069
2070 PM3_WRITE_REG(PM3Config2D,
2071 PM3Config2D_UseConstantSource |
2072 PM3Config2D_ForegroundROPEnable |
2073 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2074 PM3Config2D_FBWriteEnable);
2075
2076 PM3_WRITE_REG(PM3ForegroundColor, c);
2077
2078 PM3_WRITE_REG(PM3RectanglePosition,
2079 (PM3RectanglePosition_XOffset(sx)) |
2080 (PM3RectanglePosition_YOffset(sy)));
2081
2082 PM3_WRITE_REG(PM3Render2D,
2083 PM3Render2D_XPositive |
2084 PM3Render2D_YPositive |
2085 PM3Render2D_Operation_Normal |
2086 PM3Render2D_SpanOperation |
2087 (PM3Render2D_Width(width)) |
2088 (PM3Render2D_Height(height)));
2089
2090 pm3fb_wait_pm3(l_fb_info);
2091 }
2092
2093 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
2094 struct display *p, int bottom_only)
2095 {
2096 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2097 int sx, sy;
2098 u32 c;
2099
2100 DTRACE;
2101
2102 sx = conp->vc_cols * fontwidth(p); /* right margin */
2103 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2104 c = attr_bgcol_ec(p, conp);
2105 c |= c << 8;
2106 c |= c << 16;
2107
2108 if (!bottom_only) { /* right margin top->bottom */
2109 PM3_WAIT(4);
2110
2111 PM3_WRITE_REG(PM3Config2D,
2112 PM3Config2D_UseConstantSource |
2113 PM3Config2D_ForegroundROPEnable |
2114 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2115 PM3Config2D_FBWriteEnable);
2116
2117 PM3_WRITE_REG(PM3ForegroundColor, c);
2118
2119 PM3_WRITE_REG(PM3RectanglePosition,
2120 (PM3RectanglePosition_XOffset
2121 (p->var.xoffset +
2122 sx)) | (PM3RectanglePosition_YOffset(p->
2123 var.
2124 yoffset)));
2125
2126 PM3_WRITE_REG(PM3Render2D,
2127 PM3Render2D_XPositive |
2128 PM3Render2D_YPositive |
2129 PM3Render2D_Operation_Normal |
2130 PM3Render2D_SpanOperation |
2131 (PM3Render2D_Width(p->var.xres - sx)) |
2132 (PM3Render2D_Height(p->var.yres)));
2133 }
2134
2135 /* bottom margin left -> right */
2136 PM3_WAIT(4);
2137
2138 PM3_WRITE_REG(PM3Config2D,
2139 PM3Config2D_UseConstantSource |
2140 PM3Config2D_ForegroundROPEnable |
2141 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2142 PM3Config2D_FBWriteEnable);
2143
2144 PM3_WRITE_REG(PM3ForegroundColor, c);
2145
2146 PM3_WRITE_REG(PM3RectanglePosition,
2147 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2148 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2149
2150 PM3_WRITE_REG(PM3Render2D,
2151 PM3Render2D_XPositive |
2152 PM3Render2D_YPositive |
2153 PM3Render2D_Operation_Normal |
2154 PM3Render2D_SpanOperation |
2155 (PM3Render2D_Width(p->var.xres)) |
2156 (PM3Render2D_Height(p->var.yres - sy)));
2157
2158 pm3fb_wait_pm3(l_fb_info);
2159 }
2160 #endif /* FBCON_HAS_CFB8 */
2161 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
2162 static void pm3fb_cfbX_bmove(struct display *p,
2163 int sy, int sx,
2164 int dy, int dx, int height, int width)
2165 {
2166 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2167 int x_align, o_x, o_y;
2168
2169 DTRACE;
2170
2171 sx = sx * fontwidth(p);
2172 dx = dx * fontwidth(p);
2173 width = width * fontwidth(p);
2174 sy = sy * fontheight(p);
2175 dy = dy * fontheight(p);
2176 height = height * fontheight(p);
2177
2178 o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
2179 o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
2180
2181 x_align = (sx & 0x1f);
2182
2183 PM3_WAIT(6);
2184
2185 PM3_WRITE_REG(PM3Config2D,
2186 PM3Config2D_UserScissorEnable |
2187 PM3Config2D_ForegroundROPEnable |
2188 PM3Config2D_Blocking |
2189 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2190 PM3Config2D_FBWriteEnable);
2191
2192 PM3_WRITE_REG(PM3ScissorMinXY,
2193 ((dy & 0x0fff) << 16) | (dx & 0x0fff));
2194 PM3_WRITE_REG(PM3ScissorMaxXY,
2195 (((dy + height) & 0x0fff) << 16) |
2196 ((dx + width) & 0x0fff));
2197
2198 PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
2199 PM3FBSourceReadBufferOffset_XOffset(o_x) |
2200 PM3FBSourceReadBufferOffset_YOffset(o_y));
2201
2202 PM3_WRITE_REG(PM3RectanglePosition,
2203 (PM3RectanglePosition_XOffset(dx - x_align)) |
2204 (PM3RectanglePosition_YOffset(dy)));
2205
2206 PM3_WRITE_REG(PM3Render2D,
2207 ((sx > dx) ? PM3Render2D_XPositive : 0) |
2208 ((sy > dy) ? PM3Render2D_YPositive : 0) |
2209 PM3Render2D_Operation_Normal |
2210 PM3Render2D_SpanOperation |
2211 PM3Render2D_FBSourceReadEnable |
2212 (PM3Render2D_Width(width + x_align)) |
2213 (PM3Render2D_Height(height)));
2214
2215 pm3fb_wait_pm3(l_fb_info);
2216 }
2217
2218 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
2219 int c, int yy, int xx)
2220 {
2221 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2222 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2223 u32 fgx, bgx, ldat;
2224 int sx, sy, i;
2225
2226 DTRACE;
2227
2228 if (l_fb_info->current_par->depth == 8)
2229 fgx = attr_fgcol(p, c);
2230 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2231 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
2232 else
2233 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
2234
2235 PM3_COLOR(fgx);
2236
2237 if (l_fb_info->current_par->depth == 8)
2238 bgx = attr_bgcol(p, c);
2239 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2240 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
2241 else
2242 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
2243
2244 PM3_COLOR(bgx);
2245
2246 PM3_WAIT(4);
2247
2248 PM3_WRITE_REG(PM3Config2D,
2249 PM3Config2D_UseConstantSource |
2250 PM3Config2D_ForegroundROPEnable |
2251 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2252 PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
2253
2254 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2255 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2256
2257 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2258 /* and 16 bits for fontwidth <= 16 */
2259 /* same in _putcs, same for Y and fontheight */
2260 if (fontwidth(p) <= 8)
2261 asx = 2;
2262 else if (fontwidth(p) <= 16)
2263 asx = 3; /* look OK */
2264 if (fontheight(p) <= 8)
2265 asy = 2;
2266 else if (fontheight(p) <= 16)
2267 asy = 3; /* look OK */
2268 else if (fontheight(p) <= 32)
2269 asy = 4; /* look OK */
2270
2271 sx = xx * fontwidth(p);
2272 sy = yy * fontheight(p);
2273
2274 if (fontwidth(p) <= 8)
2275 o_x = (8 - (sx & 0x7)) & 0x7;
2276 else if (fontwidth(p) <= 16)
2277 o_x = (16 - (sx & 0xF)) & 0xF;
2278 if (fontheight(p) <= 8)
2279 o_y = (8 - (sy & 0x7)) & 0x7;
2280 else if (fontheight(p) <= 16)
2281 o_y = (16 - (sy & 0xF)) & 0xF;
2282 else if (fontheight(p) <= 32)
2283 o_y = (32 - (sy & 0x1F)) & 0x1F;
2284
2285 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2286 (1 << 18) | /* BE */
2287 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2288 (1 << 20)); /* OpaqueSpan */
2289
2290 if (fontwidth(p) <= 8) {
2291 cdat = p->fontdata + (c & p->charmask) * fontheight(p);
2292 } else {
2293 cdat =
2294 p->fontdata +
2295 ((c & p->charmask) * (fontheight(p) << 1));
2296 }
2297
2298 PM3_WAIT(2 + fontheight(p));
2299
2300 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2301 if (fontwidth(p) <= 8) {
2302 ldat = *cdat++;
2303 } else { /* assume fontwidth <= 16 ATM */
2304
2305 ldat = ((*cdat++) << 8);
2306 ldat |= *cdat++;
2307 }
2308 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2309 }
2310
2311 PM3_WRITE_REG(PM3RectanglePosition,
2312 (PM3RectanglePosition_XOffset(sx)) |
2313 (PM3RectanglePosition_YOffset(sy)));
2314
2315 PM3_WRITE_REG(PM3Render2D,
2316 PM3Render2D_AreaStippleEnable |
2317 PM3Render2D_XPositive |
2318 PM3Render2D_YPositive |
2319 PM3Render2D_Operation_Normal |
2320 PM3Render2D_SpanOperation |
2321 (PM3Render2D_Width(fontwidth(p))) |
2322 (PM3Render2D_Height(fontheight(p))));
2323
2324 pm3fb_wait_pm3(l_fb_info);
2325 }
2326
2327 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
2328 const unsigned short *s, int count, int yy,
2329 int xx)
2330 {
2331 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2332 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2333 u32 fgx, bgx, ldat;
2334 int sx, sy, i, j;
2335 u16 sc;
2336
2337 DTRACE;
2338
2339 sc = scr_readw(s);
2340 if (l_fb_info->current_par->depth == 8)
2341 fgx = attr_fgcol(p, sc);
2342 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2343 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
2344 else
2345 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
2346
2347 PM3_COLOR(fgx);
2348
2349 if (l_fb_info->current_par->depth == 8)
2350 bgx = attr_bgcol(p, sc);
2351 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2352 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
2353 else
2354 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
2355
2356 PM3_COLOR(bgx);
2357
2358 PM3_WAIT(4);
2359
2360 PM3_WRITE_REG(PM3Config2D,
2361 PM3Config2D_UseConstantSource |
2362 PM3Config2D_ForegroundROPEnable |
2363 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2364 PM3Config2D_FBWriteEnable |
2365 PM3Config2D_OpaqueSpan);
2366
2367 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2368 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2369
2370 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2371 /* and 16 bits for fontwidth <= 16 */
2372 /* same in _putc, same for Y and fontheight */
2373 if (fontwidth(p) <= 8)
2374 asx = 2;
2375 else if (fontwidth(p) <= 16)
2376 asx = 3; /* look OK */
2377 if (fontheight(p) <= 8)
2378 asy = 2;
2379 else if (fontheight(p) <= 16)
2380 asy = 3; /* look OK */
2381 else if (fontheight(p) <= 32)
2382 asy = 4; /* look OK */
2383
2384 sy = yy * fontheight(p);
2385
2386 if (fontheight(p) <= 8)
2387 o_y = (8 - (sy & 0x7)) & 0x7;
2388 else if (fontheight(p) <= 16)
2389 o_y = (16 - (sy & 0xF)) & 0xF;
2390 else if (fontheight(p) <= 32)
2391 o_y = (32 - (sy & 0x1F)) & 0x1F;
2392
2393 for (j = 0; j < count; j++) {
2394 sc = scr_readw(s + j);
2395 if (fontwidth(p) <= 8)
2396 cdat = p->fontdata +
2397 (sc & p->charmask) * fontheight(p);
2398 else
2399 cdat = p->fontdata +
2400 ((sc & p->charmask) * fontheight(p) << 1);
2401
2402 sx = (xx + j) * fontwidth(p);
2403
2404 if (fontwidth(p) <= 8)
2405 o_x = (8 - (sx & 0x7)) & 0x7;
2406 else if (fontwidth(p) <= 16)
2407 o_x = (16 - (sx & 0xF)) & 0xF;
2408
2409 PM3_WAIT(3 + fontheight(p));
2410
2411 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2412 (1 << 18) | /* BE */
2413 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2414 (1 << 20)); /* OpaqueSpan */
2415
2416 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2417 if (fontwidth(p) <= 8) {
2418 ldat = *cdat++;
2419 } else { /* assume fontwidth <= 16 ATM */
2420 ldat = ((*cdat++) << 8);
2421 ldat |= *cdat++;
2422 }
2423 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2424 }
2425
2426 PM3_WRITE_REG(PM3RectanglePosition,
2427 (PM3RectanglePosition_XOffset(sx)) |
2428 (PM3RectanglePosition_YOffset(sy)));
2429
2430 PM3_WRITE_REG(PM3Render2D,
2431 PM3Render2D_AreaStippleEnable |
2432 PM3Render2D_XPositive |
2433 PM3Render2D_YPositive |
2434 PM3Render2D_Operation_Normal |
2435 PM3Render2D_SpanOperation |
2436 (PM3Render2D_Width(fontwidth(p))) |
2437 (PM3Render2D_Height(fontheight(p))));
2438 }
2439 pm3fb_wait_pm3(l_fb_info);
2440 }
2441
2442 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
2443 {
2444 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2445
2446 xx = xx * fontwidth(p);
2447 yy = yy * fontheight(p);
2448
2449 if (l_fb_info->current_par->depth == 8)
2450 {
2451 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2452 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
2453 else
2454 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
2455 }
2456
2457 PM3_WAIT(3);
2458
2459 PM3_WRITE_REG(PM3Config2D,
2460 PM3Config2D_UseConstantSource |
2461 PM3Config2D_ForegroundROPEnable |
2462 (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
2463 PM3Config2D_FBDestReadEnable |
2464 PM3Config2D_FBWriteEnable);
2465
2466 PM3_WRITE_REG(PM3RectanglePosition,
2467 (PM3RectanglePosition_XOffset(xx)) |
2468 (PM3RectanglePosition_YOffset(yy)));
2469
2470 PM3_WRITE_REG(PM3Render2D,
2471 PM3Render2D_XPositive |
2472 PM3Render2D_YPositive |
2473 PM3Render2D_Operation_Normal |
2474 PM3Render2D_SpanOperation |
2475 (PM3Render2D_Width(fontwidth(p))) |
2476 (PM3Render2D_Height(fontheight(p))));
2477
2478 pm3fb_wait_pm3(l_fb_info);
2479
2480 if (l_fb_info->current_par->depth == 8)
2481 {
2482 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2483 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
2484 else
2485 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
2486 }
2487 }
2488
2489 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
2490 #endif /* PM3FB_USE_ACCEL */
2491 /* *********************************** */
2492 /* ***** pre-init board(s) setup ***** */
2493 /* *********************************** */
2494
2495 static void pm3fb_mode_setup(char *mode, unsigned long board_num)
2496 {
2497 struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
2498 struct pm3fb_par *l_fb_par = &(current_par[board_num]);
2499 unsigned long i = 0;
2500
2501 current_par_valid[board_num] = 0;
2502
2503 if (!strncmp(mode, "current", 7)) {
2504 l_fb_info->use_current = 1; /* default w/ OpenFirmware */
2505 } else {
2506 while ((mode_base[i].name[0])
2507 && (!current_par_valid[board_num])) {
2508 if (!
2509 (strncmp
2510 (mode, mode_base[i].name,
2511 strlen(mode_base[i].name)))) {
2512 memcpy(l_fb_par, &(mode_base[i].user_mode),
2513 sizeof(struct pm3fb_par));
2514 current_par_valid[board_num] = 1;
2515 DPRINTK(2, "Mode set to %s\n",
2516 mode_base[i].name);
2517 }
2518 i++;
2519 }
2520 DASSERT(current_par_valid[board_num],
2521 "Valid mode on command line\n");
2522 }
2523 }
2524
2525 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
2526 {
2527 short l_bus = -1, l_slot = -1, l_func = -1;
2528 char *next;
2529
2530 if (pciid) {
2531 l_bus = simple_strtoul(pciid, &next, 10);
2532 if (next && (next[0] == ':')) {
2533 pciid = next + 1;
2534 l_slot = simple_strtoul(pciid, &next, 10);
2535 if (next && (next[0] == ':')) {
2536 pciid = next + 1;
2537 l_func =
2538 simple_strtoul(pciid, (char **) NULL,
2539 10);
2540 }
2541 }
2542 } else
2543 return;
2544
2545 if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
2546 bus[board_num] = l_bus;
2547 slot[board_num] = l_slot;
2548 func[board_num] = l_func;
2549 DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
2550 board_num, l_bus, l_slot, l_func);
2551 } else {
2552 DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
2553 l_bus, l_slot, l_func, board_num);
2554 }
2555 }
2556
2557 static void pm3fb_font_setup(char *lf, unsigned long board_num)
2558 {
2559 unsigned long lfs = strlen(lf);
2560
2561 if (lfs > (PM3_FONTNAME_SIZE - 1)) {
2562 DPRINTK(1, "Fontname %s too long\n", lf);
2563 return;
2564 }
2565 strlcpy(fontn[board_num], lf, lfs + 1);
2566 }
2567
2568 static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
2569 {
2570 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2571
2572 if (!(depth_supported(bd))) {
2573 printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
2574 bds, board_num);
2575 return;
2576 }
2577 depth[board_num] = bd;
2578 }
2579
2580 static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
2581 {
2582 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2583
2584 if (bd > 64) {
2585 printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
2586 bds, board_num);
2587 return;
2588 }
2589 forcesize[board_num] = bd;
2590 }
2591
2592 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
2593 {
2594 char *next;
2595
2596 if (!(isdigit(options[0]))) {
2597 (*bn) = 0;
2598 return (options);
2599 }
2600
2601 (*bn) = simple_strtoul(options, &next, 10);
2602
2603 if (next && (next[0] == ':') && ((*bn) >= 0)
2604 && ((*bn) <= PM3_MAX_BOARD)) {
2605 DPRINTK(2, "Board_num seen as %ld\n", (*bn));
2606 return (next + 1);
2607 } else {
2608 (*bn) = 0;
2609 DPRINTK(2, "Board_num default to %ld\n", (*bn));
2610 return (options);
2611 }
2612 }
2613
2614 static void pm3fb_real_setup(char *options)
2615 {
2616 char *next;
2617 unsigned long i, bn;
2618 struct pm3fb_info *l_fb_info;
2619
2620 DTRACE;
2621
2622 DPRINTK(2, "Options : %s\n", options);
2623
2624 for (i = 0; i < PM3_MAX_BOARD; i++) {
2625 l_fb_info = &(fb_info[i]);
2626 memset(l_fb_info, 0, sizeof(struct pm3fb_info));
2627 l_fb_info->gen.fbhw = &pm3fb_switch;
2628 l_fb_info->board_num = i;
2629 current_par_valid[i] = 0;
2630 slot[i] = -1;
2631 func[i] = -1;
2632 bus[i] = -1;
2633 disable[i] = 0;
2634 noaccel[i] = 0;
2635 fontn[i][0] = '\0';
2636 depth[i] = 0;
2637 l_fb_info->current_par = &(current_par[i]);
2638 }
2639
2640 /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
2641 if (!strncmp(options, "pm3fb", 5)) {
2642 options += 5;
2643 while (((*options) == ',') || ((*options) == ':')
2644 || ((*options) == '='))
2645 options++;
2646 }
2647
2648 while (options) {
2649 bn = 0;
2650 if ((next = strchr(options, ','))) {
2651 (*next) = '\0';
2652 next++;
2653 }
2654
2655 if (!strncmp(options, "mode:", 5)) {
2656 options = pm3fb_boardnum_setup(options + 5, &bn);
2657 DPRINTK(2, "Setting mode for board #%ld\n", bn);
2658 pm3fb_mode_setup(options, bn);
2659 } else if (!strncmp(options, "off:", 4)) {
2660 options = pm3fb_boardnum_setup(options + 4, &bn);
2661 DPRINTK(2, "Disabling board #%ld\n", bn);
2662 disable[bn] = 1;
2663 } else if (!strncmp(options, "off", 3)) { /* disable everything */
2664 for (i = 0; i < PM3_MAX_BOARD; i++)
2665 disable[i] = 1;
2666 } else if (!strncmp(options, "disable:", 8)) {
2667 options = pm3fb_boardnum_setup(options + 8, &bn);
2668 DPRINTK(2, "Disabling board #%ld\n", bn);
2669 disable[bn] = 1;
2670 } else if (!strncmp(options, "pciid:", 6)) {
2671 options = pm3fb_boardnum_setup(options + 6, &bn);
2672 DPRINTK(2, "Setting PciID for board #%ld\n", bn);
2673 pm3fb_pciid_setup(options, bn);
2674 } else if (!strncmp(options, "noaccel:", 8)) {
2675 options = pm3fb_boardnum_setup(options + 8, &bn);
2676 noaccel[bn] = 1;
2677 } else if (!strncmp(options, "font:", 5)) {
2678 options = pm3fb_boardnum_setup(options + 5, &bn);
2679 pm3fb_font_setup(options, bn);
2680 } else if (!strncmp(options, "depth:", 6)) {
2681 options = pm3fb_boardnum_setup(options + 6, &bn);
2682 pm3fb_bootdepth_setup(options, bn);
2683 } else if (!strncmp(options, "printtimings", 12)) {
2684 printtimings = 1;
2685 } else if (!strncmp(options, "flatpanel:", 10)) {
2686 options = pm3fb_boardnum_setup(options + 10, &bn);
2687 flatpanel[bn] = 1;
2688 } else if (!strncmp(options, "forcesize:", 10)) {
2689 options = pm3fb_boardnum_setup(options + 10, &bn);
2690 pm3fb_forcesize_setup(options, bn);
2691 }
2692 options = next;
2693 }
2694 }
2695
2696 /* ********************************************** */
2697 /* ***** framebuffer API standard functions ***** */
2698 /* ********************************************** */
2699
2700 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
2701 const void *par, struct fb_info_gen *info)
2702 {
2703 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2704 struct pm3fb_par *p = (struct pm3fb_par *) par;
2705
2706 DTRACE;
2707
2708 strcpy(fix->id, permedia3_name);
2709 fix->smem_start = (unsigned long)l_fb_info->p_fb;
2710 fix->smem_len = l_fb_info->fb_size;
2711 fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
2712 fix->mmio_len = PM3_REGS_SIZE;
2713 #ifdef PM3FB_USE_ACCEL
2714 if (!(noaccel[l_fb_info->board_num]))
2715 fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
2716 else
2717 #endif /* PM3FB_USE_ACCEL */
2718 fix->accel = FB_ACCEL_NONE;
2719 fix->type = FB_TYPE_PACKED_PIXELS;
2720 fix->visual =
2721 (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
2722 if (current_par_valid[l_fb_info->board_num])
2723 fix->line_length =
2724 l_fb_info->current_par->width *
2725 depth2ByPP(l_fb_info->current_par->depth);
2726 else
2727 fix->line_length = 0;
2728 fix->xpanstep = 64 / depth2bpp(p->depth);
2729 fix->ypanstep = 1;
2730 fix->ywrapstep = 0;
2731 return (0);
2732 }
2733
2734 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
2735 void *par, struct fb_info_gen *info)
2736 {
2737 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2738 struct pm3fb_par *p = (struct pm3fb_par *) par;
2739 struct pm3fb_par temp_p;
2740 u32 xres;
2741
2742 DTRACE;
2743
2744 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2745 DASSERT((p != NULL), "pm3fb_par* not NULL");
2746 DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
2747
2748 memset(&temp_p, 0, sizeof(struct pm3fb_par));
2749 temp_p.width = (var->xres_virtual + 7) & ~7;
2750 temp_p.height = var->yres_virtual;
2751
2752 if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
2753 temp_p.depth = depth2bpp(var->bits_per_pixel);
2754 else
2755 temp_p.depth = var->bits_per_pixel;
2756
2757 temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
2758 temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
2759
2760 if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
2761 temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
2762
2763 if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
2764 temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
2765
2766
2767 DPRINTK(2,
2768 "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
2769 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
2770 var->xoffset, var->yoffset);
2771
2772 xres = (var->xres + 31) & ~31;
2773 if (temp_p.width < xres + var->xoffset)
2774 temp_p.width = xres + var->xoffset;
2775 if (temp_p.height < var->yres + var->yoffset)
2776 temp_p.height = var->yres + var->yoffset;
2777
2778 if (temp_p.width > 2048) {
2779 DPRINTK(1, "virtual width not supported: %u\n",
2780 temp_p.width);
2781 return (-EINVAL);
2782 }
2783 if (var->yres < 200) {
2784 DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
2785 return (-EINVAL);
2786 }
2787 if (temp_p.height < 200 || temp_p.height > 4095) {
2788 DPRINTK(1, "virtual height not supported: %u\n",
2789 temp_p.height);
2790 return (-EINVAL);
2791 }
2792 if (!(depth_supported(temp_p.depth))) {
2793 DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
2794 return (-EINVAL);
2795 }
2796 if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
2797 l_fb_info->fb_size) {
2798 DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
2799 temp_p.width, temp_p.height, temp_p.depth);
2800 return (-EINVAL);
2801 }
2802
2803 if ((!var->pixclock) ||
2804 (!var->right_margin) ||
2805 (!var->hsync_len) ||
2806 (!var->left_margin) ||
2807 (!var->lower_margin) ||
2808 (!var->vsync_len) || (!var->upper_margin)
2809 ) {
2810 unsigned long i = 0, done = 0;
2811 printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
2812
2813 while ((mode_base[i].user_mode.width) && !done) {
2814 if ((mode_base[i].user_mode.width == temp_p.width)
2815 && (mode_base[i].user_mode.height ==
2816 temp_p.height)) {
2817 printk(KERN_NOTICE "pm3fb: using close match %s\n",
2818 mode_base[i].name);
2819 temp_p = mode_base[i].user_mode;
2820 done = 1;
2821 }
2822 i++;
2823 }
2824 if (!done)
2825 return (-EINVAL);
2826 } else {
2827 temp_p.pixclock = PICOS2KHZ(var->pixclock);
2828 if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
2829 DPRINTK(1, "pixclock too high (%uKHz)\n",
2830 temp_p.pixclock);
2831 return (-EINVAL);
2832 }
2833
2834 temp_p.hsstart = var->right_margin;
2835 temp_p.hsend = var->right_margin + var->hsync_len;
2836 temp_p.hbend =
2837 var->right_margin + var->hsync_len + var->left_margin;
2838 temp_p.htotal = xres + temp_p.hbend;
2839
2840 temp_p.vsstart = var->lower_margin;
2841 temp_p.vsend = var->lower_margin + var->vsync_len;
2842 temp_p.vbend =
2843 var->lower_margin + var->vsync_len + var->upper_margin;
2844 temp_p.vtotal = var->yres + temp_p.vbend;
2845
2846 temp_p.stride = temp_p.width;
2847
2848 DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
2849 temp_p.width, temp_p.height, temp_p.pixclock,
2850 temp_p.stride);
2851
2852 temp_p.base =
2853 pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
2854 (var->yoffset * xres) + var->xoffset);
2855
2856 temp_p.video = 0;
2857
2858 if (var->sync & FB_SYNC_HOR_HIGH_ACT)
2859 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
2860 else
2861 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
2862
2863 if (var->sync & FB_SYNC_VERT_HIGH_ACT)
2864 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
2865 else
2866 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
2867
2868 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
2869 DPRINTK(1, "Interlaced mode not supported\n\n");
2870 return (-EINVAL);
2871 }
2872
2873 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
2874 temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
2875 else
2876 temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
2877
2878 if (var->activate == FB_ACTIVATE_NOW)
2879 temp_p.video |= PM3VideoControl_ENABLE;
2880 else {
2881 temp_p.video |= PM3VideoControl_DISABLE;
2882 DPRINTK(2, "PM3Video disabled\n");
2883 }
2884
2885 switch (temp_p.depth) {
2886 case 8:
2887 temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
2888 break;
2889 case 12:
2890 case 15:
2891 case 16:
2892 temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
2893 break;
2894 case 32:
2895 temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
2896 break;
2897 default:
2898 DPRINTK(1, "Unsupported depth\n");
2899 break;
2900 }
2901 }
2902 (*p) = temp_p;
2903
2904 #ifdef PM3FB_USE_ACCEL
2905 if (var->accel_flags & FB_ACCELF_TEXT)
2906 noaccel[l_fb_info->board_num] = 0;
2907 else
2908 noaccel[l_fb_info->board_num] = 1;
2909 #endif /* PM3FB_USE_ACCEL */
2910
2911 return (0);
2912 }
2913
2914 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
2915 {
2916 switch (d) {
2917 case 8:
2918 var->red.length = var->green.length = var->blue.length = 8;
2919 var->red.offset = var->green.offset = var->blue.offset = 0;
2920 var->transp.offset = var->transp.length = 0;
2921 break;
2922
2923 case 12:
2924 var->red.offset = 8;
2925 var->red.length = 4;
2926 var->green.offset = 4;
2927 var->green.length = 4;
2928 var->blue.offset = 0;
2929 var->blue.length = 4;
2930 var->transp.offset = 12;
2931 var->transp.length = 4;
2932 break;
2933
2934 case 15:
2935 var->red.offset = 10;
2936 var->red.length = 5;
2937 var->green.offset = 5;
2938 var->green.length = 5;
2939 var->blue.offset = 0;
2940 var->blue.length = 5;
2941 var->transp.offset = 15;
2942 var->transp.length = 1;
2943 break;
2944
2945 case 16:
2946 var->red.offset = 11;
2947 var->red.length = 5;
2948 var->green.offset = 5;
2949 var->green.length = 6;
2950 var->blue.offset = 0;
2951 var->blue.length = 5;
2952 var->transp.offset = var->transp.length = 0;
2953 break;
2954
2955 case 32:
2956 var->transp.offset = 24;
2957 var->red.offset = 16;
2958 var->green.offset = 8;
2959 var->blue.offset = 0;
2960 var->red.length = var->green.length =
2961 var->blue.length = var->transp.length = 8;
2962 break;
2963
2964 default:
2965 DPRINTK(1, "Unsupported depth %ld\n", d);
2966 break;
2967 }
2968 }
2969
2970 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
2971 const void *par, struct fb_info_gen *info)
2972 {
2973 struct pm3fb_par *p = (struct pm3fb_par *) par;
2974 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2975
2976 u32 base;
2977
2978 DTRACE;
2979
2980 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2981 DASSERT((p != NULL), "pm3fb_par* not NULL");
2982 DASSERT((info != NULL), "fb_info_gen* not NULL");
2983
2984 memset(var, 0, sizeof(struct fb_var_screeninfo));
2985
2986 #ifdef PM3FB_USE_ACCEL
2987 if (!(noaccel[l_fb_info->board_num]))
2988 var->accel_flags |= FB_ACCELF_TEXT;
2989 #endif /* PM3FB_USE_ACCEL */
2990
2991 var->xres_virtual = p->width;
2992 var->yres_virtual = p->height;
2993 var->xres = p->htotal - p->hbend;
2994 var->yres = p->vtotal - p->vbend;
2995
2996 DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
2997
2998 var->right_margin = p->hsstart;
2999 var->hsync_len = p->hsend - p->hsstart;
3000 var->left_margin = p->hbend - p->hsend;
3001 var->lower_margin = p->vsstart;
3002 var->vsync_len = p->vsend - p->vsstart;
3003 var->upper_margin = p->vbend - p->vsend;
3004 var->bits_per_pixel = depth2bpp(p->depth);
3005
3006 pm3fb_encode_depth(var, p->depth);
3007
3008 base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
3009
3010 var->xoffset = base % var->xres;
3011 var->yoffset = base / var->xres;
3012
3013 var->height = var->width = -1;
3014
3015 var->pixclock = KHZ2PICOS(p->pixclock);
3016
3017 if ((p->video & PM3VideoControl_HSYNC_MASK) ==
3018 PM3VideoControl_HSYNC_ACTIVE_HIGH)
3019 var->sync |= FB_SYNC_HOR_HIGH_ACT;
3020 if ((p->video & PM3VideoControl_VSYNC_MASK) ==
3021 PM3VideoControl_VSYNC_ACTIVE_HIGH)
3022 var->sync |= FB_SYNC_VERT_HIGH_ACT;
3023 if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
3024 var->vmode = FB_VMODE_DOUBLE;
3025
3026 return (0);
3027 }
3028
3029 static void pm3fb_get_par(void *par, struct fb_info_gen *info)
3030 {
3031 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3032
3033 DTRACE;
3034
3035 if (!current_par_valid[l_fb_info->board_num]) {
3036 if (l_fb_info->use_current)
3037 pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
3038 else
3039 memcpy(l_fb_info->current_par,
3040 &(mode_base[0].user_mode),
3041 sizeof(struct pm3fb_par));
3042 current_par_valid[l_fb_info->board_num] = 1;
3043 }
3044 *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
3045 }
3046
3047 static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
3048 {
3049 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3050
3051 DTRACE;
3052
3053 *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
3054 current_par_valid[l_fb_info->board_num] = 1;
3055
3056 pm3fb_write_mode(l_fb_info);
3057
3058 #ifdef PM3FB_USE_ACCEL
3059 pm3fb_init_engine(l_fb_info);
3060 #endif /* PM3FB_USE_ACCEL */
3061 }
3062
3063 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
3064 unsigned char regno, unsigned char r,
3065 unsigned char g, unsigned char b)
3066 {
3067 DTRACE;
3068
3069 PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
3070 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
3071 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
3072 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
3073 }
3074
3075 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
3076 unsigned *blue, unsigned *transp,
3077 struct fb_info *info)
3078 {
3079 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3080
3081 DTRACE;
3082
3083 if (regno < 256) {
3084 *red =
3085 l_fb_info->palette[regno].red << 8 | l_fb_info->
3086 palette[regno].red;
3087 *green =
3088 l_fb_info->palette[regno].green << 8 | l_fb_info->
3089 palette[regno].green;
3090 *blue =
3091 l_fb_info->palette[regno].blue << 8 | l_fb_info->
3092 palette[regno].blue;
3093 *transp =
3094 l_fb_info->palette[regno].transp << 8 | l_fb_info->
3095 palette[regno].transp;
3096 }
3097 return (regno > 255);
3098 }
3099
3100 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
3101 unsigned blue, unsigned transp,
3102 struct fb_info *info)
3103 {
3104 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3105
3106 DTRACE;
3107
3108 if (regno < 16) {
3109 switch (l_fb_info->current_par->depth) {
3110 #ifdef FBCON_HAS_CFB8
3111 case 8:
3112 break;
3113 #endif
3114 #ifdef FBCON_HAS_CFB16
3115 case 12:
3116 l_fb_info->cmap.cmap12[regno] =
3117 (((u32) red & 0xf000) >> 4) |
3118 (((u32) green & 0xf000) >> 8) |
3119 (((u32) blue & 0xf000) >> 12);
3120 break;
3121
3122 case 15:
3123 l_fb_info->cmap.cmap15[regno] =
3124 (((u32) red & 0xf800) >> 1) |
3125 (((u32) green & 0xf800) >> 6) |
3126 (((u32) blue & 0xf800) >> 11);
3127 break;
3128
3129 case 16:
3130 l_fb_info->cmap.cmap16[regno] =
3131 ((u32) red & 0xf800) |
3132 (((u32) green & 0xfc00) >> 5) |
3133 (((u32) blue & 0xf800) >> 11);
3134 break;
3135 #endif
3136 #ifdef FBCON_HAS_CFB32
3137 case 32:
3138 l_fb_info->cmap.cmap32[regno] =
3139 (((u32) transp & 0xff00) << 16) |
3140 (((u32) red & 0xff00) << 8) |
3141 (((u32) green & 0xff00)) |
3142 (((u32) blue & 0xff00) >> 8);
3143 break;
3144 #endif
3145 default:
3146 DPRINTK(1, "bad depth %u\n",
3147 l_fb_info->current_par->depth);
3148 break;
3149 }
3150 }
3151 if (regno < 256) {
3152 l_fb_info->palette[regno].red = red >> 8;
3153 l_fb_info->palette[regno].green = green >> 8;
3154 l_fb_info->palette[regno].blue = blue >> 8;
3155 l_fb_info->palette[regno].transp = transp >> 8;
3156 if (l_fb_info->current_par->depth == 8)
3157 pm3fb_set_color(l_fb_info, regno, red >> 8,
3158 green >> 8, blue >> 8);
3159 }
3160 return (regno > 255);
3161 }
3162
3163 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
3164 {
3165 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3166 u32 video;
3167
3168 DTRACE;
3169
3170 if (!current_par_valid[l_fb_info->board_num])
3171 return (1);
3172
3173 video = l_fb_info->current_par->video;
3174
3175 /*
3176 * Oxygen VX1 - it appears that setting PM3VideoControl and
3177 * then PM3RD_SyncControl to the same SYNC settings undoes
3178 * any net change - they seem to xor together. Only set the
3179 * sync options in PM3RD_SyncControl. --rmk
3180 */
3181 video &= ~(PM3VideoControl_HSYNC_MASK |
3182 PM3VideoControl_VSYNC_MASK);
3183 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
3184 PM3VideoControl_VSYNC_ACTIVE_HIGH;
3185
3186 if (blank_mode > 0) {
3187 switch (blank_mode - 1) {
3188
3189 case VESA_NO_BLANKING: /* FIXME */
3190 video = video & ~(PM3VideoControl_ENABLE);
3191 break;
3192
3193 case VESA_HSYNC_SUSPEND:
3194 video = video & ~(PM3VideoControl_HSYNC_MASK |
3195 PM3VideoControl_BLANK_ACTIVE_LOW);
3196 break;
3197 case VESA_VSYNC_SUSPEND:
3198 video = video & ~(PM3VideoControl_VSYNC_MASK |
3199 PM3VideoControl_BLANK_ACTIVE_LOW);
3200 break;
3201 case VESA_POWERDOWN:
3202 video = video & ~(PM3VideoControl_HSYNC_MASK |
3203 PM3VideoControl_VSYNC_MASK |
3204 PM3VideoControl_BLANK_ACTIVE_LOW);
3205 break;
3206 default:
3207 DPRINTK(1, "Unsupported blanking %d\n",
3208 blank_mode);
3209 return (1);
3210 break;
3211 }
3212 }
3213
3214 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
3215
3216 return (0);
3217 }
3218
3219 static void pm3fb_set_disp(const void *par, struct display *disp,
3220 struct fb_info_gen *info)
3221 {
3222 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3223 struct pm3fb_par *p = (struct pm3fb_par *) par;
3224 u32 flags;
3225
3226 DTRACE;
3227
3228 local_irq_save(flags);
3229 info->info.screen_base = l_fb_info->v_fb;
3230 switch (p->depth) {
3231 #ifdef FBCON_HAS_CFB8
3232 case 8:
3233 #ifdef PM3FB_USE_ACCEL
3234 if (!(noaccel[l_fb_info->board_num]))
3235 disp->dispsw = &pm3fb_cfb8;
3236 else
3237 #endif /* PM3FB_USE_ACCEL */
3238 disp->dispsw = &fbcon_cfb8;
3239 break;
3240 #endif
3241 #ifdef FBCON_HAS_CFB16
3242 case 12:
3243 #ifdef PM3FB_USE_ACCEL
3244 if (!(noaccel[l_fb_info->board_num]))
3245 disp->dispsw = &pm3fb_cfb16;
3246 else
3247 #endif /* PM3FB_USE_ACCEL */
3248 disp->dispsw = &fbcon_cfb16;
3249 disp->dispsw_data = l_fb_info->cmap.cmap12;
3250 break;
3251 case 15:
3252 #ifdef PM3FB_USE_ACCEL
3253 if (!(noaccel[l_fb_info->board_num]))
3254 disp->dispsw = &pm3fb_cfb16;
3255 else
3256 #endif /* PM3FB_USE_ACCEL */
3257 disp->dispsw = &fbcon_cfb16;
3258 disp->dispsw_data = l_fb_info->cmap.cmap15;
3259 break;
3260 case 16:
3261 #ifdef PM3FB_USE_ACCEL
3262 if (!(noaccel[l_fb_info->board_num]))
3263 disp->dispsw = &pm3fb_cfb16;
3264 else
3265 #endif /* PM3FB_USE_ACCEL */
3266 disp->dispsw = &fbcon_cfb16;
3267 disp->dispsw_data = l_fb_info->cmap.cmap16;
3268 break;
3269 #endif
3270 #ifdef FBCON_HAS_CFB32
3271 case 32:
3272 #ifdef PM3FB_USE_ACCEL
3273 if (!(noaccel[l_fb_info->board_num]))
3274 disp->dispsw = &pm3fb_cfb32;
3275 else
3276 #endif /* PM3FB_USE_ACCEL */
3277 disp->dispsw = &fbcon_cfb32;
3278 disp->dispsw_data = l_fb_info->cmap.cmap32;
3279 break;
3280 #endif /* FBCON_HAS_CFB32 */
3281 default:
3282 disp->dispsw = &fbcon_dummy;
3283 DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
3284 break;
3285 }
3286 local_irq_restore(flags);
3287 }
3288
3289 /* */
3290 static void pm3fb_detect(void)
3291 {
3292 struct pci_dev *dev_array[PM3_MAX_BOARD];
3293 struct pci_dev *dev = NULL;
3294 struct pm3fb_info *l_fb_info = &(fb_info[0]);
3295 unsigned long i, j, done;
3296
3297 DTRACE;
3298
3299 for (i = 0; i < PM3_MAX_BOARD; i++) {
3300 dev_array[i] = NULL;
3301 fb_info[i].dev = NULL;
3302 }
3303
3304 dev =
3305 pci_find_device(PCI_VENDOR_ID_3DLABS,
3306 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3307
3308 for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
3309 dev_array[i] = dev;
3310 dev =
3311 pci_find_device(PCI_VENDOR_ID_3DLABS,
3312 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3313 }
3314
3315 if (dev) { /* more than PM3_MAX_BOARD */
3316 printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
3317 PM3_MAX_BOARD);
3318 }
3319
3320 if (!dev_array[0]) { /* not a single board, abort */
3321 return;
3322 }
3323
3324 /* allocate user-defined boards */
3325 for (i = 0; i < PM3_MAX_BOARD; i++) {
3326 if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
3327 for (j = 0; j < PM3_MAX_BOARD; j++) {
3328 if ((dev_array[j] != NULL) &&
3329 (dev_array[j]->bus->number == bus[i])
3330 && (PCI_SLOT(dev_array[j]->devfn) ==
3331 slot[i])
3332 && (PCI_FUNC(dev_array[j]->devfn) ==
3333 func[i])) {
3334 fb_info[i].dev = dev_array[j];
3335 dev_array[j] = NULL;
3336 }
3337 }
3338 }
3339 }
3340 /* allocate remaining boards */
3341 for (i = 0; i < PM3_MAX_BOARD; i++) {
3342 if (fb_info[i].dev == NULL) {
3343 done = 0;
3344 for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
3345 if (dev_array[j] != NULL) {
3346 fb_info[i].dev = dev_array[j];
3347 dev_array[j] = NULL;
3348 done = 1;
3349 }
3350 }
3351 }
3352 }
3353
3354 /* at that point, all PCI Permedia3 are detected and allocated */
3355 /* now, initialize... or not */
3356 for (i = 0; i < PM3_MAX_BOARD; i++) {
3357 l_fb_info = &(fb_info[i]);
3358 if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */
3359 DPRINTK(2,
3360 "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
3361 (unsigned long) l_fb_info->dev,
3362 (unsigned long) l_fb_info->dev->vendor,
3363 (unsigned long) l_fb_info->dev->device,
3364 (unsigned long)
3365 pci_resource_start(l_fb_info->dev, 0),
3366 (unsigned long)
3367 pci_resource_start(l_fb_info->dev, 1),
3368 (unsigned long)
3369 pci_resource_start(l_fb_info->dev, 2),
3370 (unsigned long)
3371 pci_resource_start(l_fb_info->dev, 3),
3372 (unsigned long)
3373 pci_resource_start(l_fb_info->dev, 4),
3374 (unsigned long)
3375 pci_resource_start(l_fb_info->dev, 5),
3376 (unsigned long) l_fb_info->dev->irq);
3377
3378 l_fb_info->pIOBase =
3379 (unsigned char *)
3380 pci_resource_start(l_fb_info->dev, 0);
3381 #ifdef __BIG_ENDIAN
3382 l_fb_info->pIOBase += PM3_REGS_SIZE;
3383 #endif
3384 l_fb_info->vIOBase = (unsigned char *) -1;
3385 l_fb_info->p_fb =
3386 (unsigned char *)
3387 pci_resource_start(l_fb_info->dev, 1);
3388 l_fb_info->v_fb = (unsigned char *) -1;
3389
3390 if (!request_mem_region
3391 ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
3392 "pm3fb")) {
3393 printk
3394 (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
3395 l_fb_info->board_num);
3396 continue;
3397 }
3398 if (!request_mem_region
3399 ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
3400 "pm3fb I/O regs")) {
3401 printk
3402 (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
3403 l_fb_info->board_num);
3404 continue;
3405 }
3406 if (forcesize[l_fb_info->board_num])
3407 l_fb_info->fb_size = forcesize[l_fb_info->board_num];
3408
3409 l_fb_info->fb_size =
3410 pm3fb_size_memory(l_fb_info);
3411 if (l_fb_info->fb_size) {
3412 (void) pci_enable_device(l_fb_info->dev);
3413 pm3fb_common_init(l_fb_info);
3414 } else
3415 printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
3416 }
3417 }
3418 }
3419
3420 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
3421 struct fb_info_gen *info)
3422 {
3423 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3424
3425 DTRACE;
3426
3427 if (!current_par_valid[l_fb_info->board_num])
3428 return -EINVAL;
3429
3430 l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
3431 pm3fb_Shiftbpp(l_fb_info,
3432 l_fb_info->current_par->depth,
3433 (var->yoffset * l_fb_info->current_par->width) +
3434 var->xoffset);
3435 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
3436 return 0;
3437 }
3438
3439 static int pm3fb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
3440 {
3441 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3442 u32 cm, i;
3443 #ifdef PM3FB_MASTER_DEBUG
3444 char cc[3];
3445 #endif /* PM3FB_MASTER_DEBUG */
3446
3447 switch(cmd)
3448 {
3449 #ifdef PM3FB_MASTER_DEBUG
3450 case PM3FBIO_CLEARMEMORY:
3451 if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
3452 return(-EFAULT);
3453 pm3fb_clear_memory(l_fb_info, cm);
3454 return(0);
3455 break;
3456
3457 case PM3FBIO_CLEARCMAP:
3458 if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
3459 return(-EFAULT);
3460 pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
3461 return(0);
3462 break;
3463 #endif /* PM3FB_MASTER_DEBUG */
3464
3465 case PM3FBIO_RESETCHIP:
3466 cm = 1;
3467 PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
3468 for (i = 0 ; (i < 10000) && cm ; i++)
3469 {
3470 PM3_DELAY(10);
3471 cm = PM3_READ_REG(PM3ResetStatus);
3472 }
3473 if (cm)
3474 {
3475 printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
3476 return(-EIO);
3477 }
3478 /* first thing first, reload memory timings */
3479 pm3fb_write_memory_timings(l_fb_info);
3480 #ifdef PM3FB_USE_ACCEL
3481 pm3fb_init_engine(l_fb_info);
3482 #endif /* PM3FB_USE_ACCEL */
3483 pm3fb_write_mode(l_fb_info);
3484 return(0);
3485 break;
3486
3487 default:
3488 DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
3489 return(-EINVAL);
3490 }
3491 }
3492
3493 /* ****************************************** */
3494 /* ***** standard FB API init functions ***** */
3495 /* ****************************************** */
3496
3497 int __init pm3fb_setup(char *options)
3498 {
3499 long opsi = strlen(options);
3500
3501 DTRACE;
3502
3503 memcpy(g_options, options,
3504 ((opsi + 1) >
3505 PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
3506 g_options[PM3_OPTIONS_SIZE - 1] = 0;
3507
3508 return (0);
3509 }
3510
3511 int __init pm3fb_init(void)
3512 {
3513 DTRACE;
3514
3515 DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $");
3516
3517 pm3fb_real_setup(g_options);
3518
3519 pm3fb_detect();
3520
3521 if (!fb_info[0].dev) { /* not even one board ??? */
3522 DPRINTK(1, "No PCI Permedia3 board detected\n");
3523 }
3524 return (0);
3525 }
3526
3527 /* ************************* */
3528 /* **** Module support ***** */
3529 /* ************************* */
3530
3531 #ifdef MODULE
3532 MODULE_AUTHOR("Romain Dolbeau");
3533 MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
3534 static char *mode[PM3_MAX_BOARD];
3535 module_param_array(mode, charp, NULL, 0);
3536 MODULE_PARM_DESC(mode,"video mode");
3537 module_param_array(disable, short, NULL, 0);
3538 MODULE_PARM_DESC(disable,"disable board");
3539 static short off[PM3_MAX_BOARD];
3540 module_param_array(off, short, NULL, 0);
3541 MODULE_PARM_DESC(off,"disable board");
3542 static char *pciid[PM3_MAX_BOARD];
3543 module_param_array(pciid, charp, NULL, 0);
3544 MODULE_PARM_DESC(pciid,"board PCI Id");
3545 module_param_array(noaccel, short, NULL, 0);
3546 MODULE_PARM_DESC(noaccel,"disable accel");
3547 static char *font[PM3_MAX_BOARD];
3548 module_param_array(font, charp, NULL, 0);
3549 MODULE_PARM_DESC(font,"choose font");
3550 module_param(depth, short, NULL, 0);
3551 MODULE_PARM_DESC(depth,"boot-time depth");
3552 module_param(printtimings, short, NULL, 0);
3553 MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
3554 module_param(forcesize, short, NULL, 0);
3555 MODULE_PARM_DESC(forcesize, "force specified memory size");
3556 /*
3557 MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
3558 MODULE_GENERIC_TABLE(gtype,name)
3559 MODULE_DEVICE_TABLE(type,name)
3560 */
3561
3562 void pm3fb_build_options(void)
3563 {
3564 int i;
3565 char ts[128];
3566
3567 strcpy(g_options, "pm3fb");
3568 for (i = 0; i < PM3_MAX_BOARD ; i++)
3569 {
3570 if (mode[i])
3571 {
3572 sprintf(ts, ",mode:%d:%s", i, mode[i]);
3573 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3574 }
3575 if (disable[i] || off[i])
3576 {
3577 sprintf(ts, ",disable:%d:", i);
3578 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3579 }
3580 if (pciid[i])
3581 {
3582 sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
3583 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3584 }
3585 if (noaccel[i])
3586 {
3587 sprintf(ts, ",noaccel:%d:", i);
3588 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3589 }
3590 if (font[i])
3591 {
3592 sprintf(ts, ",font:%d:%s", i, font[i]);
3593 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3594 }
3595 if (depth[i])
3596 {
3597 sprintf(ts, ",depth:%d:%d", i, depth[i]);
3598 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3599 }
3600 }
3601 g_options[PM3_OPTIONS_SIZE - 1] = '\0';
3602 DPRINTK(1, "pm3fb use options: %s\n", g_options);
3603 }
3604
3605 int init_module(void)
3606 {
3607 DTRACE;
3608
3609 pm3fb_build_options();
3610
3611 pm3fb_init();
3612
3613 return (0);
3614 }
3615
3616 void cleanup_module(void)
3617 {
3618 DTRACE;
3619 {
3620 unsigned long i;
3621 struct pm3fb_info *l_fb_info;
3622 for (i = 0; i < PM3_MAX_BOARD; i++) {
3623 l_fb_info = &(fb_info[i]);
3624 if ((l_fb_info->dev != NULL)
3625 && (!(disable[l_fb_info->board_num]))) {
3626 if (l_fb_info->vIOBase !=
3627 (unsigned char *) -1) {
3628 pm3fb_unmapIO(l_fb_info);
3629 release_mem_region(l_fb_info->p_fb,
3630 l_fb_info->
3631 fb_size);
3632 release_mem_region(l_fb_info->
3633 pIOBase,
3634 PM3_REGS_SIZE);
3635 }
3636 unregister_framebuffer(&l_fb_info->gen.
3637 info);
3638 }
3639 }
3640 }
3641 return;
3642 }
3643 #endif /* MODULE */
Linux with added FPC-III support