2 * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
4 * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
6 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
7 * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/acpi.h>
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/mfd/core.h>
21 #include <linux/mfd/intel_soc_pmic.h>
22 #include <linux/regmap.h>
24 /* PMIC device registers */
25 #define REG_OFFSET_MASK GENMASK(7, 0)
26 #define REG_ADDR_MASK GENMASK(15, 8)
27 #define REG_ADDR_SHIFT 8
29 #define CHT_WC_IRQLVL1 0x6e02
30 #define CHT_WC_IRQLVL1_MASK 0x6e0e
32 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
35 /* Level 1 IRQs (level 2 IRQs are handled in the child device drivers) */
37 CHT_WC_PWRSRC_IRQ
= 0,
43 /* There is no irq 6 */
47 static struct resource cht_wc_pwrsrc_resources
[] = {
48 DEFINE_RES_IRQ(CHT_WC_PWRSRC_IRQ
),
51 static struct resource cht_wc_ext_charger_resources
[] = {
52 DEFINE_RES_IRQ(CHT_WC_EXT_CHGR_IRQ
),
55 static struct mfd_cell cht_wc_dev
[] = {
57 .name
= "cht_wcove_pwrsrc",
58 .num_resources
= ARRAY_SIZE(cht_wc_pwrsrc_resources
),
59 .resources
= cht_wc_pwrsrc_resources
,
61 .name
= "cht_wcove_ext_chgr",
62 .num_resources
= ARRAY_SIZE(cht_wc_ext_charger_resources
),
63 .resources
= cht_wc_ext_charger_resources
,
65 { .name
= "cht_wcove_region", },
69 * The CHT Whiskey Cove covers multiple I2C addresses, with a 1 Byte
70 * register address space per I2C address, so we use 16 bit register
71 * addresses where the high 8 bits contain the I2C client address.
73 static int cht_wc_byte_reg_read(void *context
, unsigned int reg
,
76 struct i2c_client
*client
= context
;
77 int ret
, orig_addr
= client
->addr
;
79 if (!(reg
& REG_ADDR_MASK
)) {
80 dev_err(&client
->dev
, "Error I2C address not specified\n");
84 client
->addr
= (reg
& REG_ADDR_MASK
) >> REG_ADDR_SHIFT
;
85 ret
= i2c_smbus_read_byte_data(client
, reg
& REG_OFFSET_MASK
);
86 client
->addr
= orig_addr
;
95 static int cht_wc_byte_reg_write(void *context
, unsigned int reg
,
98 struct i2c_client
*client
= context
;
99 int ret
, orig_addr
= client
->addr
;
101 if (!(reg
& REG_ADDR_MASK
)) {
102 dev_err(&client
->dev
, "Error I2C address not specified\n");
106 client
->addr
= (reg
& REG_ADDR_MASK
) >> REG_ADDR_SHIFT
;
107 ret
= i2c_smbus_write_byte_data(client
, reg
& REG_OFFSET_MASK
, val
);
108 client
->addr
= orig_addr
;
113 static const struct regmap_config cht_wc_regmap_cfg
= {
116 .reg_write
= cht_wc_byte_reg_write
,
117 .reg_read
= cht_wc_byte_reg_read
,
120 static const struct regmap_irq cht_wc_regmap_irqs
[] = {
121 REGMAP_IRQ_REG(CHT_WC_PWRSRC_IRQ
, 0, BIT(CHT_WC_PWRSRC_IRQ
)),
122 REGMAP_IRQ_REG(CHT_WC_THRM_IRQ
, 0, BIT(CHT_WC_THRM_IRQ
)),
123 REGMAP_IRQ_REG(CHT_WC_BCU_IRQ
, 0, BIT(CHT_WC_BCU_IRQ
)),
124 REGMAP_IRQ_REG(CHT_WC_ADC_IRQ
, 0, BIT(CHT_WC_ADC_IRQ
)),
125 REGMAP_IRQ_REG(CHT_WC_EXT_CHGR_IRQ
, 0, BIT(CHT_WC_EXT_CHGR_IRQ
)),
126 REGMAP_IRQ_REG(CHT_WC_GPIO_IRQ
, 0, BIT(CHT_WC_GPIO_IRQ
)),
127 REGMAP_IRQ_REG(CHT_WC_CRIT_IRQ
, 0, BIT(CHT_WC_CRIT_IRQ
)),
130 static const struct regmap_irq_chip cht_wc_regmap_irq_chip
= {
131 .name
= "cht_wc_irq_chip",
132 .status_base
= CHT_WC_IRQLVL1
,
133 .mask_base
= CHT_WC_IRQLVL1_MASK
,
134 .irqs
= cht_wc_regmap_irqs
,
135 .num_irqs
= ARRAY_SIZE(cht_wc_regmap_irqs
),
139 static int cht_wc_probe(struct i2c_client
*client
)
141 struct device
*dev
= &client
->dev
;
142 struct intel_soc_pmic
*pmic
;
144 unsigned long long hrv
;
147 status
= acpi_evaluate_integer(ACPI_HANDLE(dev
), "_HRV", NULL
, &hrv
);
148 if (ACPI_FAILURE(status
)) {
149 dev_err(dev
, "Failed to get PMIC hardware revision\n");
152 if (hrv
!= CHT_WC_HRV
) {
153 dev_err(dev
, "Invalid PMIC hardware revision: %llu\n", hrv
);
156 if (client
->irq
< 0) {
157 dev_err(dev
, "Invalid IRQ\n");
161 pmic
= devm_kzalloc(dev
, sizeof(*pmic
), GFP_KERNEL
);
165 pmic
->irq
= client
->irq
;
167 i2c_set_clientdata(client
, pmic
);
169 pmic
->regmap
= devm_regmap_init(dev
, NULL
, client
, &cht_wc_regmap_cfg
);
170 if (IS_ERR(pmic
->regmap
))
171 return PTR_ERR(pmic
->regmap
);
173 ret
= devm_regmap_add_irq_chip(dev
, pmic
->regmap
, pmic
->irq
,
174 IRQF_ONESHOT
| IRQF_SHARED
, 0,
175 &cht_wc_regmap_irq_chip
,
176 &pmic
->irq_chip_data
);
180 return devm_mfd_add_devices(dev
, PLATFORM_DEVID_NONE
,
181 cht_wc_dev
, ARRAY_SIZE(cht_wc_dev
), NULL
, 0,
182 regmap_irq_get_domain(pmic
->irq_chip_data
));
185 static void cht_wc_shutdown(struct i2c_client
*client
)
187 struct intel_soc_pmic
*pmic
= i2c_get_clientdata(client
);
189 disable_irq(pmic
->irq
);
192 static int __maybe_unused
cht_wc_suspend(struct device
*dev
)
194 struct intel_soc_pmic
*pmic
= dev_get_drvdata(dev
);
196 disable_irq(pmic
->irq
);
201 static int __maybe_unused
cht_wc_resume(struct device
*dev
)
203 struct intel_soc_pmic
*pmic
= dev_get_drvdata(dev
);
205 enable_irq(pmic
->irq
);
209 static SIMPLE_DEV_PM_OPS(cht_wc_pm_ops
, cht_wc_suspend
, cht_wc_resume
);
211 static const struct i2c_device_id cht_wc_i2c_id
[] = {
215 static const struct acpi_device_id cht_wc_acpi_ids
[] = {
220 static struct i2c_driver cht_wc_driver
= {
222 .name
= "CHT Whiskey Cove PMIC",
223 .pm
= &cht_wc_pm_ops
,
224 .acpi_match_table
= cht_wc_acpi_ids
,
226 .probe_new
= cht_wc_probe
,
227 .shutdown
= cht_wc_shutdown
,
228 .id_table
= cht_wc_i2c_id
,
230 builtin_i2c_driver(cht_wc_driver
);