mtd: no need to check return value of debugfs_create functions
[linux/fpc-iii.git] / drivers / clk / mediatek / clk-mt2701-hif.c
blob61444881c53910692ed1782c698acd292b8537ce
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Shunli Wang <shunli.wang@mediatek.com>
5 */
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
13 #include <dt-bindings/clock/mt2701-clk.h>
15 static const struct mtk_gate_regs hif_cg_regs = {
16 .sta_ofs = 0x0030,
19 #define GATE_HIF(_id, _name, _parent, _shift) { \
20 .id = _id, \
21 .name = _name, \
22 .parent_name = _parent, \
23 .regs = &hif_cg_regs, \
24 .shift = _shift, \
25 .ops = &mtk_clk_gate_ops_no_setclr_inv, \
28 static const struct mtk_gate hif_clks[] = {
29 GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),
30 GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22),
31 GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24),
32 GATE_HIF(CLK_HIFSYS_PCIE1, "pcie1_clk", "ethpll_500m_ck", 25),
33 GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),
36 static const struct of_device_id of_match_clk_mt2701_hif[] = {
37 { .compatible = "mediatek,mt2701-hifsys", },
41 static int clk_mt2701_hif_probe(struct platform_device *pdev)
43 struct clk_onecell_data *clk_data;
44 int r;
45 struct device_node *node = pdev->dev.of_node;
47 clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR);
49 mtk_clk_register_gates(node, hif_clks, ARRAY_SIZE(hif_clks),
50 clk_data);
52 r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
53 if (r) {
54 dev_err(&pdev->dev,
55 "could not register clock provider: %s: %d\n",
56 pdev->name, r);
57 return r;
60 mtk_register_reset_controller(node, 1, 0x34);
62 return 0;
65 static struct platform_driver clk_mt2701_hif_drv = {
66 .probe = clk_mt2701_hif_probe,
67 .driver = {
68 .name = "clk-mt2701-hif",
69 .of_match_table = of_match_clk_mt2701_hif,
73 builtin_platform_driver(clk_mt2701_hif_drv);