b43: avoid PPC fault during resume
[linux/fpc-iii.git] / drivers / watchdog / gef_wdt.c
blob734d9806a872bc300ad756ab7978192025a58f37
1 /*
2 * GE Fanuc watchdog userspace interface
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * Based on: mv64x60_wdt.c (MV64X60 watchdog userspace interface)
14 * Author: James Chapman <jchapman@katalix.com>
17 /* TODO:
18 * This driver does not provide support for the hardwares capability of sending
19 * an interrupt at a programmable threshold.
21 * This driver currently can only support 1 watchdog - there are 2 in the
22 * hardware that this driver supports. Thus one could be configured as a
23 * process-based watchdog (via /dev/watchdog), the second (using the interrupt
24 * capabilities) a kernel-based watchdog.
27 #include <linux/kernel.h>
28 #include <linux/compiler.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/miscdevice.h>
32 #include <linux/watchdog.h>
33 #include <linux/of.h>
34 #include <linux/of_platform.h>
35 #include <linux/io.h>
36 #include <linux/uaccess.h>
38 #include <sysdev/fsl_soc.h>
41 * The watchdog configuration register contains a pair of 2-bit fields,
42 * 1. a reload field, bits 27-26, which triggers a reload of
43 * the countdown register, and
44 * 2. an enable field, bits 25-24, which toggles between
45 * enabling and disabling the watchdog timer.
46 * Bit 31 is a read-only field which indicates whether the
47 * watchdog timer is currently enabled.
49 * The low 24 bits contain the timer reload value.
51 #define GEF_WDC_ENABLE_SHIFT 24
52 #define GEF_WDC_SERVICE_SHIFT 26
53 #define GEF_WDC_ENABLED_SHIFT 31
55 #define GEF_WDC_ENABLED_TRUE 1
56 #define GEF_WDC_ENABLED_FALSE 0
58 /* Flags bits */
59 #define GEF_WDOG_FLAG_OPENED 0
61 static unsigned long wdt_flags;
62 static int wdt_status;
63 static void __iomem *gef_wdt_regs;
64 static int gef_wdt_timeout;
65 static int gef_wdt_count;
66 static unsigned int bus_clk;
67 static char expect_close;
68 static DEFINE_SPINLOCK(gef_wdt_spinlock);
70 static int nowayout = WATCHDOG_NOWAYOUT;
71 module_param(nowayout, int, 0);
72 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
73 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
76 static int gef_wdt_toggle_wdc(int enabled_predicate, int field_shift)
78 u32 data;
79 u32 enabled;
80 int ret = 0;
82 spin_lock(&gef_wdt_spinlock);
83 data = ioread32be(gef_wdt_regs);
84 enabled = (data >> GEF_WDC_ENABLED_SHIFT) & 1;
86 /* only toggle the requested field if enabled state matches predicate */
87 if ((enabled ^ enabled_predicate) == 0) {
88 /* We write a 1, then a 2 -- to the appropriate field */
89 data = (1 << field_shift) | gef_wdt_count;
90 iowrite32be(data, gef_wdt_regs);
92 data = (2 << field_shift) | gef_wdt_count;
93 iowrite32be(data, gef_wdt_regs);
94 ret = 1;
96 spin_unlock(&gef_wdt_spinlock);
98 return ret;
101 static void gef_wdt_service(void)
103 gef_wdt_toggle_wdc(GEF_WDC_ENABLED_TRUE,
104 GEF_WDC_SERVICE_SHIFT);
107 static void gef_wdt_handler_enable(void)
109 if (gef_wdt_toggle_wdc(GEF_WDC_ENABLED_FALSE,
110 GEF_WDC_ENABLE_SHIFT)) {
111 gef_wdt_service();
112 printk(KERN_NOTICE "gef_wdt: watchdog activated\n");
116 static void gef_wdt_handler_disable(void)
118 if (gef_wdt_toggle_wdc(GEF_WDC_ENABLED_TRUE,
119 GEF_WDC_ENABLE_SHIFT))
120 printk(KERN_NOTICE "gef_wdt: watchdog deactivated\n");
123 static void gef_wdt_set_timeout(unsigned int timeout)
125 /* maximum bus cycle count is 0xFFFFFFFF */
126 if (timeout > 0xFFFFFFFF / bus_clk)
127 timeout = 0xFFFFFFFF / bus_clk;
129 /* Register only holds upper 24 bits, bit shifted into lower 24 */
130 gef_wdt_count = (timeout * bus_clk) >> 8;
131 gef_wdt_timeout = timeout;
135 static ssize_t gef_wdt_write(struct file *file, const char __user *data,
136 size_t len, loff_t *ppos)
138 if (len) {
139 if (!nowayout) {
140 size_t i;
142 expect_close = 0;
144 for (i = 0; i != len; i++) {
145 char c;
146 if (get_user(c, data + i))
147 return -EFAULT;
148 if (c == 'V')
149 expect_close = 42;
152 gef_wdt_service();
155 return len;
158 static long gef_wdt_ioctl(struct file *file, unsigned int cmd,
159 unsigned long arg)
161 int timeout;
162 int options;
163 void __user *argp = (void __user *)arg;
164 static struct watchdog_info info = {
165 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
166 WDIOF_KEEPALIVEPING,
167 .firmware_version = 0,
168 .identity = "GE Fanuc watchdog",
171 switch (cmd) {
172 case WDIOC_GETSUPPORT:
173 if (copy_to_user(argp, &info, sizeof(info)))
174 return -EFAULT;
175 break;
177 case WDIOC_GETSTATUS:
178 case WDIOC_GETBOOTSTATUS:
179 if (put_user(wdt_status, (int __user *)argp))
180 return -EFAULT;
181 wdt_status &= ~WDIOF_KEEPALIVEPING;
182 break;
184 case WDIOC_SETOPTIONS:
185 if (get_user(options, (int __user *)argp))
186 return -EFAULT;
188 if (options & WDIOS_DISABLECARD)
189 gef_wdt_handler_disable();
191 if (options & WDIOS_ENABLECARD)
192 gef_wdt_handler_enable();
193 break;
195 case WDIOC_KEEPALIVE:
196 gef_wdt_service();
197 wdt_status |= WDIOF_KEEPALIVEPING;
198 break;
200 case WDIOC_SETTIMEOUT:
201 if (get_user(timeout, (int __user *)argp))
202 return -EFAULT;
203 gef_wdt_set_timeout(timeout);
204 /* Fall through */
206 case WDIOC_GETTIMEOUT:
207 if (put_user(gef_wdt_timeout, (int __user *)argp))
208 return -EFAULT;
209 break;
211 default:
212 return -ENOTTY;
215 return 0;
218 static int gef_wdt_open(struct inode *inode, struct file *file)
220 if (test_and_set_bit(GEF_WDOG_FLAG_OPENED, &wdt_flags))
221 return -EBUSY;
223 if (nowayout)
224 __module_get(THIS_MODULE);
226 gef_wdt_handler_enable();
228 return nonseekable_open(inode, file);
231 static int gef_wdt_release(struct inode *inode, struct file *file)
233 if (expect_close == 42)
234 gef_wdt_handler_disable();
235 else {
236 printk(KERN_CRIT
237 "gef_wdt: unexpected close, not stopping timer!\n");
238 gef_wdt_service();
240 expect_close = 0;
242 clear_bit(GEF_WDOG_FLAG_OPENED, &wdt_flags);
244 return 0;
247 static const struct file_operations gef_wdt_fops = {
248 .owner = THIS_MODULE,
249 .llseek = no_llseek,
250 .write = gef_wdt_write,
251 .unlocked_ioctl = gef_wdt_ioctl,
252 .open = gef_wdt_open,
253 .release = gef_wdt_release,
256 static struct miscdevice gef_wdt_miscdev = {
257 .minor = WATCHDOG_MINOR,
258 .name = "watchdog",
259 .fops = &gef_wdt_fops,
263 static int __devinit gef_wdt_probe(struct of_device *dev,
264 const struct of_device_id *match)
266 int timeout = 10;
267 u32 freq;
269 bus_clk = 133; /* in MHz */
271 freq = fsl_get_sys_freq();
272 if (freq != -1)
273 bus_clk = freq;
275 /* Map devices registers into memory */
276 gef_wdt_regs = of_iomap(dev->node, 0);
277 if (gef_wdt_regs == NULL)
278 return -ENOMEM;
280 gef_wdt_set_timeout(timeout);
282 gef_wdt_handler_disable(); /* in case timer was already running */
284 return misc_register(&gef_wdt_miscdev);
287 static int __devexit gef_wdt_remove(struct platform_device *dev)
289 misc_deregister(&gef_wdt_miscdev);
291 gef_wdt_handler_disable();
293 iounmap(gef_wdt_regs);
295 return 0;
298 static const struct of_device_id gef_wdt_ids[] = {
300 .compatible = "gef,fpga-wdt",
305 static struct of_platform_driver gef_wdt_driver = {
306 .owner = THIS_MODULE,
307 .name = "gef_wdt",
308 .match_table = gef_wdt_ids,
309 .probe = gef_wdt_probe,
312 static int __init gef_wdt_init(void)
314 printk(KERN_INFO "GE Fanuc watchdog driver\n");
315 return of_register_platform_driver(&gef_wdt_driver);
318 static void __exit gef_wdt_exit(void)
320 of_unregister_platform_driver(&gef_wdt_driver);
323 module_init(gef_wdt_init);
324 module_exit(gef_wdt_exit);
326 MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com>");
327 MODULE_DESCRIPTION("GE Fanuc watchdog driver");
328 MODULE_LICENSE("GPL");
329 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
330 MODULE_ALIAS("platform: gef_wdt");