arch/arm/mach-imx/3ds_debugboard.c

   1 /*
   2  * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/interrupt.h>
  14 #include <linux/irq.h>
  15 #include <linux/irqdomain.h>
  16 #include <linux/io.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/gpio.h>
  19 #include <linux/module.h>
  20 #include <linux/smsc911x.h>
  21 #include <linux/regulator/machine.h>
  22 #include <linux/regulator/fixed.h>
  23
  24 #include "hardware.h"
  25
  26 /* LAN9217 ethernet base address */
  27 #define LAN9217_BASE_ADDR(n)    (n + 0x0)
  28 /* External UART */
  29 #define UARTA_BASE_ADDR(n)      (n + 0x8000)
  30 #define UARTB_BASE_ADDR(n)      (n + 0x10000)
  31
  32 #define BOARD_IO_ADDR(n)        (n + 0x20000)
  33 /* LED switchs */
  34 #define LED_SWITCH_REG          0x00
  35 /* buttons */
  36 #define SWITCH_BUTTONS_REG      0x08
  37 /* status, interrupt */
  38 #define INTR_STATUS_REG 0x10
  39 #define INTR_MASK_REG           0x38
  40 #define INTR_RESET_REG          0x20
  41 /* magic word for debug CPLD */
  42 #define MAGIC_NUMBER1_REG       0x40
  43 #define MAGIC_NUMBER2_REG       0x48
  44 /* CPLD code version */
  45 #define CPLD_CODE_VER_REG       0x50
  46 /* magic word for debug CPLD */
  47 #define MAGIC_NUMBER3_REG       0x58
  48 /* module reset register*/
  49 #define MODULE_RESET_REG        0x60
  50 /* CPU ID and Personality ID */
  51 #define MCU_BOARD_ID_REG        0x68
  52
  53 #define MXC_MAX_EXP_IO_LINES    16
  54
  55 /* interrupts like external uart , external ethernet etc*/
  56 #define EXPIO_INT_ENET          0
  57 #define EXPIO_INT_XUART_A       1
  58 #define EXPIO_INT_XUART_B       2
  59 #define EXPIO_INT_BUTTON_A      3
  60 #define EXPIO_INT_BUTTON_B      4
  61
  62 static void __iomem *brd_io;
  63 static struct irq_domain *domain;
  64
  65 static struct resource smsc911x_resources[] = {
  66         {
  67                 .flags = IORESOURCE_MEM,
  68         } , {
  69                 .flags = IORESOURCE_IRQ,
  70         },
  71 };
  72
  73 static struct smsc911x_platform_config smsc911x_config = {
  74         .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  75         .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
  76 };
  77
  78 static struct platform_device smsc_lan9217_device = {
  79         .name = "smsc911x",
  80         .id = -1,
  81         .dev = {
  82                 .platform_data = &smsc911x_config,
  83         },
  84         .num_resources = ARRAY_SIZE(smsc911x_resources),
  85         .resource = smsc911x_resources,
  86 };
  87
  88 static void mxc_expio_irq_handler(struct irq_desc *desc)
  89 {
  90         u32 imr_val;
  91         u32 int_valid;
  92         u32 expio_irq;
  93
  94         /* irq = gpio irq number */
  95         desc->irq_data.chip->irq_mask(&desc->irq_data);
  96
  97         imr_val = imx_readw(brd_io + INTR_MASK_REG);
  98         int_valid = imx_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
  99
 100         expio_irq = 0;
 101         for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
 102                 if ((int_valid & 1) == 0)
 103                         continue;
 104                 generic_handle_irq(irq_find_mapping(domain, expio_irq));
 105         }
 106
 107         desc->irq_data.chip->irq_ack(&desc->irq_data);
 108         desc->irq_data.chip->irq_unmask(&desc->irq_data);
 109 }
 110
 111 /*
 112  * Disable an expio pin's interrupt by setting the bit in the imr.
 113  * Irq is an expio virtual irq number
 114  */
 115 static void expio_mask_irq(struct irq_data *d)
 116 {
 117         u16 reg;
 118         u32 expio = d->hwirq;
 119
 120         reg = imx_readw(brd_io + INTR_MASK_REG);
 121         reg |= (1 << expio);
 122         imx_writew(reg, brd_io + INTR_MASK_REG);
 123 }
 124
 125 static void expio_ack_irq(struct irq_data *d)
 126 {
 127         u32 expio = d->hwirq;
 128
 129         imx_writew(1 << expio, brd_io + INTR_RESET_REG);
 130         imx_writew(0, brd_io + INTR_RESET_REG);
 131         expio_mask_irq(d);
 132 }
 133
 134 static void expio_unmask_irq(struct irq_data *d)
 135 {
 136         u16 reg;
 137         u32 expio = d->hwirq;
 138
 139         reg = imx_readw(brd_io + INTR_MASK_REG);
 140         reg &= ~(1 << expio);
 141         imx_writew(reg, brd_io + INTR_MASK_REG);
 142 }
 143
 144 static struct irq_chip expio_irq_chip = {
 145         .irq_ack = expio_ack_irq,
 146         .irq_mask = expio_mask_irq,
 147         .irq_unmask = expio_unmask_irq,
 148 };
 149
 150 static struct regulator_consumer_supply dummy_supplies[] = {
 151         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
 152         REGULATOR_SUPPLY("vddvario", "smsc911x"),
 153 };
 154
 155 int __init mxc_expio_init(u32 base, u32 intr_gpio)
 156 {
 157         u32 p_irq = gpio_to_irq(intr_gpio);
 158         int irq_base;
 159         int i;
 160
 161         brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K);
 162         if (brd_io == NULL)
 163                 return -ENOMEM;
 164
 165         if ((imx_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
 166             (imx_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
 167             (imx_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
 168                 pr_info("3-Stack Debug board not detected\n");
 169                 iounmap(brd_io);
 170                 brd_io = NULL;
 171                 return -ENODEV;
 172         }
 173
 174         pr_info("3-Stack Debug board detected, rev = 0x%04X\n",
 175                 readw(brd_io + CPLD_CODE_VER_REG));
 176
 177         /*
 178          * Configure INT line as GPIO input
 179          */
 180         gpio_request(intr_gpio, "expio_pirq");
 181         gpio_direction_input(intr_gpio);
 182
 183         /* disable the interrupt and clear the status */
 184         imx_writew(0, brd_io + INTR_MASK_REG);
 185         imx_writew(0xFFFF, brd_io + INTR_RESET_REG);
 186         imx_writew(0, brd_io + INTR_RESET_REG);
 187         imx_writew(0x1F, brd_io + INTR_MASK_REG);
 188
 189         irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id());
 190         WARN_ON(irq_base < 0);
 191
 192         domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0,
 193                                        &irq_domain_simple_ops, NULL);
 194         WARN_ON(!domain);
 195
 196         for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
 197                 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
 198                 irq_clear_status_flags(i, IRQ_NOREQUEST);
 199         }
 200         irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
 201         irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
 202
 203         /* Register Lan device on the debugboard */
 204         regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
 205
 206         smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
 207         smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
 208         smsc911x_resources[1].start = irq_find_mapping(domain, EXPIO_INT_ENET);
 209         smsc911x_resources[1].end = irq_find_mapping(domain, EXPIO_INT_ENET);
 210         platform_device_register(&smsc_lan9217_device);
 211
 212         return 0;
 213 }