scsi: hpsa: correct ioaccel2 chaining
[linux/fpc-iii.git] / arch / arm / mach-imx / mach-imx1.c
blobde5ab8d88549de87ea88fc92c2bf4eda7a022e38
1 /*
2 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
10 #include <linux/of_platform.h>
11 #include <asm/mach/arch.h>
12 #include <asm/mach/map.h>
14 #include "common.h"
15 #include "hardware.h"
17 #define MX1_AVIC_ADDR 0x00223000
19 static void __init imx1_init_early(void)
21 mxc_set_cpu_type(MXC_CPU_MX1);
24 static void __init imx1_init_irq(void)
26 void __iomem *avic_addr;
28 avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K);
29 WARN_ON(!avic_addr);
31 mxc_init_irq(avic_addr);
34 static const char * const imx1_dt_board_compat[] __initconst = {
35 "fsl,imx1",
36 NULL
39 DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
40 .map_io = debug_ll_io_init,
41 .init_early = imx1_init_early,
42 .init_irq = imx1_init_irq,
43 .dt_compat = imx1_dt_board_compat,
44 .restart = mxc_restart,
45 MACHINE_END