include/drm/drm_mode.h

   1 /*
   2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
   4  * Copyright (c) 2008 Red Hat Inc.
   5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
   6  * Copyright (c) 2007-2008 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24  * IN THE SOFTWARE.
  25  */
  26
  27 #ifndef _DRM_MODE_H
  28 #define _DRM_MODE_H
  29
  30 #define DRM_DISPLAY_INFO_LEN    32
  31 #define DRM_CONNECTOR_NAME_LEN  32
  32 #define DRM_DISPLAY_MODE_LEN    32
  33 #define DRM_PROP_NAME_LEN       32
  34
  35 #define DRM_MODE_TYPE_BUILTIN   (1<<0)
  36 #define DRM_MODE_TYPE_CLOCK_C   ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  37 #define DRM_MODE_TYPE_CRTC_C    ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  38 #define DRM_MODE_TYPE_PREFERRED (1<<3)
  39 #define DRM_MODE_TYPE_DEFAULT   (1<<4)
  40 #define DRM_MODE_TYPE_USERDEF   (1<<5)
  41 #define DRM_MODE_TYPE_DRIVER    (1<<6)
  42
  43 /* Video mode flags */
  44 /* bit compatible with the xorg definitions. */
  45 #define DRM_MODE_FLAG_PHSYNC    (1<<0)
  46 #define DRM_MODE_FLAG_NHSYNC    (1<<1)
  47 #define DRM_MODE_FLAG_PVSYNC    (1<<2)
  48 #define DRM_MODE_FLAG_NVSYNC    (1<<3)
  49 #define DRM_MODE_FLAG_INTERLACE (1<<4)
  50 #define DRM_MODE_FLAG_DBLSCAN   (1<<5)
  51 #define DRM_MODE_FLAG_CSYNC     (1<<6)
  52 #define DRM_MODE_FLAG_PCSYNC    (1<<7)
  53 #define DRM_MODE_FLAG_NCSYNC    (1<<8)
  54 #define DRM_MODE_FLAG_HSKEW     (1<<9) /* hskew provided */
  55 #define DRM_MODE_FLAG_BCAST     (1<<10)
  56 #define DRM_MODE_FLAG_PIXMUX    (1<<11)
  57 #define DRM_MODE_FLAG_DBLCLK    (1<<12)
  58 #define DRM_MODE_FLAG_CLKDIV2   (1<<13)
  59
  60 /* DPMS flags */
  61 /* bit compatible with the xorg definitions. */
  62 #define DRM_MODE_DPMS_ON        0
  63 #define DRM_MODE_DPMS_STANDBY   1
  64 #define DRM_MODE_DPMS_SUSPEND   2
  65 #define DRM_MODE_DPMS_OFF       3
  66
  67 /* Scaling mode options */
  68 #define DRM_MODE_SCALE_NONE             0 /* Unmodified timing (display or
  69                                              software can still scale) */
  70 #define DRM_MODE_SCALE_FULLSCREEN       1 /* Full screen, ignore aspect */
  71 #define DRM_MODE_SCALE_CENTER           2 /* Centered, no scaling */
  72 #define DRM_MODE_SCALE_ASPECT           3 /* Full screen, preserve aspect */
  73
  74 /* Dithering mode options */
  75 #define DRM_MODE_DITHERING_OFF  0
  76 #define DRM_MODE_DITHERING_ON   1
  77
  78 /* Dirty info options */
  79 #define DRM_MODE_DIRTY_OFF      0
  80 #define DRM_MODE_DIRTY_ON       1
  81 #define DRM_MODE_DIRTY_ANNOTATE 2
  82
  83 struct drm_mode_modeinfo {
  84         __u32 clock;
  85         __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
  86         __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
  87
  88         __u32 vrefresh; /* vertical refresh * 1000 */
  89
  90         __u32 flags;
  91         __u32 type;
  92         char name[DRM_DISPLAY_MODE_LEN];
  93 };
  94
  95 struct drm_mode_card_res {
  96         __u64 fb_id_ptr;
  97         __u64 crtc_id_ptr;
  98         __u64 connector_id_ptr;
  99         __u64 encoder_id_ptr;
 100         __u32 count_fbs;
 101         __u32 count_crtcs;
 102         __u32 count_connectors;
 103         __u32 count_encoders;
 104         __u32 min_width, max_width;
 105         __u32 min_height, max_height;
 106 };
 107
 108 struct drm_mode_crtc {
 109         __u64 set_connectors_ptr;
 110         __u32 count_connectors;
 111
 112         __u32 crtc_id; /**< Id */
 113         __u32 fb_id; /**< Id of framebuffer */
 114
 115         __u32 x, y; /**< Position on the frameuffer */
 116
 117         __u32 gamma_size;
 118         __u32 mode_valid;
 119         struct drm_mode_modeinfo mode;
 120 };
 121
 122 #define DRM_MODE_ENCODER_NONE   0
 123 #define DRM_MODE_ENCODER_DAC    1
 124 #define DRM_MODE_ENCODER_TMDS   2
 125 #define DRM_MODE_ENCODER_LVDS   3
 126 #define DRM_MODE_ENCODER_TVDAC  4
 127
 128 struct drm_mode_get_encoder {
 129         __u32 encoder_id;
 130         __u32 encoder_type;
 131
 132         __u32 crtc_id; /**< Id of crtc */
 133
 134         __u32 possible_crtcs;
 135         __u32 possible_clones;
 136 };
 137
 138 /* This is for connectors with multiple signal types. */
 139 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
 140 #define DRM_MODE_SUBCONNECTOR_Automatic 0
 141 #define DRM_MODE_SUBCONNECTOR_Unknown   0
 142 #define DRM_MODE_SUBCONNECTOR_DVID      3
 143 #define DRM_MODE_SUBCONNECTOR_DVIA      4
 144 #define DRM_MODE_SUBCONNECTOR_Composite 5
 145 #define DRM_MODE_SUBCONNECTOR_SVIDEO    6
 146 #define DRM_MODE_SUBCONNECTOR_Component 8
 147 #define DRM_MODE_SUBCONNECTOR_SCART     9
 148
 149 #define DRM_MODE_CONNECTOR_Unknown      0
 150 #define DRM_MODE_CONNECTOR_VGA          1
 151 #define DRM_MODE_CONNECTOR_DVII         2
 152 #define DRM_MODE_CONNECTOR_DVID         3
 153 #define DRM_MODE_CONNECTOR_DVIA         4
 154 #define DRM_MODE_CONNECTOR_Composite    5
 155 #define DRM_MODE_CONNECTOR_SVIDEO       6
 156 #define DRM_MODE_CONNECTOR_LVDS         7
 157 #define DRM_MODE_CONNECTOR_Component    8
 158 #define DRM_MODE_CONNECTOR_9PinDIN      9
 159 #define DRM_MODE_CONNECTOR_DisplayPort  10
 160 #define DRM_MODE_CONNECTOR_HDMIA        11
 161 #define DRM_MODE_CONNECTOR_HDMIB        12
 162 #define DRM_MODE_CONNECTOR_TV           13
 163
 164 struct drm_mode_get_connector {
 165
 166         __u64 encoders_ptr;
 167         __u64 modes_ptr;
 168         __u64 props_ptr;
 169         __u64 prop_values_ptr;
 170
 171         __u32 count_modes;
 172         __u32 count_props;
 173         __u32 count_encoders;
 174
 175         __u32 encoder_id; /**< Current Encoder */
 176         __u32 connector_id; /**< Id */
 177         __u32 connector_type;
 178         __u32 connector_type_id;
 179
 180         __u32 connection;
 181         __u32 mm_width, mm_height; /**< HxW in millimeters */
 182         __u32 subpixel;
 183 };
 184
 185 #define DRM_MODE_PROP_PENDING   (1<<0)
 186 #define DRM_MODE_PROP_RANGE     (1<<1)
 187 #define DRM_MODE_PROP_IMMUTABLE (1<<2)
 188 #define DRM_MODE_PROP_ENUM      (1<<3) /* enumerated type with text strings */
 189 #define DRM_MODE_PROP_BLOB      (1<<4)
 190
 191 struct drm_mode_property_enum {
 192         __u64 value;
 193         char name[DRM_PROP_NAME_LEN];
 194 };
 195
 196 struct drm_mode_get_property {
 197         __u64 values_ptr; /* values and blob lengths */
 198         __u64 enum_blob_ptr; /* enum and blob id ptrs */
 199
 200         __u32 prop_id;
 201         __u32 flags;
 202         char name[DRM_PROP_NAME_LEN];
 203
 204         __u32 count_values;
 205         __u32 count_enum_blobs;
 206 };
 207
 208 struct drm_mode_connector_set_property {
 209         __u64 value;
 210         __u32 prop_id;
 211         __u32 connector_id;
 212 };
 213
 214 struct drm_mode_get_blob {
 215         __u32 blob_id;
 216         __u32 length;
 217         __u64 data;
 218 };
 219
 220 struct drm_mode_fb_cmd {
 221         __u32 fb_id;
 222         __u32 width, height;
 223         __u32 pitch;
 224         __u32 bpp;
 225         __u32 depth;
 226         /* driver specific handle */
 227         __u32 handle;
 228 };
 229
 230 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
 231 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
 232 #define DRM_MODE_FB_DIRTY_FLAGS         0x03
 233
 234 /*
 235  * Mark a region of a framebuffer as dirty.
 236  *
 237  * Some hardware does not automatically update display contents
 238  * as a hardware or software draw to a framebuffer. This ioctl
 239  * allows userspace to tell the kernel and the hardware what
 240  * regions of the framebuffer have changed.
 241  *
 242  * The kernel or hardware is free to update more then just the
 243  * region specified by the clip rects. The kernel or hardware
 244  * may also delay and/or coalesce several calls to dirty into a
 245  * single update.
 246  *
 247  * Userspace may annotate the updates, the annotates are a
 248  * promise made by the caller that the change is either a copy
 249  * of pixels or a fill of a single color in the region specified.
 250  *
 251  * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
 252  * the number of updated regions are half of num_clips given,
 253  * where the clip rects are paired in src and dst. The width and
 254  * height of each one of the pairs must match.
 255  *
 256  * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
 257  * promises that the region specified of the clip rects is filled
 258  * completely with a single color as given in the color argument.
 259  */
 260
 261 struct drm_mode_fb_dirty_cmd {
 262         __u32 fb_id;
 263         __u32 flags;
 264         __u32 color;
 265         __u32 num_clips;
 266         __u64 clips_ptr;
 267 };
 268
 269 struct drm_mode_mode_cmd {
 270         __u32 connector_id;
 271         struct drm_mode_modeinfo mode;
 272 };
 273
 274 #define DRM_MODE_CURSOR_BO      (1<<0)
 275 #define DRM_MODE_CURSOR_MOVE    (1<<1)
 276
 277 /*
 278  * depending on the value in flags diffrent members are used.
 279  *
 280  * CURSOR_BO uses
 281  *    crtc
 282  *    width
 283  *    height
 284  *    handle - if 0 turns the cursor of
 285  *
 286  * CURSOR_MOVE uses
 287  *    crtc
 288  *    x
 289  *    y
 290  */
 291 struct drm_mode_cursor {
 292         __u32 flags;
 293         __u32 crtc_id;
 294         __s32 x;
 295         __s32 y;
 296         __u32 width;
 297         __u32 height;
 298         /* driver specific handle */
 299         __u32 handle;
 300 };
 301
 302 struct drm_mode_crtc_lut {
 303         __u32 crtc_id;
 304         __u32 gamma_size;
 305
 306         /* pointers to arrays */
 307         __u64 red;
 308         __u64 green;
 309         __u64 blue;
 310 };
 311
 312 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
 313 #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
 314
 315 /*
 316  * Request a page flip on the specified crtc.
 317  *
 318  * This ioctl will ask KMS to schedule a page flip for the specified
 319  * crtc.  Once any pending rendering targeting the specified fb (as of
 320  * ioctl time) has completed, the crtc will be reprogrammed to display
 321  * that fb after the next vertical refresh.  The ioctl returns
 322  * immediately, but subsequent rendering to the current fb will block
 323  * in the execbuffer ioctl until the page flip happens.  If a page
 324  * flip is already pending as the ioctl is called, EBUSY will be
 325  * returned.
 326  *
 327  * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
 328  * request that drm sends back a vblank event (see drm.h: struct
 329  * drm_event_vblank) when the page flip is done.  The user_data field
 330  * passed in with this ioctl will be returned as the user_data field
 331  * in the vblank event struct.
 332  *
 333  * The reserved field must be zero until we figure out something
 334  * clever to use it for.
 335  */
 336
 337 struct drm_mode_crtc_page_flip {
 338         __u32 crtc_id;
 339         __u32 fb_id;
 340         __u32 flags;
 341         __u32 reserved;
 342         __u64 user_data;
 343 };
 344
 345 #endif