staging: wfx: fix rate control handling
[linux/fpc-iii.git] / drivers / mfd / atmel-hlcdc.c
blob64013c57a920f9c8a62fd17c5998772cedd9a80d
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2014 Free Electrons
4 * Copyright (C) 2014 Atmel
6 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
7 */
9 #include <linux/clk.h>
10 #include <linux/iopoll.h>
11 #include <linux/mfd/atmel-hlcdc.h>
12 #include <linux/mfd/core.h>
13 #include <linux/module.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/platform_device.h>
16 #include <linux/regmap.h>
18 #define ATMEL_HLCDC_REG_MAX (0x4000 - 0x4)
20 struct atmel_hlcdc_regmap {
21 void __iomem *regs;
24 static const struct mfd_cell atmel_hlcdc_cells[] = {
26 .name = "atmel-hlcdc-pwm",
27 .of_compatible = "atmel,hlcdc-pwm",
30 .name = "atmel-hlcdc-dc",
31 .of_compatible = "atmel,hlcdc-display-controller",
35 static int regmap_atmel_hlcdc_reg_write(void *context, unsigned int reg,
36 unsigned int val)
38 struct atmel_hlcdc_regmap *hregmap = context;
40 if (reg <= ATMEL_HLCDC_DIS) {
41 u32 status;
43 readl_poll_timeout_atomic(hregmap->regs + ATMEL_HLCDC_SR,
44 status, !(status & ATMEL_HLCDC_SIP),
45 1, 100);
48 writel(val, hregmap->regs + reg);
50 return 0;
53 static int regmap_atmel_hlcdc_reg_read(void *context, unsigned int reg,
54 unsigned int *val)
56 struct atmel_hlcdc_regmap *hregmap = context;
58 *val = readl(hregmap->regs + reg);
60 return 0;
63 static const struct regmap_config atmel_hlcdc_regmap_config = {
64 .reg_bits = 32,
65 .val_bits = 32,
66 .reg_stride = 4,
67 .max_register = ATMEL_HLCDC_REG_MAX,
68 .reg_write = regmap_atmel_hlcdc_reg_write,
69 .reg_read = regmap_atmel_hlcdc_reg_read,
70 .fast_io = true,
73 static int atmel_hlcdc_probe(struct platform_device *pdev)
75 struct atmel_hlcdc_regmap *hregmap;
76 struct device *dev = &pdev->dev;
77 struct atmel_hlcdc *hlcdc;
78 struct resource *res;
80 hregmap = devm_kzalloc(dev, sizeof(*hregmap), GFP_KERNEL);
81 if (!hregmap)
82 return -ENOMEM;
84 hlcdc = devm_kzalloc(dev, sizeof(*hlcdc), GFP_KERNEL);
85 if (!hlcdc)
86 return -ENOMEM;
88 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
89 hregmap->regs = devm_ioremap_resource(dev, res);
90 if (IS_ERR(hregmap->regs))
91 return PTR_ERR(hregmap->regs);
93 hlcdc->irq = platform_get_irq(pdev, 0);
94 if (hlcdc->irq < 0)
95 return hlcdc->irq;
97 hlcdc->periph_clk = devm_clk_get(dev, "periph_clk");
98 if (IS_ERR(hlcdc->periph_clk)) {
99 dev_err(dev, "failed to get peripheral clock\n");
100 return PTR_ERR(hlcdc->periph_clk);
103 hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
104 if (IS_ERR(hlcdc->sys_clk)) {
105 dev_err(dev, "failed to get system clock\n");
106 return PTR_ERR(hlcdc->sys_clk);
109 hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
110 if (IS_ERR(hlcdc->slow_clk)) {
111 dev_err(dev, "failed to get slow clock\n");
112 return PTR_ERR(hlcdc->slow_clk);
115 hlcdc->regmap = devm_regmap_init(dev, NULL, hregmap,
116 &atmel_hlcdc_regmap_config);
117 if (IS_ERR(hlcdc->regmap))
118 return PTR_ERR(hlcdc->regmap);
120 dev_set_drvdata(dev, hlcdc);
122 return devm_mfd_add_devices(dev, -1, atmel_hlcdc_cells,
123 ARRAY_SIZE(atmel_hlcdc_cells),
124 NULL, 0, NULL);
127 static const struct of_device_id atmel_hlcdc_match[] = {
128 { .compatible = "atmel,at91sam9n12-hlcdc" },
129 { .compatible = "atmel,at91sam9x5-hlcdc" },
130 { .compatible = "atmel,sama5d2-hlcdc" },
131 { .compatible = "atmel,sama5d3-hlcdc" },
132 { .compatible = "atmel,sama5d4-hlcdc" },
133 { .compatible = "microchip,sam9x60-hlcdc" },
134 { /* sentinel */ },
136 MODULE_DEVICE_TABLE(of, atmel_hlcdc_match);
138 static struct platform_driver atmel_hlcdc_driver = {
139 .probe = atmel_hlcdc_probe,
140 .driver = {
141 .name = "atmel-hlcdc",
142 .of_match_table = atmel_hlcdc_match,
145 module_platform_driver(atmel_hlcdc_driver);
147 MODULE_ALIAS("platform:atmel-hlcdc");
148 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
149 MODULE_DESCRIPTION("Atmel HLCDC driver");
150 MODULE_LICENSE("GPL v2");