1 // SPDX-License-Identifier: GPL-2.0-only
3 * An I2C and SPI driver for the NXP PCF2127/29 RTC
4 * Copyright 2013 Til-Technologies
6 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
8 * Watchdog and tamper functions
9 * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
11 * based on the other drivers in this same directory.
13 * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
16 #include <linux/i2c.h>
17 #include <linux/spi/spi.h>
18 #include <linux/bcd.h>
19 #include <linux/rtc.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
23 #include <linux/regmap.h>
24 #include <linux/watchdog.h>
26 /* Control register 1 */
27 #define PCF2127_REG_CTRL1 0x00
28 #define PCF2127_BIT_CTRL1_TSF1 BIT(4)
29 /* Control register 2 */
30 #define PCF2127_REG_CTRL2 0x01
31 #define PCF2127_BIT_CTRL2_TSIE BIT(2)
32 #define PCF2127_BIT_CTRL2_TSF2 BIT(5)
33 /* Control register 3 */
34 #define PCF2127_REG_CTRL3 0x02
35 #define PCF2127_BIT_CTRL3_BLIE BIT(0)
36 #define PCF2127_BIT_CTRL3_BIE BIT(1)
37 #define PCF2127_BIT_CTRL3_BLF BIT(2)
38 #define PCF2127_BIT_CTRL3_BF BIT(3)
39 #define PCF2127_BIT_CTRL3_BTSE BIT(4)
40 /* Time and date registers */
41 #define PCF2127_REG_SC 0x03
42 #define PCF2127_BIT_SC_OSF BIT(7)
43 #define PCF2127_REG_MN 0x04
44 #define PCF2127_REG_HR 0x05
45 #define PCF2127_REG_DM 0x06
46 #define PCF2127_REG_DW 0x07
47 #define PCF2127_REG_MO 0x08
48 #define PCF2127_REG_YR 0x09
49 /* Watchdog registers */
50 #define PCF2127_REG_WD_CTL 0x10
51 #define PCF2127_BIT_WD_CTL_TF0 BIT(0)
52 #define PCF2127_BIT_WD_CTL_TF1 BIT(1)
53 #define PCF2127_BIT_WD_CTL_CD0 BIT(6)
54 #define PCF2127_BIT_WD_CTL_CD1 BIT(7)
55 #define PCF2127_REG_WD_VAL 0x11
56 /* Tamper timestamp registers */
57 #define PCF2127_REG_TS_CTRL 0x12
58 #define PCF2127_BIT_TS_CTRL_TSOFF BIT(6)
59 #define PCF2127_BIT_TS_CTRL_TSM BIT(7)
60 #define PCF2127_REG_TS_SC 0x13
61 #define PCF2127_REG_TS_MN 0x14
62 #define PCF2127_REG_TS_HR 0x15
63 #define PCF2127_REG_TS_DM 0x16
64 #define PCF2127_REG_TS_MO 0x17
65 #define PCF2127_REG_TS_YR 0x18
68 * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
69 * battery backed and can survive a power outage.
70 * PCF2129 doesn't have this feature.
72 #define PCF2127_REG_RAM_ADDR_MSB 0x1A
73 #define PCF2127_REG_RAM_WRT_CMD 0x1C
74 #define PCF2127_REG_RAM_RD_CMD 0x1D
76 /* Watchdog timer value constants */
77 #define PCF2127_WD_VAL_STOP 0
78 #define PCF2127_WD_VAL_MIN 2
79 #define PCF2127_WD_VAL_MAX 255
80 #define PCF2127_WD_VAL_DEFAULT 60
83 struct rtc_device
*rtc
;
84 struct watchdog_device wdd
;
85 struct regmap
*regmap
;
89 * In the routines that deal directly with the pcf2127 hardware, we use
90 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
92 static int pcf2127_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
94 struct pcf2127
*pcf2127
= dev_get_drvdata(dev
);
95 unsigned char buf
[10];
99 * Avoid reading CTRL2 register as it causes WD_VAL register
100 * value to reset to 0 which means watchdog is stopped.
102 ret
= regmap_bulk_read(pcf2127
->regmap
, PCF2127_REG_CTRL3
,
103 (buf
+ PCF2127_REG_CTRL3
),
104 ARRAY_SIZE(buf
) - PCF2127_REG_CTRL3
);
106 dev_err(dev
, "%s: read error\n", __func__
);
110 if (buf
[PCF2127_REG_CTRL3
] & PCF2127_BIT_CTRL3_BLF
)
112 "low voltage detected, check/replace RTC battery.\n");
114 /* Clock integrity is not guaranteed when OSF flag is set. */
115 if (buf
[PCF2127_REG_SC
] & PCF2127_BIT_SC_OSF
) {
117 * no need clear the flag here,
118 * it will be cleared once the new date is saved
121 "oscillator stop detected, date/time is not reliable\n");
126 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
127 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
128 __func__
, buf
[PCF2127_REG_CTRL3
], buf
[PCF2127_REG_SC
],
129 buf
[PCF2127_REG_MN
], buf
[PCF2127_REG_HR
],
130 buf
[PCF2127_REG_DM
], buf
[PCF2127_REG_DW
],
131 buf
[PCF2127_REG_MO
], buf
[PCF2127_REG_YR
]);
133 tm
->tm_sec
= bcd2bin(buf
[PCF2127_REG_SC
] & 0x7F);
134 tm
->tm_min
= bcd2bin(buf
[PCF2127_REG_MN
] & 0x7F);
135 tm
->tm_hour
= bcd2bin(buf
[PCF2127_REG_HR
] & 0x3F); /* rtc hr 0-23 */
136 tm
->tm_mday
= bcd2bin(buf
[PCF2127_REG_DM
] & 0x3F);
137 tm
->tm_wday
= buf
[PCF2127_REG_DW
] & 0x07;
138 tm
->tm_mon
= bcd2bin(buf
[PCF2127_REG_MO
] & 0x1F) - 1; /* rtc mn 1-12 */
139 tm
->tm_year
= bcd2bin(buf
[PCF2127_REG_YR
]);
140 if (tm
->tm_year
< 70)
141 tm
->tm_year
+= 100; /* assume we are in 1970...2069 */
143 dev_dbg(dev
, "%s: tm is secs=%d, mins=%d, hours=%d, "
144 "mday=%d, mon=%d, year=%d, wday=%d\n",
146 tm
->tm_sec
, tm
->tm_min
, tm
->tm_hour
,
147 tm
->tm_mday
, tm
->tm_mon
, tm
->tm_year
, tm
->tm_wday
);
152 static int pcf2127_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
154 struct pcf2127
*pcf2127
= dev_get_drvdata(dev
);
155 unsigned char buf
[7];
158 dev_dbg(dev
, "%s: secs=%d, mins=%d, hours=%d, "
159 "mday=%d, mon=%d, year=%d, wday=%d\n",
161 tm
->tm_sec
, tm
->tm_min
, tm
->tm_hour
,
162 tm
->tm_mday
, tm
->tm_mon
, tm
->tm_year
, tm
->tm_wday
);
164 /* hours, minutes and seconds */
165 buf
[i
++] = bin2bcd(tm
->tm_sec
); /* this will also clear OSF flag */
166 buf
[i
++] = bin2bcd(tm
->tm_min
);
167 buf
[i
++] = bin2bcd(tm
->tm_hour
);
168 buf
[i
++] = bin2bcd(tm
->tm_mday
);
169 buf
[i
++] = tm
->tm_wday
& 0x07;
172 buf
[i
++] = bin2bcd(tm
->tm_mon
+ 1);
175 buf
[i
++] = bin2bcd(tm
->tm_year
% 100);
177 /* write register's data */
178 err
= regmap_bulk_write(pcf2127
->regmap
, PCF2127_REG_SC
, buf
, i
);
181 "%s: err=%d", __func__
, err
);
188 #ifdef CONFIG_RTC_INTF_DEV
189 static int pcf2127_rtc_ioctl(struct device
*dev
,
190 unsigned int cmd
, unsigned long arg
)
192 struct pcf2127
*pcf2127
= dev_get_drvdata(dev
);
198 ret
= regmap_read(pcf2127
->regmap
, PCF2127_REG_CTRL3
, &touser
);
202 touser
= touser
& PCF2127_BIT_CTRL3_BLF
? 1 : 0;
204 if (copy_to_user((void __user
*)arg
, &touser
, sizeof(int)))
212 #define pcf2127_rtc_ioctl NULL
215 static const struct rtc_class_ops pcf2127_rtc_ops
= {
216 .ioctl
= pcf2127_rtc_ioctl
,
217 .read_time
= pcf2127_rtc_read_time
,
218 .set_time
= pcf2127_rtc_set_time
,
221 static int pcf2127_nvmem_read(void *priv
, unsigned int offset
,
222 void *val
, size_t bytes
)
224 struct pcf2127
*pcf2127
= priv
;
226 unsigned char offsetbuf
[] = { offset
>> 8, offset
};
228 ret
= regmap_bulk_write(pcf2127
->regmap
, PCF2127_REG_RAM_ADDR_MSB
,
233 ret
= regmap_bulk_read(pcf2127
->regmap
, PCF2127_REG_RAM_RD_CMD
,
239 static int pcf2127_nvmem_write(void *priv
, unsigned int offset
,
240 void *val
, size_t bytes
)
242 struct pcf2127
*pcf2127
= priv
;
244 unsigned char offsetbuf
[] = { offset
>> 8, offset
};
246 ret
= regmap_bulk_write(pcf2127
->regmap
, PCF2127_REG_RAM_ADDR_MSB
,
251 ret
= regmap_bulk_write(pcf2127
->regmap
, PCF2127_REG_RAM_WRT_CMD
,
257 /* watchdog driver */
259 static int pcf2127_wdt_ping(struct watchdog_device
*wdd
)
261 struct pcf2127
*pcf2127
= watchdog_get_drvdata(wdd
);
263 return regmap_write(pcf2127
->regmap
, PCF2127_REG_WD_VAL
, wdd
->timeout
);
267 * Restart watchdog timer if feature is active.
269 * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
270 * since register also contain control/status flags for other features.
271 * Always call this function after reading CTRL2 register.
273 static int pcf2127_wdt_active_ping(struct watchdog_device
*wdd
)
277 if (watchdog_active(wdd
)) {
278 ret
= pcf2127_wdt_ping(wdd
);
281 "%s: watchdog restart failed, ret=%d\n",
288 static int pcf2127_wdt_start(struct watchdog_device
*wdd
)
290 return pcf2127_wdt_ping(wdd
);
293 static int pcf2127_wdt_stop(struct watchdog_device
*wdd
)
295 struct pcf2127
*pcf2127
= watchdog_get_drvdata(wdd
);
297 return regmap_write(pcf2127
->regmap
, PCF2127_REG_WD_VAL
,
298 PCF2127_WD_VAL_STOP
);
301 static int pcf2127_wdt_set_timeout(struct watchdog_device
*wdd
,
302 unsigned int new_timeout
)
304 dev_dbg(wdd
->parent
, "new watchdog timeout: %is (old: %is)\n",
305 new_timeout
, wdd
->timeout
);
307 wdd
->timeout
= new_timeout
;
309 return pcf2127_wdt_active_ping(wdd
);
312 static const struct watchdog_info pcf2127_wdt_info
= {
313 .identity
= "NXP PCF2127/PCF2129 Watchdog",
314 .options
= WDIOF_KEEPALIVEPING
| WDIOF_SETTIMEOUT
,
317 static const struct watchdog_ops pcf2127_watchdog_ops
= {
318 .owner
= THIS_MODULE
,
319 .start
= pcf2127_wdt_start
,
320 .stop
= pcf2127_wdt_stop
,
321 .ping
= pcf2127_wdt_ping
,
322 .set_timeout
= pcf2127_wdt_set_timeout
,
325 /* sysfs interface */
327 static ssize_t
timestamp0_store(struct device
*dev
,
328 struct device_attribute
*attr
,
329 const char *buf
, size_t count
)
331 struct pcf2127
*pcf2127
= dev_get_drvdata(dev
->parent
);
334 ret
= regmap_update_bits(pcf2127
->regmap
, PCF2127_REG_CTRL1
,
335 PCF2127_BIT_CTRL1_TSF1
, 0);
337 dev_err(dev
, "%s: update ctrl1 ret=%d\n", __func__
, ret
);
341 ret
= regmap_update_bits(pcf2127
->regmap
, PCF2127_REG_CTRL2
,
342 PCF2127_BIT_CTRL2_TSF2
, 0);
344 dev_err(dev
, "%s: update ctrl2 ret=%d\n", __func__
, ret
);
348 ret
= pcf2127_wdt_active_ping(&pcf2127
->wdd
);
355 static ssize_t
timestamp0_show(struct device
*dev
,
356 struct device_attribute
*attr
, char *buf
)
358 struct pcf2127
*pcf2127
= dev_get_drvdata(dev
->parent
);
361 unsigned char data
[25];
363 ret
= regmap_bulk_read(pcf2127
->regmap
, PCF2127_REG_CTRL1
, data
,
366 dev_err(dev
, "%s: read error ret=%d\n", __func__
, ret
);
371 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, "
372 "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
373 __func__
, data
[PCF2127_REG_CTRL1
], data
[PCF2127_REG_CTRL2
],
374 data
[PCF2127_REG_CTRL3
], data
[PCF2127_REG_TS_SC
],
375 data
[PCF2127_REG_TS_MN
], data
[PCF2127_REG_TS_HR
],
376 data
[PCF2127_REG_TS_DM
], data
[PCF2127_REG_TS_MO
],
377 data
[PCF2127_REG_TS_YR
]);
379 ret
= pcf2127_wdt_active_ping(&pcf2127
->wdd
);
383 if (!(data
[PCF2127_REG_CTRL1
] & PCF2127_BIT_CTRL1_TSF1
) &&
384 !(data
[PCF2127_REG_CTRL2
] & PCF2127_BIT_CTRL2_TSF2
))
387 tm
.tm_sec
= bcd2bin(data
[PCF2127_REG_TS_SC
] & 0x7F);
388 tm
.tm_min
= bcd2bin(data
[PCF2127_REG_TS_MN
] & 0x7F);
389 tm
.tm_hour
= bcd2bin(data
[PCF2127_REG_TS_HR
] & 0x3F);
390 tm
.tm_mday
= bcd2bin(data
[PCF2127_REG_TS_DM
] & 0x3F);
391 /* TS_MO register (month) value range: 1-12 */
392 tm
.tm_mon
= bcd2bin(data
[PCF2127_REG_TS_MO
] & 0x1F) - 1;
393 tm
.tm_year
= bcd2bin(data
[PCF2127_REG_TS_YR
]);
395 tm
.tm_year
+= 100; /* assume we are in 1970...2069 */
397 ret
= rtc_valid_tm(&tm
);
401 return sprintf(buf
, "%llu\n",
402 (unsigned long long)rtc_tm_to_time64(&tm
));
405 static DEVICE_ATTR_RW(timestamp0
);
407 static struct attribute
*pcf2127_attrs
[] = {
408 &dev_attr_timestamp0
.attr
,
412 static const struct attribute_group pcf2127_attr_group
= {
413 .attrs
= pcf2127_attrs
,
416 static int pcf2127_probe(struct device
*dev
, struct regmap
*regmap
,
417 const char *name
, bool has_nvmem
)
419 struct pcf2127
*pcf2127
;
423 dev_dbg(dev
, "%s\n", __func__
);
425 pcf2127
= devm_kzalloc(dev
, sizeof(*pcf2127
), GFP_KERNEL
);
429 pcf2127
->regmap
= regmap
;
431 dev_set_drvdata(dev
, pcf2127
);
433 pcf2127
->rtc
= devm_rtc_allocate_device(dev
);
434 if (IS_ERR(pcf2127
->rtc
))
435 return PTR_ERR(pcf2127
->rtc
);
437 pcf2127
->rtc
->ops
= &pcf2127_rtc_ops
;
439 pcf2127
->wdd
.parent
= dev
;
440 pcf2127
->wdd
.info
= &pcf2127_wdt_info
;
441 pcf2127
->wdd
.ops
= &pcf2127_watchdog_ops
;
442 pcf2127
->wdd
.min_timeout
= PCF2127_WD_VAL_MIN
;
443 pcf2127
->wdd
.max_timeout
= PCF2127_WD_VAL_MAX
;
444 pcf2127
->wdd
.timeout
= PCF2127_WD_VAL_DEFAULT
;
445 pcf2127
->wdd
.min_hw_heartbeat_ms
= 500;
447 watchdog_set_drvdata(&pcf2127
->wdd
, pcf2127
);
450 struct nvmem_config nvmem_cfg
= {
452 .reg_read
= pcf2127_nvmem_read
,
453 .reg_write
= pcf2127_nvmem_write
,
457 ret
= rtc_nvmem_register(pcf2127
->rtc
, &nvmem_cfg
);
461 * Watchdog timer enabled and reset pin /RST activated when timed out.
462 * Select 1Hz clock source for watchdog timer.
463 * Note: Countdown timer disabled and not available.
465 ret
= regmap_update_bits(pcf2127
->regmap
, PCF2127_REG_WD_CTL
,
466 PCF2127_BIT_WD_CTL_CD1
|
467 PCF2127_BIT_WD_CTL_CD0
|
468 PCF2127_BIT_WD_CTL_TF1
|
469 PCF2127_BIT_WD_CTL_TF0
,
470 PCF2127_BIT_WD_CTL_CD1
|
471 PCF2127_BIT_WD_CTL_CD0
|
472 PCF2127_BIT_WD_CTL_TF1
);
474 dev_err(dev
, "%s: watchdog config (wd_ctl) failed\n", __func__
);
478 /* Test if watchdog timer is started by bootloader */
479 ret
= regmap_read(pcf2127
->regmap
, PCF2127_REG_WD_VAL
, &wdd_timeout
);
484 set_bit(WDOG_HW_RUNNING
, &pcf2127
->wdd
.status
);
486 #ifdef CONFIG_WATCHDOG
487 ret
= devm_watchdog_register_device(dev
, &pcf2127
->wdd
);
490 #endif /* CONFIG_WATCHDOG */
493 * Disable battery low/switch-over timestamp and interrupts.
494 * Clear battery interrupt flags which can block new trigger events.
495 * Note: This is the default chip behaviour but added to ensure
496 * correct tamper timestamp and interrupt function.
498 ret
= regmap_update_bits(pcf2127
->regmap
, PCF2127_REG_CTRL3
,
499 PCF2127_BIT_CTRL3_BTSE
|
500 PCF2127_BIT_CTRL3_BF
|
501 PCF2127_BIT_CTRL3_BIE
|
502 PCF2127_BIT_CTRL3_BLIE
, 0);
504 dev_err(dev
, "%s: interrupt config (ctrl3) failed\n",
510 * Enable timestamp function and store timestamp of first trigger
511 * event until TSF1 and TFS2 interrupt flags are cleared.
513 ret
= regmap_update_bits(pcf2127
->regmap
, PCF2127_REG_TS_CTRL
,
514 PCF2127_BIT_TS_CTRL_TSOFF
|
515 PCF2127_BIT_TS_CTRL_TSM
,
516 PCF2127_BIT_TS_CTRL_TSM
);
518 dev_err(dev
, "%s: tamper detection config (ts_ctrl) failed\n",
524 * Enable interrupt generation when TSF1 or TSF2 timestamp flags
525 * are set. Interrupt signal is an open-drain output and can be
526 * left floating if unused.
528 ret
= regmap_update_bits(pcf2127
->regmap
, PCF2127_REG_CTRL2
,
529 PCF2127_BIT_CTRL2_TSIE
,
530 PCF2127_BIT_CTRL2_TSIE
);
532 dev_err(dev
, "%s: tamper detection config (ctrl2) failed\n",
537 ret
= rtc_add_group(pcf2127
->rtc
, &pcf2127_attr_group
);
539 dev_err(dev
, "%s: tamper sysfs registering failed\n",
544 return rtc_register_device(pcf2127
->rtc
);
548 static const struct of_device_id pcf2127_of_match
[] = {
549 { .compatible
= "nxp,pcf2127" },
550 { .compatible
= "nxp,pcf2129" },
553 MODULE_DEVICE_TABLE(of
, pcf2127_of_match
);
556 #if IS_ENABLED(CONFIG_I2C)
558 static int pcf2127_i2c_write(void *context
, const void *data
, size_t count
)
560 struct device
*dev
= context
;
561 struct i2c_client
*client
= to_i2c_client(dev
);
564 ret
= i2c_master_send(client
, data
, count
);
566 return ret
< 0 ? ret
: -EIO
;
571 static int pcf2127_i2c_gather_write(void *context
,
572 const void *reg
, size_t reg_size
,
573 const void *val
, size_t val_size
)
575 struct device
*dev
= context
;
576 struct i2c_client
*client
= to_i2c_client(dev
);
580 if (WARN_ON(reg_size
!= 1))
583 buf
= kmalloc(val_size
+ 1, GFP_KERNEL
);
588 memcpy(buf
+ 1, val
, val_size
);
590 ret
= i2c_master_send(client
, buf
, val_size
+ 1);
594 if (ret
!= val_size
+ 1)
595 return ret
< 0 ? ret
: -EIO
;
600 static int pcf2127_i2c_read(void *context
, const void *reg
, size_t reg_size
,
601 void *val
, size_t val_size
)
603 struct device
*dev
= context
;
604 struct i2c_client
*client
= to_i2c_client(dev
);
607 if (WARN_ON(reg_size
!= 1))
610 ret
= i2c_master_send(client
, reg
, 1);
612 return ret
< 0 ? ret
: -EIO
;
614 ret
= i2c_master_recv(client
, val
, val_size
);
616 return ret
< 0 ? ret
: -EIO
;
622 * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
623 * is that the STOP condition is required between set register address and
624 * read register data when reading from registers.
626 static const struct regmap_bus pcf2127_i2c_regmap
= {
627 .write
= pcf2127_i2c_write
,
628 .gather_write
= pcf2127_i2c_gather_write
,
629 .read
= pcf2127_i2c_read
,
632 static struct i2c_driver pcf2127_i2c_driver
;
634 static int pcf2127_i2c_probe(struct i2c_client
*client
,
635 const struct i2c_device_id
*id
)
637 struct regmap
*regmap
;
638 static const struct regmap_config config
= {
643 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
))
646 regmap
= devm_regmap_init(&client
->dev
, &pcf2127_i2c_regmap
,
647 &client
->dev
, &config
);
648 if (IS_ERR(regmap
)) {
649 dev_err(&client
->dev
, "%s: regmap allocation failed: %ld\n",
650 __func__
, PTR_ERR(regmap
));
651 return PTR_ERR(regmap
);
654 return pcf2127_probe(&client
->dev
, regmap
,
655 pcf2127_i2c_driver
.driver
.name
, id
->driver_data
);
658 static const struct i2c_device_id pcf2127_i2c_id
[] = {
663 MODULE_DEVICE_TABLE(i2c
, pcf2127_i2c_id
);
665 static struct i2c_driver pcf2127_i2c_driver
= {
667 .name
= "rtc-pcf2127-i2c",
668 .of_match_table
= of_match_ptr(pcf2127_of_match
),
670 .probe
= pcf2127_i2c_probe
,
671 .id_table
= pcf2127_i2c_id
,
674 static int pcf2127_i2c_register_driver(void)
676 return i2c_add_driver(&pcf2127_i2c_driver
);
679 static void pcf2127_i2c_unregister_driver(void)
681 i2c_del_driver(&pcf2127_i2c_driver
);
686 static int pcf2127_i2c_register_driver(void)
691 static void pcf2127_i2c_unregister_driver(void)
697 #if IS_ENABLED(CONFIG_SPI_MASTER)
699 static struct spi_driver pcf2127_spi_driver
;
701 static int pcf2127_spi_probe(struct spi_device
*spi
)
703 static const struct regmap_config config
= {
706 .read_flag_mask
= 0xa0,
707 .write_flag_mask
= 0x20,
709 struct regmap
*regmap
;
711 regmap
= devm_regmap_init_spi(spi
, &config
);
712 if (IS_ERR(regmap
)) {
713 dev_err(&spi
->dev
, "%s: regmap allocation failed: %ld\n",
714 __func__
, PTR_ERR(regmap
));
715 return PTR_ERR(regmap
);
718 return pcf2127_probe(&spi
->dev
, regmap
, pcf2127_spi_driver
.driver
.name
,
719 spi_get_device_id(spi
)->driver_data
);
722 static const struct spi_device_id pcf2127_spi_id
[] = {
727 MODULE_DEVICE_TABLE(spi
, pcf2127_spi_id
);
729 static struct spi_driver pcf2127_spi_driver
= {
731 .name
= "rtc-pcf2127-spi",
732 .of_match_table
= of_match_ptr(pcf2127_of_match
),
734 .probe
= pcf2127_spi_probe
,
735 .id_table
= pcf2127_spi_id
,
738 static int pcf2127_spi_register_driver(void)
740 return spi_register_driver(&pcf2127_spi_driver
);
743 static void pcf2127_spi_unregister_driver(void)
745 spi_unregister_driver(&pcf2127_spi_driver
);
750 static int pcf2127_spi_register_driver(void)
755 static void pcf2127_spi_unregister_driver(void)
761 static int __init
pcf2127_init(void)
765 ret
= pcf2127_i2c_register_driver();
767 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret
);
771 ret
= pcf2127_spi_register_driver();
773 pr_err("Failed to register pcf2127 spi driver: %d\n", ret
);
774 pcf2127_i2c_unregister_driver();
779 module_init(pcf2127_init
)
781 static void __exit
pcf2127_exit(void)
783 pcf2127_spi_unregister_driver();
784 pcf2127_i2c_unregister_driver();
786 module_exit(pcf2127_exit
)
788 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
789 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
790 MODULE_LICENSE("GPL v2");