3 select ARCH_HAS_SYNC_DMA_FOR_CPU
4 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5 select ARCH_USE_BUILTIN_BSWAP
6 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
11 select DMA_NONCOHERENT_OPS
13 select HANDLE_DOMAIN_IRQ
14 select DW_APB_TIMER_OF
15 select GENERIC_LIB_ASHLDI3
16 select GENERIC_LIB_ASHRDI3
17 select GENERIC_LIB_LSHRDI3
18 select GENERIC_LIB_MULDI3
19 select GENERIC_LIB_CMPDI2
20 select GENERIC_LIB_UCMPDI2
21 select GENERIC_ALLOCATOR
22 select GENERIC_ATOMIC64
23 select GENERIC_CLOCKEVENTS
24 select GENERIC_CPU_DEVICES
25 select GENERIC_IRQ_CHIP
26 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
28 select GENERIC_IRQ_MULTI_HANDLER
29 select GENERIC_SCHED_CLOCK
30 select GENERIC_SMP_IDLE_THREAD
31 select HAVE_ARCH_TRACEHOOK
32 select HAVE_GENERIC_DMA_COHERENT
33 select HAVE_KERNEL_GZIP
34 select HAVE_KERNEL_LZO
35 select HAVE_KERNEL_LZMA
36 select HAVE_C_RECORDMCOUNT
37 select HAVE_DMA_API_DEBUG
38 select HAVE_DMA_CONTIGUOUS
39 select MAY_HAVE_SPARSE_IRQ
40 select MODULES_USE_ELF_RELA if MODULES
42 select OF_EARLY_FLATTREE
43 select OF_RESERVED_MEM
44 select PERF_USE_VMALLOC
47 select USB_ARCH_HAS_EHCI
48 select USB_ARCH_HAS_OHCI
50 config CPU_HAS_CACHEV2
65 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
67 config CPU_NEED_TLBSYNC
70 config CPU_NEED_SOFTALIGN
73 config CPU_NO_USER_BKPT
76 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
77 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
78 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
79 instruction exception.
80 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
82 config GENERIC_CALIBRATE_DELAY
88 config GENERIC_HWEIGHT
94 config RWSEM_GENERIC_SPINLOCK
100 config TRACE_IRQFLAGS_SUPPORT
105 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
106 default "1024" if (CPU_CK860)
110 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
111 default "12" if (CPU_CK860)
113 config L1_CACHE_SHIFT
115 default "4" if (CPU_CK610)
116 default "5" if (CPU_CK807 || CPU_CK810)
117 default "6" if (CPU_CK860)
119 menu "Processor type and features"
126 bool "CSKY CPU ck610"
127 select CPU_NEED_TLBSYNC
128 select CPU_NEED_SOFTALIGN
129 select CPU_NO_USER_BKPT
132 bool "CSKY CPU ck810"
134 select CPU_NEED_TLBSYNC
137 bool "CSKY CPU ck807"
141 bool "CSKY CPU ck860"
143 select CPU_HAS_CACHEV2
144 select CPU_HAS_LDSTEX
149 prompt "Power Manager Instruction (wait/doze/stop)"
166 bool "CPU has VDSP coprocessor"
167 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
170 bool "CPU has FPU coprocessor"
171 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
174 bool "CPU has Trusted Execution Environment"
178 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
183 int "Maximum number of CPUs (2-32)"
189 bool "High Memory Support"
190 depends on !CPU_CK610
193 config FORCE_MAX_ZONEORDER
194 int "Maximum zone order"
198 hex "DRAM start addr (the same with memory-section in dts)"
203 source "kernel/Kconfig.hz"