arch/sh/boards/mach-se/7724/setup.c

   1 /*
   2  * linux/arch/sh/boards/se/7724/setup.c
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  *
   6  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/delay.h>
  19 #include <linux/smc91x.h>
  20 #include <linux/gpio.h>
  21 #include <linux/input.h>
  22 #include <linux/input/sh_keysc.h>
  23 #include <linux/usb/r8a66597.h>
  24 #include <video/sh_mobile_lcdc.h>
  25 #include <media/sh_mobile_ceu.h>
  26 #include <sound/sh_fsi.h>
  27 #include <asm/io.h>
  28 #include <asm/heartbeat.h>
  29 #include <asm/sh_eth.h>
  30 #include <asm/clock.h>
  31 #include <asm/suspend.h>
  32 #include <cpu/sh7724.h>
  33 #include <mach-se/mach/se7724.h>
  34
  35 /*
  36  * SWx    1234 5678
  37  * ------------------------------------
  38  * SW31 : 1001 1100    : default
  39  * SW32 : 0111 1111    : use on board flash
  40  *
  41  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  42  *                          1 : Digital monitor
  43  *                      b = 0 : VGA
  44  *                          1 : 720p
  45  */
  46
  47 /*
  48  * about 720p
  49  *
  50  * When you use 1280 x 720 lcdc output,
  51  * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  52  * and change SW41 to use 720p
  53  */
  54
  55 /* Heartbeat */
  56 static struct heartbeat_data heartbeat_data = {
  57         .regsize = 16,
  58 };
  59
  60 static struct resource heartbeat_resources[] = {
  61         [0] = {
  62                 .start  = PA_LED,
  63                 .end    = PA_LED,
  64                 .flags  = IORESOURCE_MEM,
  65         },
  66 };
  67
  68 static struct platform_device heartbeat_device = {
  69         .name           = "heartbeat",
  70         .id             = -1,
  71         .dev = {
  72                 .platform_data = &heartbeat_data,
  73         },
  74         .num_resources  = ARRAY_SIZE(heartbeat_resources),
  75         .resource       = heartbeat_resources,
  76 };
  77
  78 /* LAN91C111 */
  79 static struct smc91x_platdata smc91x_info = {
  80         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  81 };
  82
  83 static struct resource smc91x_eth_resources[] = {
  84         [0] = {
  85                 .name   = "SMC91C111" ,
  86                 .start  = 0x1a300300,
  87                 .end    = 0x1a30030f,
  88                 .flags  = IORESOURCE_MEM,
  89         },
  90         [1] = {
  91                 .start  = IRQ0_SMC,
  92                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  93         },
  94 };
  95
  96 static struct platform_device smc91x_eth_device = {
  97         .name   = "smc91x",
  98         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  99         .resource       = smc91x_eth_resources,
 100         .dev    = {
 101                 .platform_data  = &smc91x_info,
 102         },
 103 };
 104
 105 /* MTD */
 106 static struct mtd_partition nor_flash_partitions[] = {
 107         {
 108                 .name = "uboot",
 109                 .offset = 0,
 110                 .size = (1 * 1024 * 1024),
 111                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 112         }, {
 113                 .name = "kernel",
 114                 .offset = MTDPART_OFS_APPEND,
 115                 .size = (2 * 1024 * 1024),
 116         }, {
 117                 .name = "free-area",
 118                 .offset = MTDPART_OFS_APPEND,
 119                 .size = MTDPART_SIZ_FULL,
 120         },
 121 };
 122
 123 static struct physmap_flash_data nor_flash_data = {
 124         .width          = 2,
 125         .parts          = nor_flash_partitions,
 126         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 127 };
 128
 129 static struct resource nor_flash_resources[] = {
 130         [0] = {
 131                 .name   = "NOR Flash",
 132                 .start  = 0x00000000,
 133                 .end    = 0x01ffffff,
 134                 .flags  = IORESOURCE_MEM,
 135         }
 136 };
 137
 138 static struct platform_device nor_flash_device = {
 139         .name           = "physmap-flash",
 140         .resource       = nor_flash_resources,
 141         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 142         .dev            = {
 143                 .platform_data = &nor_flash_data,
 144         },
 145 };
 146
 147 /* LCDC */
 148 static struct sh_mobile_lcdc_info lcdc_info = {
 149         .clock_source = LCDC_CLK_EXTERNAL,
 150         .ch[0] = {
 151                 .chan = LCDC_CHAN_MAINLCD,
 152                 .bpp = 16,
 153                 .clock_divider = 1,
 154                 .lcd_cfg = {
 155                         .name = "LB070WV1",
 156                         .sync = 0, /* hsync and vsync are active low */
 157                 },
 158                 .lcd_size_cfg = { /* 7.0 inch */
 159                         .width = 152,
 160                         .height = 91,
 161                 },
 162                 .board_cfg = {
 163                 },
 164         }
 165 };
 166
 167 static struct resource lcdc_resources[] = {
 168         [0] = {
 169                 .name   = "LCDC",
 170                 .start  = 0xfe940000,
 171                 .end    = 0xfe942fff,
 172                 .flags  = IORESOURCE_MEM,
 173         },
 174         [1] = {
 175                 .start  = 106,
 176                 .flags  = IORESOURCE_IRQ,
 177         },
 178 };
 179
 180 static struct platform_device lcdc_device = {
 181         .name           = "sh_mobile_lcdc_fb",
 182         .num_resources  = ARRAY_SIZE(lcdc_resources),
 183         .resource       = lcdc_resources,
 184         .dev            = {
 185                 .platform_data  = &lcdc_info,
 186         },
 187         .archdata = {
 188                 .hwblk_id = HWBLK_LCDC,
 189         },
 190 };
 191
 192 /* CEU0 */
 193 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 194         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 195 };
 196
 197 static struct resource ceu0_resources[] = {
 198         [0] = {
 199                 .name   = "CEU0",
 200                 .start  = 0xfe910000,
 201                 .end    = 0xfe91009f,
 202                 .flags  = IORESOURCE_MEM,
 203         },
 204         [1] = {
 205                 .start  = 52,
 206                 .flags  = IORESOURCE_IRQ,
 207         },
 208         [2] = {
 209                 /* place holder for contiguous memory */
 210         },
 211 };
 212
 213 static struct platform_device ceu0_device = {
 214         .name           = "sh_mobile_ceu",
 215         .id             = 0, /* "ceu0" clock */
 216         .num_resources  = ARRAY_SIZE(ceu0_resources),
 217         .resource       = ceu0_resources,
 218         .dev    = {
 219                 .platform_data  = &sh_mobile_ceu0_info,
 220         },
 221         .archdata = {
 222                 .hwblk_id = HWBLK_CEU0,
 223         },
 224 };
 225
 226 /* CEU1 */
 227 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 228         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 229 };
 230
 231 static struct resource ceu1_resources[] = {
 232         [0] = {
 233                 .name   = "CEU1",
 234                 .start  = 0xfe914000,
 235                 .end    = 0xfe91409f,
 236                 .flags  = IORESOURCE_MEM,
 237         },
 238         [1] = {
 239                 .start  = 63,
 240                 .flags  = IORESOURCE_IRQ,
 241         },
 242         [2] = {
 243                 /* place holder for contiguous memory */
 244         },
 245 };
 246
 247 static struct platform_device ceu1_device = {
 248         .name           = "sh_mobile_ceu",
 249         .id             = 1, /* "ceu1" clock */
 250         .num_resources  = ARRAY_SIZE(ceu1_resources),
 251         .resource       = ceu1_resources,
 252         .dev    = {
 253                 .platform_data  = &sh_mobile_ceu1_info,
 254         },
 255         .archdata = {
 256                 .hwblk_id = HWBLK_CEU1,
 257         },
 258 };
 259
 260 /* FSI */
 261 /*
 262  * FSI-A use external clock which came from ak464x.
 263  * So, we should change parent of fsi
 264  */
 265 #define FCLKACR         0xa4150008
 266 static void fsimck_init(struct clk *clk)
 267 {
 268         u32 status = ctrl_inl(clk->enable_reg);
 269
 270         /* use external clock */
 271         status &= ~0x000000ff;
 272         status |= 0x00000080;
 273         ctrl_outl(status, clk->enable_reg);
 274 }
 275
 276 static struct clk_ops fsimck_clk_ops = {
 277         .init = fsimck_init,
 278 };
 279
 280 static struct clk fsimcka_clk = {
 281         .name           = "fsimcka_clk",
 282         .id             = -1,
 283         .ops            = &fsimck_clk_ops,
 284         .enable_reg     = (void __iomem *)FCLKACR,
 285         .rate           = 0, /* unknown */
 286 };
 287
 288 struct sh_fsi_platform_info fsi_info = {
 289         .porta_flags = SH_FSI_BRS_INV |
 290                        SH_FSI_OUT_SLAVE_MODE |
 291                        SH_FSI_IN_SLAVE_MODE |
 292                        SH_FSI_OFMT(PCM) |
 293                        SH_FSI_IFMT(PCM),
 294 };
 295
 296 static struct resource fsi_resources[] = {
 297         [0] = {
 298                 .name   = "FSI",
 299                 .start  = 0xFE3C0000,
 300                 .end    = 0xFE3C021d,
 301                 .flags  = IORESOURCE_MEM,
 302         },
 303         [1] = {
 304                 .start  = 108,
 305                 .flags  = IORESOURCE_IRQ,
 306         },
 307 };
 308
 309 static struct platform_device fsi_device = {
 310         .name           = "sh_fsi",
 311         .id             = 0,
 312         .num_resources  = ARRAY_SIZE(fsi_resources),
 313         .resource       = fsi_resources,
 314         .dev    = {
 315                 .platform_data  = &fsi_info,
 316         },
 317         .archdata = {
 318                 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
 319         },
 320 };
 321
 322 /* KEYSC in SoC (Needs SW33-2 set to ON) */
 323 static struct sh_keysc_info keysc_info = {
 324         .mode = SH_KEYSC_MODE_1,
 325         .scan_timing = 10,
 326         .delay = 50,
 327         .keycodes = {
 328                 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 329                 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 330                 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 331                 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 332                 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 333                 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 334         },
 335 };
 336
 337 static struct resource keysc_resources[] = {
 338         [0] = {
 339                 .name   = "KEYSC",
 340                 .start  = 0x044b0000,
 341                 .end    = 0x044b000f,
 342                 .flags  = IORESOURCE_MEM,
 343         },
 344         [1] = {
 345                 .start  = 79,
 346                 .flags  = IORESOURCE_IRQ,
 347         },
 348 };
 349
 350 static struct platform_device keysc_device = {
 351         .name           = "sh_keysc",
 352         .id             = 0, /* "keysc0" clock */
 353         .num_resources  = ARRAY_SIZE(keysc_resources),
 354         .resource       = keysc_resources,
 355         .dev    = {
 356                 .platform_data  = &keysc_info,
 357         },
 358         .archdata = {
 359                 .hwblk_id = HWBLK_KEYSC,
 360         },
 361 };
 362
 363 /* SH Eth */
 364 static struct resource sh_eth_resources[] = {
 365         [0] = {
 366                 .start = SH_ETH_ADDR,
 367                 .end   = SH_ETH_ADDR + 0x1FC,
 368                 .flags = IORESOURCE_MEM,
 369         },
 370         [1] = {
 371                 .start = 91,
 372                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 373         },
 374 };
 375
 376 struct sh_eth_plat_data sh_eth_plat = {
 377         .phy = 0x1f, /* SMSC LAN8187 */
 378         .edmac_endian = EDMAC_LITTLE_ENDIAN,
 379 };
 380
 381 static struct platform_device sh_eth_device = {
 382         .name = "sh-eth",
 383         .id     = 0,
 384         .dev = {
 385                 .platform_data = &sh_eth_plat,
 386         },
 387         .num_resources = ARRAY_SIZE(sh_eth_resources),
 388         .resource = sh_eth_resources,
 389         .archdata = {
 390                 .hwblk_id = HWBLK_ETHER,
 391         },
 392 };
 393
 394 static struct r8a66597_platdata sh7724_usb0_host_data = {
 395         .on_chip = 1,
 396 };
 397
 398 static struct resource sh7724_usb0_host_resources[] = {
 399         [0] = {
 400                 .start  = 0xa4d80000,
 401                 .end    = 0xa4d80124 - 1,
 402                 .flags  = IORESOURCE_MEM,
 403         },
 404         [1] = {
 405                 .start  = 65,
 406                 .end    = 65,
 407                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 408         },
 409 };
 410
 411 static struct platform_device sh7724_usb0_host_device = {
 412         .name           = "r8a66597_hcd",
 413         .id             = 0,
 414         .dev = {
 415                 .dma_mask               = NULL,         /*  not use dma */
 416                 .coherent_dma_mask      = 0xffffffff,
 417                 .platform_data          = &sh7724_usb0_host_data,
 418         },
 419         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 420         .resource       = sh7724_usb0_host_resources,
 421         .archdata = {
 422                 .hwblk_id = HWBLK_USB0,
 423         },
 424 };
 425
 426 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
 427         .on_chip = 1,
 428 };
 429
 430 static struct resource sh7724_usb1_gadget_resources[] = {
 431         [0] = {
 432                 .start  = 0xa4d90000,
 433                 .end    = 0xa4d90123,
 434                 .flags  = IORESOURCE_MEM,
 435         },
 436         [1] = {
 437                 .start  = 66,
 438                 .end    = 66,
 439                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 440         },
 441 };
 442
 443 static struct platform_device sh7724_usb1_gadget_device = {
 444         .name           = "r8a66597_udc",
 445         .id             = 1, /* USB1 */
 446         .dev = {
 447                 .dma_mask               = NULL,         /*  not use dma */
 448                 .coherent_dma_mask      = 0xffffffff,
 449                 .platform_data          = &sh7724_usb1_gadget_data,
 450         },
 451         .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
 452         .resource       = sh7724_usb1_gadget_resources,
 453 };
 454
 455 static struct resource sdhi0_cn7_resources[] = {
 456         [0] = {
 457                 .name   = "SDHI0",
 458                 .start  = 0x04ce0000,
 459                 .end    = 0x04ce01ff,
 460                 .flags  = IORESOURCE_MEM,
 461         },
 462         [1] = {
 463                 .start  = 101,
 464                 .flags  = IORESOURCE_IRQ,
 465         },
 466 };
 467
 468 static struct platform_device sdhi0_cn7_device = {
 469         .name           = "sh_mobile_sdhi",
 470         .id             = 0,
 471         .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 472         .resource       = sdhi0_cn7_resources,
 473         .archdata = {
 474                 .hwblk_id = HWBLK_SDHI0,
 475         },
 476 };
 477
 478 static struct resource sdhi1_cn8_resources[] = {
 479         [0] = {
 480                 .name   = "SDHI1",
 481                 .start  = 0x04cf0000,
 482                 .end    = 0x04cf01ff,
 483                 .flags  = IORESOURCE_MEM,
 484         },
 485         [1] = {
 486                 .start  = 24,
 487                 .flags  = IORESOURCE_IRQ,
 488         },
 489 };
 490
 491 static struct platform_device sdhi1_cn8_device = {
 492         .name           = "sh_mobile_sdhi",
 493         .id             = 1,
 494         .num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 495         .resource       = sdhi1_cn8_resources,
 496         .archdata = {
 497                 .hwblk_id = HWBLK_SDHI1,
 498         },
 499 };
 500
 501 static struct platform_device *ms7724se_devices[] __initdata = {
 502         &heartbeat_device,
 503         &smc91x_eth_device,
 504         &lcdc_device,
 505         &nor_flash_device,
 506         &ceu0_device,
 507         &ceu1_device,
 508         &keysc_device,
 509         &sh_eth_device,
 510         &sh7724_usb0_host_device,
 511         &sh7724_usb1_gadget_device,
 512         &fsi_device,
 513         &sdhi0_cn7_device,
 514         &sdhi1_cn8_device,
 515 };
 516
 517 /* I2C device */
 518 static struct i2c_board_info i2c0_devices[] = {
 519         {
 520                 I2C_BOARD_INFO("ak4642", 0x12),
 521         },
 522 };
 523
 524 #define EEPROM_OP   0xBA206000
 525 #define EEPROM_ADR  0xBA206004
 526 #define EEPROM_DATA 0xBA20600C
 527 #define EEPROM_STAT 0xBA206010
 528 #define EEPROM_STRT 0xBA206014
 529 static int __init sh_eth_is_eeprom_ready(void)
 530 {
 531         int t = 10000;
 532
 533         while (t--) {
 534                 if (!ctrl_inw(EEPROM_STAT))
 535                         return 1;
 536                 udelay(1);
 537         }
 538
 539         printk(KERN_ERR "ms7724se can not access to eeprom\n");
 540         return 0;
 541 }
 542
 543 static void __init sh_eth_init(void)
 544 {
 545         int i;
 546         u16 mac;
 547
 548         /* check EEPROM status */
 549         if (!sh_eth_is_eeprom_ready())
 550                 return;
 551
 552         /* read MAC addr from EEPROM */
 553         for (i = 0 ; i < 3 ; i++) {
 554                 ctrl_outw(0x0, EEPROM_OP); /* read */
 555                 ctrl_outw(i*2, EEPROM_ADR);
 556                 ctrl_outw(0x1, EEPROM_STRT);
 557                 if (!sh_eth_is_eeprom_ready())
 558                         return;
 559
 560                 mac = ctrl_inw(EEPROM_DATA);
 561                 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
 562                 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
 563         }
 564 }
 565
 566 #define SW4140    0xBA201000
 567 #define FPGA_OUT  0xBA200400
 568 #define PORT_HIZA 0xA4050158
 569 #define PORT_MSELCRB 0xA4050182
 570
 571 #define SW41_A    0x0100
 572 #define SW41_B    0x0200
 573 #define SW41_C    0x0400
 574 #define SW41_D    0x0800
 575 #define SW41_E    0x1000
 576 #define SW41_F    0x2000
 577 #define SW41_G    0x4000
 578 #define SW41_H    0x8000
 579
 580 extern char ms7724se_sdram_enter_start;
 581 extern char ms7724se_sdram_enter_end;
 582 extern char ms7724se_sdram_leave_start;
 583 extern char ms7724se_sdram_leave_end;
 584
 585
 586 static int __init arch_setup(void)
 587 {
 588         /* enable I2C device */
 589         i2c_register_board_info(0, i2c0_devices,
 590                                 ARRAY_SIZE(i2c0_devices));
 591         return 0;
 592 }
 593 arch_initcall(arch_setup);
 594
 595 static int __init devices_setup(void)
 596 {
 597         u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
 598         struct clk *fsia_clk;
 599
 600         /* register board specific self-refresh code */
 601         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
 602                                         &ms7724se_sdram_enter_start,
 603                                         &ms7724se_sdram_enter_end,
 604                                         &ms7724se_sdram_leave_start,
 605                                         &ms7724se_sdram_leave_end);
 606         /* Reset Release */
 607         ctrl_outw(ctrl_inw(FPGA_OUT) &
 608                   ~((1 << 1)  | /* LAN */
 609                     (1 << 6)  | /* VIDEO DAC */
 610                     (1 << 7)  | /* AK4643 */
 611                     (1 << 12) | /* USB0 */
 612                     (1 << 14)), /* RMII */
 613                   FPGA_OUT);
 614
 615         /* turn on USB clocks, use external clock */
 616         ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 617
 618 #ifdef CONFIG_PM
 619         /* Let LED9 show STATUS2 */
 620         gpio_request(GPIO_FN_STATUS2, NULL);
 621
 622         /* Lit LED10 show STATUS0 */
 623         gpio_request(GPIO_FN_STATUS0, NULL);
 624
 625         /* Lit LED11 show PDSTATUS */
 626         gpio_request(GPIO_FN_PDSTATUS, NULL);
 627 #else
 628         /* Lit LED9 */
 629         gpio_request(GPIO_PTJ6, NULL);
 630         gpio_direction_output(GPIO_PTJ6, 1);
 631         gpio_export(GPIO_PTJ6, 0);
 632
 633         /* Lit LED10 */
 634         gpio_request(GPIO_PTJ5, NULL);
 635         gpio_direction_output(GPIO_PTJ5, 1);
 636         gpio_export(GPIO_PTJ5, 0);
 637
 638         /* Lit LED11 */
 639         gpio_request(GPIO_PTJ7, NULL);
 640         gpio_direction_output(GPIO_PTJ7, 1);
 641         gpio_export(GPIO_PTJ7, 0);
 642 #endif
 643
 644         /* enable USB0 port */
 645         ctrl_outw(0x0600, 0xa40501d4);
 646
 647         /* enable USB1 port */
 648         ctrl_outw(0x0600, 0xa4050192);
 649
 650         /* enable IRQ 0,1,2 */
 651         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 652         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 653         gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 654
 655         /* enable SCIFA3 */
 656         gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 657         gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 658         gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 659         gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 660         gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 661
 662         /* enable LCDC */
 663         gpio_request(GPIO_FN_LCDD23,   NULL);
 664         gpio_request(GPIO_FN_LCDD22,   NULL);
 665         gpio_request(GPIO_FN_LCDD21,   NULL);
 666         gpio_request(GPIO_FN_LCDD20,   NULL);
 667         gpio_request(GPIO_FN_LCDD19,   NULL);
 668         gpio_request(GPIO_FN_LCDD18,   NULL);
 669         gpio_request(GPIO_FN_LCDD17,   NULL);
 670         gpio_request(GPIO_FN_LCDD16,   NULL);
 671         gpio_request(GPIO_FN_LCDD15,   NULL);
 672         gpio_request(GPIO_FN_LCDD14,   NULL);
 673         gpio_request(GPIO_FN_LCDD13,   NULL);
 674         gpio_request(GPIO_FN_LCDD12,   NULL);
 675         gpio_request(GPIO_FN_LCDD11,   NULL);
 676         gpio_request(GPIO_FN_LCDD10,   NULL);
 677         gpio_request(GPIO_FN_LCDD9,    NULL);
 678         gpio_request(GPIO_FN_LCDD8,    NULL);
 679         gpio_request(GPIO_FN_LCDD7,    NULL);
 680         gpio_request(GPIO_FN_LCDD6,    NULL);
 681         gpio_request(GPIO_FN_LCDD5,    NULL);
 682         gpio_request(GPIO_FN_LCDD4,    NULL);
 683         gpio_request(GPIO_FN_LCDD3,    NULL);
 684         gpio_request(GPIO_FN_LCDD2,    NULL);
 685         gpio_request(GPIO_FN_LCDD1,    NULL);
 686         gpio_request(GPIO_FN_LCDD0,    NULL);
 687         gpio_request(GPIO_FN_LCDDISP,  NULL);
 688         gpio_request(GPIO_FN_LCDHSYN,  NULL);
 689         gpio_request(GPIO_FN_LCDDCK,   NULL);
 690         gpio_request(GPIO_FN_LCDVSYN,  NULL);
 691         gpio_request(GPIO_FN_LCDDON,   NULL);
 692         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 693         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 694         gpio_request(GPIO_FN_LCDRD,    NULL);
 695         gpio_request(GPIO_FN_LCDLCLK,  NULL);
 696         ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 697
 698         /* enable CEU0 */
 699         gpio_request(GPIO_FN_VIO0_D15, NULL);
 700         gpio_request(GPIO_FN_VIO0_D14, NULL);
 701         gpio_request(GPIO_FN_VIO0_D13, NULL);
 702         gpio_request(GPIO_FN_VIO0_D12, NULL);
 703         gpio_request(GPIO_FN_VIO0_D11, NULL);
 704         gpio_request(GPIO_FN_VIO0_D10, NULL);
 705         gpio_request(GPIO_FN_VIO0_D9,  NULL);
 706         gpio_request(GPIO_FN_VIO0_D8,  NULL);
 707         gpio_request(GPIO_FN_VIO0_D7,  NULL);
 708         gpio_request(GPIO_FN_VIO0_D6,  NULL);
 709         gpio_request(GPIO_FN_VIO0_D5,  NULL);
 710         gpio_request(GPIO_FN_VIO0_D4,  NULL);
 711         gpio_request(GPIO_FN_VIO0_D3,  NULL);
 712         gpio_request(GPIO_FN_VIO0_D2,  NULL);
 713         gpio_request(GPIO_FN_VIO0_D1,  NULL);
 714         gpio_request(GPIO_FN_VIO0_D0,  NULL);
 715         gpio_request(GPIO_FN_VIO0_VD,  NULL);
 716         gpio_request(GPIO_FN_VIO0_CLK, NULL);
 717         gpio_request(GPIO_FN_VIO0_FLD, NULL);
 718         gpio_request(GPIO_FN_VIO0_HD,  NULL);
 719         platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 720
 721         /* enable CEU1 */
 722         gpio_request(GPIO_FN_VIO1_D7,  NULL);
 723         gpio_request(GPIO_FN_VIO1_D6,  NULL);
 724         gpio_request(GPIO_FN_VIO1_D5,  NULL);
 725         gpio_request(GPIO_FN_VIO1_D4,  NULL);
 726         gpio_request(GPIO_FN_VIO1_D3,  NULL);
 727         gpio_request(GPIO_FN_VIO1_D2,  NULL);
 728         gpio_request(GPIO_FN_VIO1_D1,  NULL);
 729         gpio_request(GPIO_FN_VIO1_D0,  NULL);
 730         gpio_request(GPIO_FN_VIO1_FLD, NULL);
 731         gpio_request(GPIO_FN_VIO1_HD,  NULL);
 732         gpio_request(GPIO_FN_VIO1_VD,  NULL);
 733         gpio_request(GPIO_FN_VIO1_CLK, NULL);
 734         platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 735
 736         /* KEYSC */
 737         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 738         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 739         gpio_request(GPIO_FN_KEYIN4,      NULL);
 740         gpio_request(GPIO_FN_KEYIN3,      NULL);
 741         gpio_request(GPIO_FN_KEYIN2,      NULL);
 742         gpio_request(GPIO_FN_KEYIN1,      NULL);
 743         gpio_request(GPIO_FN_KEYIN0,      NULL);
 744         gpio_request(GPIO_FN_KEYOUT3,     NULL);
 745         gpio_request(GPIO_FN_KEYOUT2,     NULL);
 746         gpio_request(GPIO_FN_KEYOUT1,     NULL);
 747         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 748
 749         /* enable FSI */
 750         gpio_request(GPIO_FN_FSIMCKB,    NULL);
 751         gpio_request(GPIO_FN_FSIMCKA,    NULL);
 752         gpio_request(GPIO_FN_FSIOASD,    NULL);
 753         gpio_request(GPIO_FN_FSIIABCK,   NULL);
 754         gpio_request(GPIO_FN_FSIIALRCK,  NULL);
 755         gpio_request(GPIO_FN_FSIOABCK,   NULL);
 756         gpio_request(GPIO_FN_FSIOALRCK,  NULL);
 757         gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
 758         gpio_request(GPIO_FN_FSIIBSD,    NULL);
 759         gpio_request(GPIO_FN_FSIOBSD,    NULL);
 760         gpio_request(GPIO_FN_FSIIBBCK,   NULL);
 761         gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
 762         gpio_request(GPIO_FN_FSIOBBCK,   NULL);
 763         gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
 764         gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
 765         gpio_request(GPIO_FN_FSIIASD,    NULL);
 766
 767         /* change parent of FSI A */
 768         fsia_clk = clk_get(NULL, "fsia_clk");
 769         clk_register(&fsimcka_clk);
 770         clk_set_parent(fsia_clk, &fsimcka_clk);
 771         clk_set_rate(fsia_clk, 11000);
 772         clk_set_rate(&fsimcka_clk, 11000);
 773         clk_put(fsia_clk);
 774
 775         /* SDHI0 connected to cn7 */
 776         gpio_request(GPIO_FN_SDHI0CD, NULL);
 777         gpio_request(GPIO_FN_SDHI0WP, NULL);
 778         gpio_request(GPIO_FN_SDHI0D3, NULL);
 779         gpio_request(GPIO_FN_SDHI0D2, NULL);
 780         gpio_request(GPIO_FN_SDHI0D1, NULL);
 781         gpio_request(GPIO_FN_SDHI0D0, NULL);
 782         gpio_request(GPIO_FN_SDHI0CMD, NULL);
 783         gpio_request(GPIO_FN_SDHI0CLK, NULL);
 784
 785         /* SDHI1 connected to cn8 */
 786         gpio_request(GPIO_FN_SDHI1CD, NULL);
 787         gpio_request(GPIO_FN_SDHI1WP, NULL);
 788         gpio_request(GPIO_FN_SDHI1D3, NULL);
 789         gpio_request(GPIO_FN_SDHI1D2, NULL);
 790         gpio_request(GPIO_FN_SDHI1D1, NULL);
 791         gpio_request(GPIO_FN_SDHI1D0, NULL);
 792         gpio_request(GPIO_FN_SDHI1CMD, NULL);
 793         gpio_request(GPIO_FN_SDHI1CLK, NULL);
 794
 795         /*
 796          * enable SH-Eth
 797          *
 798          * please remove J33 pin from your board !!
 799          *
 800          * ms7724 board should not use GPIO_FN_LNKSTA pin
 801          * So, This time PTX5 is set to input pin
 802          */
 803         gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 804         gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 805         gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 806         gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 807         gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 808         gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 809         gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 810         gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 811         gpio_request(GPIO_FN_MDIO,         NULL);
 812         gpio_request(GPIO_FN_MDC,          NULL);
 813         gpio_request(GPIO_PTX5, NULL);
 814         gpio_direction_input(GPIO_PTX5);
 815         sh_eth_init();
 816
 817         if (sw & SW41_B) {
 818                 /* 720p */
 819                 lcdc_info.ch[0].lcd_cfg.xres         = 1280;
 820                 lcdc_info.ch[0].lcd_cfg.yres         = 720;
 821                 lcdc_info.ch[0].lcd_cfg.left_margin  = 220;
 822                 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
 823                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 40;
 824                 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
 825                 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
 826                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 5;
 827         } else {
 828                 /* VGA */
 829                 lcdc_info.ch[0].lcd_cfg.xres         = 640;
 830                 lcdc_info.ch[0].lcd_cfg.yres         = 480;
 831                 lcdc_info.ch[0].lcd_cfg.left_margin  = 105;
 832                 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
 833                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
 834                 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
 835                 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
 836                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
 837         }
 838
 839         if (sw & SW41_A) {
 840                 /* Digital monitor */
 841                 lcdc_info.ch[0].interface_type = RGB18;
 842                 lcdc_info.ch[0].flags          = 0;
 843         } else {
 844                 /* Analog monitor */
 845                 lcdc_info.ch[0].interface_type = RGB24;
 846                 lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 847         }
 848
 849         return platform_add_devices(ms7724se_devices,
 850                                     ARRAY_SIZE(ms7724se_devices));
 851 }
 852 device_initcall(devices_setup);
 853
 854 static struct sh_machine_vector mv_ms7724se __initmv = {
 855         .mv_name        = "ms7724se",
 856         .mv_init_irq    = init_se7724_IRQ,
 857         .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 858 };