drm/nouveau/gr/nv3x: fix instobj write offsets in gr setup
[linux/fpc-iii.git] / arch / arm / mach-footbridge / isa-timer.c
blobb73f52e196b90e91b75ac6ae8ab628f72381a070
1 /*
2 * linux/arch/arm/mach-footbridge/isa-timer.c
4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell
6 */
7 #include <linux/clockchips.h>
8 #include <linux/i8253.h>
9 #include <linux/init.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/timex.h>
15 #include <asm/irq.h>
16 #include <asm/mach/time.h>
18 #include "common.h"
20 static irqreturn_t pit_timer_interrupt(int irq, void *dev_id)
22 struct clock_event_device *ce = dev_id;
23 ce->event_handler(ce);
24 return IRQ_HANDLED;
27 static struct irqaction pit_timer_irq = {
28 .name = "pit",
29 .handler = pit_timer_interrupt,
30 .flags = IRQF_TIMER | IRQF_IRQPOLL,
31 .dev_id = &i8253_clockevent,
34 void __init isa_timer_init(void)
36 clocksource_i8253_init();
38 setup_irq(i8253_clockevent.irq, &pit_timer_irq);
39 clockevent_i8253_init(false);