drivers/ata/pata_icside.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/init.h>
   4 #include <linux/blkdev.h>
   5 #include <scsi/scsi_host.h>
   6 #include <linux/ata.h>
   7 #include <linux/libata.h>
   8
   9 #include <asm/dma.h>
  10 #include <asm/ecard.h>
  11
  12 #define DRV_NAME        "pata_icside"
  13
  14 #define ICS_IDENT_OFFSET                0x2280
  15
  16 #define ICS_ARCIN_V5_INTRSTAT           0x0000
  17 #define ICS_ARCIN_V5_INTROFFSET         0x0004
  18
  19 #define ICS_ARCIN_V6_INTROFFSET_1       0x2200
  20 #define ICS_ARCIN_V6_INTRSTAT_1         0x2290
  21 #define ICS_ARCIN_V6_INTROFFSET_2       0x3200
  22 #define ICS_ARCIN_V6_INTRSTAT_2         0x3290
  23
  24 struct portinfo {
  25         unsigned int dataoffset;
  26         unsigned int ctrloffset;
  27         unsigned int stepping;
  28 };
  29
  30 static const struct portinfo pata_icside_portinfo_v5 = {
  31         .dataoffset     = 0x2800,
  32         .ctrloffset     = 0x2b80,
  33         .stepping       = 6,
  34 };
  35
  36 static const struct portinfo pata_icside_portinfo_v6_1 = {
  37         .dataoffset     = 0x2000,
  38         .ctrloffset     = 0x2380,
  39         .stepping       = 6,
  40 };
  41
  42 static const struct portinfo pata_icside_portinfo_v6_2 = {
  43         .dataoffset     = 0x3000,
  44         .ctrloffset     = 0x3380,
  45         .stepping       = 6,
  46 };
  47
  48 struct pata_icside_state {
  49         void __iomem *irq_port;
  50         void __iomem *ioc_base;
  51         unsigned int type;
  52         unsigned int dma;
  53         struct {
  54                 u8 port_sel;
  55                 u8 disabled;
  56                 unsigned int speed[ATA_MAX_DEVICES];
  57         } port[2];
  58 };
  59
  60 struct pata_icside_info {
  61         struct pata_icside_state *state;
  62         struct expansion_card   *ec;
  63         void __iomem            *base;
  64         void __iomem            *irqaddr;
  65         unsigned int            irqmask;
  66         const expansioncard_ops_t *irqops;
  67         unsigned int            mwdma_mask;
  68         unsigned int            nr_ports;
  69         const struct portinfo   *port[2];
  70         unsigned long           raw_base;
  71         unsigned long           raw_ioc_base;
  72 };
  73
  74 #define ICS_TYPE_A3IN   0
  75 #define ICS_TYPE_A3USER 1
  76 #define ICS_TYPE_V6     3
  77 #define ICS_TYPE_V5     15
  78 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
  79
  80 /* ---------------- Version 5 PCB Support Functions --------------------- */
  81 /* Prototype: pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
  82  * Purpose  : enable interrupts from card
  83  */
  84 static void pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
  85 {
  86         struct pata_icside_state *state = ec->irq_data;
  87
  88         writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
  89 }
  90
  91 /* Prototype: pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
  92  * Purpose  : disable interrupts from card
  93  */
  94 static void pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
  95 {
  96         struct pata_icside_state *state = ec->irq_data;
  97
  98         readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
  99 }
 100
 101 static const expansioncard_ops_t pata_icside_ops_arcin_v5 = {
 102         .irqenable      = pata_icside_irqenable_arcin_v5,
 103         .irqdisable     = pata_icside_irqdisable_arcin_v5,
 104 };
 105
 106
 107 /* ---------------- Version 6 PCB Support Functions --------------------- */
 108 /* Prototype: pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
 109  * Purpose  : enable interrupts from card
 110  */
 111 static void pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
 112 {
 113         struct pata_icside_state *state = ec->irq_data;
 114         void __iomem *base = state->irq_port;
 115
 116         if (!state->port[0].disabled)
 117                 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
 118         if (!state->port[1].disabled)
 119                 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
 120 }
 121
 122 /* Prototype: pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
 123  * Purpose  : disable interrupts from card
 124  */
 125 static void pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
 126 {
 127         struct pata_icside_state *state = ec->irq_data;
 128
 129         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
 130         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
 131 }
 132
 133 /* Prototype: pata_icside_irqprobe(struct expansion_card *ec)
 134  * Purpose  : detect an active interrupt from card
 135  */
 136 static int pata_icside_irqpending_arcin_v6(struct expansion_card *ec)
 137 {
 138         struct pata_icside_state *state = ec->irq_data;
 139
 140         return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
 141                readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
 142 }
 143
 144 static const expansioncard_ops_t pata_icside_ops_arcin_v6 = {
 145         .irqenable      = pata_icside_irqenable_arcin_v6,
 146         .irqdisable     = pata_icside_irqdisable_arcin_v6,
 147         .irqpending     = pata_icside_irqpending_arcin_v6,
 148 };
 149
 150
 151 /*
 152  * SG-DMA support.
 153  *
 154  * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
 155  * There is only one DMA controller per card, which means that only
 156  * one drive can be accessed at one time.  NOTE! We do not enforce that
 157  * here, but we rely on the main IDE driver spotting that both
 158  * interfaces use the same IRQ, which should guarantee this.
 159  */
 160
 161 /*
 162  * Configure the IOMD to give the appropriate timings for the transfer
 163  * mode being requested.  We take the advice of the ATA standards, and
 164  * calculate the cycle time based on the transfer mode, and the EIDE
 165  * MW DMA specs that the drive provides in the IDENTIFY command.
 166  *
 167  * We have the following IOMD DMA modes to choose from:
 168  *
 169  *      Type    Active          Recovery        Cycle
 170  *      A       250 (250)       312 (550)       562 (800)
 171  *      B       187 (200)       250 (550)       437 (750)
 172  *      C       125 (125)       125 (375)       250 (500)
 173  *      D       62  (50)        125 (375)       187 (425)
 174  *
 175  * (figures in brackets are actual measured timings on DIOR/DIOW)
 176  *
 177  * However, we also need to take care of the read/write active and
 178  * recovery timings:
 179  *
 180  *                      Read    Write
 181  *      Mode    Active  -- Recovery --  Cycle   IOMD type
 182  *      MW0     215     50      215     480     A
 183  *      MW1     80      50      50      150     C
 184  *      MW2     70      25      25      120     C
 185  */
 186 static void pata_icside_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 187 {
 188         struct pata_icside_state *state = ap->host->private_data;
 189         struct ata_timing t;
 190         unsigned int cycle;
 191         char iomd_type;
 192
 193         /*
 194          * DMA is based on a 16MHz clock
 195          */
 196         if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1))
 197                 return;
 198
 199         /*
 200          * Choose the IOMD cycle timing which ensure that the interface
 201          * satisfies the measured active, recovery and cycle times.
 202          */
 203         if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425)
 204                 iomd_type = 'D', cycle = 187;
 205         else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500)
 206                 iomd_type = 'C', cycle = 250;
 207         else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750)
 208                 iomd_type = 'B', cycle = 437;
 209         else
 210                 iomd_type = 'A', cycle = 562;
 211
 212         ata_dev_printk(adev, KERN_INFO, "timings: act %dns rec %dns cyc %dns (%c)\n",
 213                 t.active, t.recover, t.cycle, iomd_type);
 214
 215         state->port[ap->port_no].speed[adev->devno] = cycle;
 216 }
 217
 218 static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
 219 {
 220         struct ata_port *ap = qc->ap;
 221         struct pata_icside_state *state = ap->host->private_data;
 222         unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
 223
 224         /*
 225          * We are simplex; BUG if we try to fiddle with DMA
 226          * while it's active.
 227          */
 228         BUG_ON(dma_channel_active(state->dma));
 229
 230         /*
 231          * Route the DMA signals to the correct interface
 232          */
 233         writeb(state->port[ap->port_no].port_sel, state->ioc_base);
 234
 235         set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
 236         set_dma_sg(state->dma, qc->sg, qc->n_elem);
 237         set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
 238
 239         /* issue r/w command */
 240         ap->ops->sff_exec_command(ap, &qc->tf);
 241 }
 242
 243 static void pata_icside_bmdma_start(struct ata_queued_cmd *qc)
 244 {
 245         struct ata_port *ap = qc->ap;
 246         struct pata_icside_state *state = ap->host->private_data;
 247
 248         BUG_ON(dma_channel_active(state->dma));
 249         enable_dma(state->dma);
 250 }
 251
 252 static void pata_icside_bmdma_stop(struct ata_queued_cmd *qc)
 253 {
 254         struct ata_port *ap = qc->ap;
 255         struct pata_icside_state *state = ap->host->private_data;
 256
 257         disable_dma(state->dma);
 258
 259         /* see ata_bmdma_stop */
 260         ata_sff_dma_pause(ap);
 261 }
 262
 263 static u8 pata_icside_bmdma_status(struct ata_port *ap)
 264 {
 265         struct pata_icside_state *state = ap->host->private_data;
 266         void __iomem *irq_port;
 267
 268         irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 :
 269                                                     ICS_ARCIN_V6_INTRSTAT_1);
 270
 271         return readb(irq_port) & 1 ? ATA_DMA_INTR : 0;
 272 }
 273
 274 static int icside_dma_init(struct pata_icside_info *info)
 275 {
 276         struct pata_icside_state *state = info->state;
 277         struct expansion_card *ec = info->ec;
 278         int i;
 279
 280         for (i = 0; i < ATA_MAX_DEVICES; i++) {
 281                 state->port[0].speed[i] = 480;
 282                 state->port[1].speed[i] = 480;
 283         }
 284
 285         if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
 286                 state->dma = ec->dma;
 287                 info->mwdma_mask = ATA_MWDMA2;
 288         }
 289
 290         return 0;
 291 }
 292
 293
 294 static struct scsi_host_template pata_icside_sht = {
 295         ATA_BASE_SHT(DRV_NAME),
 296         .sg_tablesize           = SCSI_MAX_SG_CHAIN_SEGMENTS,
 297         .dma_boundary           = IOMD_DMA_BOUNDARY,
 298 };
 299
 300 static void pata_icside_postreset(struct ata_link *link, unsigned int *classes)
 301 {
 302         struct ata_port *ap = link->ap;
 303         struct pata_icside_state *state = ap->host->private_data;
 304
 305         if (classes[0] != ATA_DEV_NONE || classes[1] != ATA_DEV_NONE)
 306                 return ata_sff_postreset(link, classes);
 307
 308         state->port[ap->port_no].disabled = 1;
 309
 310         if (state->type == ICS_TYPE_V6) {
 311                 /*
 312                  * Disable interrupts from this port, otherwise we
 313                  * receive spurious interrupts from the floating
 314                  * interrupt line.
 315                  */
 316                 void __iomem *irq_port = state->irq_port +
 317                                 (ap->port_no ? ICS_ARCIN_V6_INTROFFSET_2 : ICS_ARCIN_V6_INTROFFSET_1);
 318                 readb(irq_port);
 319         }
 320 }
 321
 322 static struct ata_port_operations pata_icside_port_ops = {
 323         .inherits               = &ata_sff_port_ops,
 324         /* no need to build any PRD tables for DMA */
 325         .qc_prep                = ata_noop_qc_prep,
 326         .sff_data_xfer          = ata_sff_data_xfer_noirq,
 327         .bmdma_setup            = pata_icside_bmdma_setup,
 328         .bmdma_start            = pata_icside_bmdma_start,
 329         .bmdma_stop             = pata_icside_bmdma_stop,
 330         .bmdma_status           = pata_icside_bmdma_status,
 331
 332         .cable_detect           = ata_cable_40wire,
 333         .set_dmamode            = pata_icside_set_dmamode,
 334         .postreset              = pata_icside_postreset,
 335         .post_internal_cmd      = pata_icside_bmdma_stop,
 336 };
 337
 338 static void __devinit
 339 pata_icside_setup_ioaddr(struct ata_port *ap, void __iomem *base,
 340                          struct pata_icside_info *info,
 341                          const struct portinfo *port)
 342 {
 343         struct ata_ioports *ioaddr = &ap->ioaddr;
 344         void __iomem *cmd = base + port->dataoffset;
 345
 346         ioaddr->cmd_addr        = cmd;
 347         ioaddr->data_addr       = cmd + (ATA_REG_DATA    << port->stepping);
 348         ioaddr->error_addr      = cmd + (ATA_REG_ERR     << port->stepping);
 349         ioaddr->feature_addr    = cmd + (ATA_REG_FEATURE << port->stepping);
 350         ioaddr->nsect_addr      = cmd + (ATA_REG_NSECT   << port->stepping);
 351         ioaddr->lbal_addr       = cmd + (ATA_REG_LBAL    << port->stepping);
 352         ioaddr->lbam_addr       = cmd + (ATA_REG_LBAM    << port->stepping);
 353         ioaddr->lbah_addr       = cmd + (ATA_REG_LBAH    << port->stepping);
 354         ioaddr->device_addr     = cmd + (ATA_REG_DEVICE  << port->stepping);
 355         ioaddr->status_addr     = cmd + (ATA_REG_STATUS  << port->stepping);
 356         ioaddr->command_addr    = cmd + (ATA_REG_CMD     << port->stepping);
 357
 358         ioaddr->ctl_addr        = base + port->ctrloffset;
 359         ioaddr->altstatus_addr  = ioaddr->ctl_addr;
 360
 361         ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
 362                       info->raw_base + port->dataoffset,
 363                       info->raw_base + port->ctrloffset);
 364
 365         if (info->raw_ioc_base)
 366                 ata_port_desc(ap, "iocbase 0x%lx", info->raw_ioc_base);
 367 }
 368
 369 static int __devinit pata_icside_register_v5(struct pata_icside_info *info)
 370 {
 371         struct pata_icside_state *state = info->state;
 372         void __iomem *base;
 373
 374         base = ecardm_iomap(info->ec, ECARD_RES_MEMC, 0, 0);
 375         if (!base)
 376                 return -ENOMEM;
 377
 378         state->irq_port = base;
 379
 380         info->base = base;
 381         info->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
 382         info->irqmask = 1;
 383         info->irqops = &pata_icside_ops_arcin_v5;
 384         info->nr_ports = 1;
 385         info->port[0] = &pata_icside_portinfo_v5;
 386
 387         info->raw_base = ecard_resource_start(info->ec, ECARD_RES_MEMC);
 388
 389         return 0;
 390 }
 391
 392 static int __devinit pata_icside_register_v6(struct pata_icside_info *info)
 393 {
 394         struct pata_icside_state *state = info->state;
 395         struct expansion_card *ec = info->ec;
 396         void __iomem *ioc_base, *easi_base;
 397         unsigned int sel = 0;
 398
 399         ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
 400         if (!ioc_base)
 401                 return -ENOMEM;
 402
 403         easi_base = ioc_base;
 404
 405         if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
 406                 easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
 407                 if (!easi_base)
 408                         return -ENOMEM;
 409
 410                 /*
 411                  * Enable access to the EASI region.
 412                  */
 413                 sel = 1 << 5;
 414         }
 415
 416         writeb(sel, ioc_base);
 417
 418         state->irq_port = easi_base;
 419         state->ioc_base = ioc_base;
 420         state->port[0].port_sel = sel;
 421         state->port[1].port_sel = sel | 1;
 422
 423         info->base = easi_base;
 424         info->irqops = &pata_icside_ops_arcin_v6;
 425         info->nr_ports = 2;
 426         info->port[0] = &pata_icside_portinfo_v6_1;
 427         info->port[1] = &pata_icside_portinfo_v6_2;
 428
 429         info->raw_base = ecard_resource_start(ec, ECARD_RES_EASI);
 430         info->raw_ioc_base = ecard_resource_start(ec, ECARD_RES_IOCFAST);
 431
 432         return icside_dma_init(info);
 433 }
 434
 435 static int __devinit pata_icside_add_ports(struct pata_icside_info *info)
 436 {
 437         struct expansion_card *ec = info->ec;
 438         struct ata_host *host;
 439         int i;
 440
 441         if (info->irqaddr) {
 442                 ec->irqaddr = info->irqaddr;
 443                 ec->irqmask = info->irqmask;
 444         }
 445         if (info->irqops)
 446                 ecard_setirq(ec, info->irqops, info->state);
 447
 448         /*
 449          * Be on the safe side - disable interrupts
 450          */
 451         ec->ops->irqdisable(ec, ec->irq);
 452
 453         host = ata_host_alloc(&ec->dev, info->nr_ports);
 454         if (!host)
 455                 return -ENOMEM;
 456
 457         host->private_data = info->state;
 458         host->flags = ATA_HOST_SIMPLEX;
 459
 460         for (i = 0; i < info->nr_ports; i++) {
 461                 struct ata_port *ap = host->ports[i];
 462
 463                 ap->pio_mask = ATA_PIO4;
 464                 ap->mwdma_mask = info->mwdma_mask;
 465                 ap->flags |= ATA_FLAG_SLAVE_POSS;
 466                 ap->ops = &pata_icside_port_ops;
 467
 468                 pata_icside_setup_ioaddr(ap, info->base, info, info->port[i]);
 469         }
 470
 471         return ata_host_activate(host, ec->irq, ata_sff_interrupt, 0,
 472                                  &pata_icside_sht);
 473 }
 474
 475 static int __devinit
 476 pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
 477 {
 478         struct pata_icside_state *state;
 479         struct pata_icside_info info;
 480         void __iomem *idmem;
 481         int ret;
 482
 483         ret = ecard_request_resources(ec);
 484         if (ret)
 485                 goto out;
 486
 487         state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL);
 488         if (!state) {
 489                 ret = -ENOMEM;
 490                 goto release;
 491         }
 492
 493         state->type = ICS_TYPE_NOTYPE;
 494         state->dma = NO_DMA;
 495
 496         idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
 497         if (idmem) {
 498                 unsigned int type;
 499
 500                 type = readb(idmem + ICS_IDENT_OFFSET) & 1;
 501                 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
 502                 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
 503                 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
 504                 ecardm_iounmap(ec, idmem);
 505
 506                 state->type = type;
 507         }
 508
 509         memset(&info, 0, sizeof(info));
 510         info.state = state;
 511         info.ec = ec;
 512
 513         switch (state->type) {
 514         case ICS_TYPE_A3IN:
 515                 dev_warn(&ec->dev, "A3IN unsupported\n");
 516                 ret = -ENODEV;
 517                 break;
 518
 519         case ICS_TYPE_A3USER:
 520                 dev_warn(&ec->dev, "A3USER unsupported\n");
 521                 ret = -ENODEV;
 522                 break;
 523
 524         case ICS_TYPE_V5:
 525                 ret = pata_icside_register_v5(&info);
 526                 break;
 527
 528         case ICS_TYPE_V6:
 529                 ret = pata_icside_register_v6(&info);
 530                 break;
 531
 532         default:
 533                 dev_warn(&ec->dev, "unknown interface type\n");
 534                 ret = -ENODEV;
 535                 break;
 536         }
 537
 538         if (ret == 0)
 539                 ret = pata_icside_add_ports(&info);
 540
 541         if (ret == 0)
 542                 goto out;
 543
 544  release:
 545         ecard_release_resources(ec);
 546  out:
 547         return ret;
 548 }
 549
 550 static void pata_icside_shutdown(struct expansion_card *ec)
 551 {
 552         struct ata_host *host = ecard_get_drvdata(ec);
 553         unsigned long flags;
 554
 555         /*
 556          * Disable interrupts from this card.  We need to do
 557          * this before disabling EASI since we may be accessing
 558          * this register via that region.
 559          */
 560         local_irq_save(flags);
 561         ec->ops->irqdisable(ec, ec->irq);
 562         local_irq_restore(flags);
 563
 564         /*
 565          * Reset the ROM pointer so that we can read the ROM
 566          * after a soft reboot.  This also disables access to
 567          * the IDE taskfile via the EASI region.
 568          */
 569         if (host) {
 570                 struct pata_icside_state *state = host->private_data;
 571                 if (state->ioc_base)
 572                         writeb(0, state->ioc_base);
 573         }
 574 }
 575
 576 static void __devexit pata_icside_remove(struct expansion_card *ec)
 577 {
 578         struct ata_host *host = ecard_get_drvdata(ec);
 579         struct pata_icside_state *state = host->private_data;
 580
 581         ata_host_detach(host);
 582
 583         pata_icside_shutdown(ec);
 584
 585         /*
 586          * don't NULL out the drvdata - devres/libata wants it
 587          * to free the ata_host structure.
 588          */
 589         if (state->dma != NO_DMA)
 590                 free_dma(state->dma);
 591
 592         ecard_release_resources(ec);
 593 }
 594
 595 static const struct ecard_id pata_icside_ids[] = {
 596         { MANU_ICS,  PROD_ICS_IDE  },
 597         { MANU_ICS2, PROD_ICS2_IDE },
 598         { 0xffff, 0xffff }
 599 };
 600
 601 static struct ecard_driver pata_icside_driver = {
 602         .probe          = pata_icside_probe,
 603         .remove         = __devexit_p(pata_icside_remove),
 604         .shutdown       = pata_icside_shutdown,
 605         .id_table       = pata_icside_ids,
 606         .drv = {
 607                 .name   = DRV_NAME,
 608         },
 609 };
 610
 611 static int __init pata_icside_init(void)
 612 {
 613         return ecard_register_driver(&pata_icside_driver);
 614 }
 615
 616 static void __exit pata_icside_exit(void)
 617 {
 618         ecard_remove_driver(&pata_icside_driver);
 619 }
 620
 621 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
 622 MODULE_LICENSE("GPL");
 623 MODULE_DESCRIPTION("ICS PATA driver");
 624
 625 module_init(pata_icside_init);
 626 module_exit(pata_icside_exit);