2 * Copyright (C) 2007 ARM Limited
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 #ifndef __ASM_ARCH_BOARD_EB_H
20 #define __ASM_ARCH_BOARD_EB_H
25 * RealView EB + ARM11MPCore peripheral addresses
27 #define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */
28 #define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */
29 #define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */
30 #define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */
31 #define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
32 #define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */
33 #define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
34 #define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
35 #define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */
36 #define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */
37 #define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */
38 #define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
39 #define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
40 #define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */
42 #define REALVIEW_EB_FLASH_BASE 0x40000000
43 #define REALVIEW_EB_FLASH_SIZE SZ_64M
44 #define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */
45 #define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
47 #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
48 #define REALVIEW_EB11MP_PRIV_MEM_BASE 0x10100000
49 #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
50 #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
52 #define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
53 #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
54 #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
57 #define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K
58 #define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x))
60 #define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */
61 #define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */
62 #define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600)
63 #define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */
66 * Core tile identification (REALVIEW_SYS_PROCID)
68 #define REALVIEW_EB_PROC_MASK 0xFF000000
69 #define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
70 #define REALVIEW_EB_PROC_ARM9 0x02000000
71 #define REALVIEW_EB_PROC_ARM11 0x04000000
72 #define REALVIEW_EB_PROC_ARM11MP 0x06000000
73 #define REALVIEW_EB_PROC_A9MP 0x0C000000
75 #define check_eb_proc(proc_type) \
76 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
79 #ifdef CONFIG_REALVIEW_EB_ARM11MP
80 #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
82 #define core_tile_eb11mp() 0
85 #ifdef CONFIG_REALVIEW_EB_A9MP
86 #define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
88 #define core_tile_a9mp() 0
91 #define machine_is_realview_eb_mp() \
92 (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
94 #endif /* __ASM_ARCH_BOARD_EB_H */