IB/srp: Add multichannel support
[linux/fpc-iii.git] / drivers / tty / serial / uartlite.c
blob189f52e3111ff71feef99741f1ad52e680c42f4b
1 /*
2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
4 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5 * Copyright (C) 2007 Secret Lab Technologies Ltd.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <linux/platform_device.h>
13 #include <linux/module.h>
14 #include <linux/console.h>
15 #include <linux/serial.h>
16 #include <linux/serial_core.h>
17 #include <linux/tty.h>
18 #include <linux/tty_flip.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/of_device.h>
26 #include <linux/of_platform.h>
28 #define ULITE_NAME "ttyUL"
29 #define ULITE_MAJOR 204
30 #define ULITE_MINOR 187
31 #define ULITE_NR_UARTS 4
33 /* ---------------------------------------------------------------------
34 * Register definitions
36 * For register details see datasheet:
37 * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
40 #define ULITE_RX 0x00
41 #define ULITE_TX 0x04
42 #define ULITE_STATUS 0x08
43 #define ULITE_CONTROL 0x0c
45 #define ULITE_REGION 16
47 #define ULITE_STATUS_RXVALID 0x01
48 #define ULITE_STATUS_RXFULL 0x02
49 #define ULITE_STATUS_TXEMPTY 0x04
50 #define ULITE_STATUS_TXFULL 0x08
51 #define ULITE_STATUS_IE 0x10
52 #define ULITE_STATUS_OVERRUN 0x20
53 #define ULITE_STATUS_FRAME 0x40
54 #define ULITE_STATUS_PARITY 0x80
56 #define ULITE_CONTROL_RST_TX 0x01
57 #define ULITE_CONTROL_RST_RX 0x02
58 #define ULITE_CONTROL_IE 0x10
60 struct uartlite_reg_ops {
61 u32 (*in)(void __iomem *addr);
62 void (*out)(u32 val, void __iomem *addr);
65 static u32 uartlite_inbe32(void __iomem *addr)
67 return ioread32be(addr);
70 static void uartlite_outbe32(u32 val, void __iomem *addr)
72 iowrite32be(val, addr);
75 static struct uartlite_reg_ops uartlite_be = {
76 .in = uartlite_inbe32,
77 .out = uartlite_outbe32,
80 static u32 uartlite_inle32(void __iomem *addr)
82 return ioread32(addr);
85 static void uartlite_outle32(u32 val, void __iomem *addr)
87 iowrite32(val, addr);
90 static struct uartlite_reg_ops uartlite_le = {
91 .in = uartlite_inle32,
92 .out = uartlite_outle32,
95 static inline u32 uart_in32(u32 offset, struct uart_port *port)
97 struct uartlite_reg_ops *reg_ops = port->private_data;
99 return reg_ops->in(port->membase + offset);
102 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
104 struct uartlite_reg_ops *reg_ops = port->private_data;
106 reg_ops->out(val, port->membase + offset);
109 static struct uart_port ulite_ports[ULITE_NR_UARTS];
111 /* ---------------------------------------------------------------------
112 * Core UART driver operations
115 static int ulite_receive(struct uart_port *port, int stat)
117 struct tty_port *tport = &port->state->port;
118 unsigned char ch = 0;
119 char flag = TTY_NORMAL;
121 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
122 | ULITE_STATUS_FRAME)) == 0)
123 return 0;
125 /* stats */
126 if (stat & ULITE_STATUS_RXVALID) {
127 port->icount.rx++;
128 ch = uart_in32(ULITE_RX, port);
130 if (stat & ULITE_STATUS_PARITY)
131 port->icount.parity++;
134 if (stat & ULITE_STATUS_OVERRUN)
135 port->icount.overrun++;
137 if (stat & ULITE_STATUS_FRAME)
138 port->icount.frame++;
141 /* drop byte with parity error if IGNPAR specificed */
142 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
143 stat &= ~ULITE_STATUS_RXVALID;
145 stat &= port->read_status_mask;
147 if (stat & ULITE_STATUS_PARITY)
148 flag = TTY_PARITY;
151 stat &= ~port->ignore_status_mask;
153 if (stat & ULITE_STATUS_RXVALID)
154 tty_insert_flip_char(tport, ch, flag);
156 if (stat & ULITE_STATUS_FRAME)
157 tty_insert_flip_char(tport, 0, TTY_FRAME);
159 if (stat & ULITE_STATUS_OVERRUN)
160 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
162 return 1;
165 static int ulite_transmit(struct uart_port *port, int stat)
167 struct circ_buf *xmit = &port->state->xmit;
169 if (stat & ULITE_STATUS_TXFULL)
170 return 0;
172 if (port->x_char) {
173 uart_out32(port->x_char, ULITE_TX, port);
174 port->x_char = 0;
175 port->icount.tx++;
176 return 1;
179 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
180 return 0;
182 uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
183 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
184 port->icount.tx++;
186 /* wake up */
187 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
188 uart_write_wakeup(port);
190 return 1;
193 static irqreturn_t ulite_isr(int irq, void *dev_id)
195 struct uart_port *port = dev_id;
196 int busy, n = 0;
198 do {
199 int stat = uart_in32(ULITE_STATUS, port);
200 busy = ulite_receive(port, stat);
201 busy |= ulite_transmit(port, stat);
202 n++;
203 } while (busy);
205 /* work done? */
206 if (n > 1) {
207 tty_flip_buffer_push(&port->state->port);
208 return IRQ_HANDLED;
209 } else {
210 return IRQ_NONE;
214 static unsigned int ulite_tx_empty(struct uart_port *port)
216 unsigned long flags;
217 unsigned int ret;
219 spin_lock_irqsave(&port->lock, flags);
220 ret = uart_in32(ULITE_STATUS, port);
221 spin_unlock_irqrestore(&port->lock, flags);
223 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
226 static unsigned int ulite_get_mctrl(struct uart_port *port)
228 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
231 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
233 /* N/A */
236 static void ulite_stop_tx(struct uart_port *port)
238 /* N/A */
241 static void ulite_start_tx(struct uart_port *port)
243 ulite_transmit(port, uart_in32(ULITE_STATUS, port));
246 static void ulite_stop_rx(struct uart_port *port)
248 /* don't forward any more data (like !CREAD) */
249 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
250 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
253 static void ulite_break_ctl(struct uart_port *port, int ctl)
255 /* N/A */
258 static int ulite_startup(struct uart_port *port)
260 int ret;
262 ret = request_irq(port->irq, ulite_isr, IRQF_SHARED, "uartlite", port);
263 if (ret)
264 return ret;
266 uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
267 ULITE_CONTROL, port);
268 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
270 return 0;
273 static void ulite_shutdown(struct uart_port *port)
275 uart_out32(0, ULITE_CONTROL, port);
276 uart_in32(ULITE_CONTROL, port); /* dummy */
277 free_irq(port->irq, port);
280 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
281 struct ktermios *old)
283 unsigned long flags;
284 unsigned int baud;
286 spin_lock_irqsave(&port->lock, flags);
288 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
289 | ULITE_STATUS_TXFULL;
291 if (termios->c_iflag & INPCK)
292 port->read_status_mask |=
293 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
295 port->ignore_status_mask = 0;
296 if (termios->c_iflag & IGNPAR)
297 port->ignore_status_mask |= ULITE_STATUS_PARITY
298 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
300 /* ignore all characters if CREAD is not set */
301 if ((termios->c_cflag & CREAD) == 0)
302 port->ignore_status_mask |=
303 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
304 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
306 /* update timeout */
307 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
308 uart_update_timeout(port, termios->c_cflag, baud);
310 spin_unlock_irqrestore(&port->lock, flags);
313 static const char *ulite_type(struct uart_port *port)
315 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
318 static void ulite_release_port(struct uart_port *port)
320 release_mem_region(port->mapbase, ULITE_REGION);
321 iounmap(port->membase);
322 port->membase = NULL;
325 static int ulite_request_port(struct uart_port *port)
327 int ret;
329 pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
330 port, (unsigned long long) port->mapbase);
332 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
333 dev_err(port->dev, "Memory region busy\n");
334 return -EBUSY;
337 port->membase = ioremap(port->mapbase, ULITE_REGION);
338 if (!port->membase) {
339 dev_err(port->dev, "Unable to map registers\n");
340 release_mem_region(port->mapbase, ULITE_REGION);
341 return -EBUSY;
344 port->private_data = &uartlite_be;
345 ret = uart_in32(ULITE_CONTROL, port);
346 uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
347 ret = uart_in32(ULITE_STATUS, port);
348 /* Endianess detection */
349 if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
350 port->private_data = &uartlite_le;
352 return 0;
355 static void ulite_config_port(struct uart_port *port, int flags)
357 if (!ulite_request_port(port))
358 port->type = PORT_UARTLITE;
361 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
363 /* we don't want the core code to modify any port params */
364 return -EINVAL;
367 #ifdef CONFIG_CONSOLE_POLL
368 static int ulite_get_poll_char(struct uart_port *port)
370 if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
371 return NO_POLL_CHAR;
373 return uart_in32(ULITE_RX, port);
376 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
378 while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
379 cpu_relax();
381 /* write char to device */
382 uart_out32(ch, ULITE_TX, port);
384 #endif
386 static struct uart_ops ulite_ops = {
387 .tx_empty = ulite_tx_empty,
388 .set_mctrl = ulite_set_mctrl,
389 .get_mctrl = ulite_get_mctrl,
390 .stop_tx = ulite_stop_tx,
391 .start_tx = ulite_start_tx,
392 .stop_rx = ulite_stop_rx,
393 .break_ctl = ulite_break_ctl,
394 .startup = ulite_startup,
395 .shutdown = ulite_shutdown,
396 .set_termios = ulite_set_termios,
397 .type = ulite_type,
398 .release_port = ulite_release_port,
399 .request_port = ulite_request_port,
400 .config_port = ulite_config_port,
401 .verify_port = ulite_verify_port,
402 #ifdef CONFIG_CONSOLE_POLL
403 .poll_get_char = ulite_get_poll_char,
404 .poll_put_char = ulite_put_poll_char,
405 #endif
408 /* ---------------------------------------------------------------------
409 * Console driver operations
412 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
413 static void ulite_console_wait_tx(struct uart_port *port)
415 u8 val;
416 unsigned long timeout;
419 * Spin waiting for TX fifo to have space available.
420 * When using the Microblaze Debug Module this can take up to 1s
422 timeout = jiffies + msecs_to_jiffies(1000);
423 while (1) {
424 val = uart_in32(ULITE_STATUS, port);
425 if ((val & ULITE_STATUS_TXFULL) == 0)
426 break;
427 if (time_after(jiffies, timeout)) {
428 dev_warn(port->dev,
429 "timeout waiting for TX buffer empty\n");
430 break;
432 cpu_relax();
436 static void ulite_console_putchar(struct uart_port *port, int ch)
438 ulite_console_wait_tx(port);
439 uart_out32(ch, ULITE_TX, port);
442 static void ulite_console_write(struct console *co, const char *s,
443 unsigned int count)
445 struct uart_port *port = &ulite_ports[co->index];
446 unsigned long flags;
447 unsigned int ier;
448 int locked = 1;
450 if (oops_in_progress) {
451 locked = spin_trylock_irqsave(&port->lock, flags);
452 } else
453 spin_lock_irqsave(&port->lock, flags);
455 /* save and disable interrupt */
456 ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
457 uart_out32(0, ULITE_CONTROL, port);
459 uart_console_write(port, s, count, ulite_console_putchar);
461 ulite_console_wait_tx(port);
463 /* restore interrupt state */
464 if (ier)
465 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
467 if (locked)
468 spin_unlock_irqrestore(&port->lock, flags);
471 static int ulite_console_setup(struct console *co, char *options)
473 struct uart_port *port;
474 int baud = 9600;
475 int bits = 8;
476 int parity = 'n';
477 int flow = 'n';
479 if (co->index < 0 || co->index >= ULITE_NR_UARTS)
480 return -EINVAL;
482 port = &ulite_ports[co->index];
484 /* Has the device been initialized yet? */
485 if (!port->mapbase) {
486 pr_debug("console on ttyUL%i not present\n", co->index);
487 return -ENODEV;
490 /* not initialized yet? */
491 if (!port->membase) {
492 if (ulite_request_port(port))
493 return -ENODEV;
496 if (options)
497 uart_parse_options(options, &baud, &parity, &bits, &flow);
499 return uart_set_options(port, co, baud, parity, bits, flow);
502 static struct uart_driver ulite_uart_driver;
504 static struct console ulite_console = {
505 .name = ULITE_NAME,
506 .write = ulite_console_write,
507 .device = uart_console_device,
508 .setup = ulite_console_setup,
509 .flags = CON_PRINTBUFFER,
510 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
511 .data = &ulite_uart_driver,
514 static int __init ulite_console_init(void)
516 register_console(&ulite_console);
517 return 0;
520 console_initcall(ulite_console_init);
522 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
524 static struct uart_driver ulite_uart_driver = {
525 .owner = THIS_MODULE,
526 .driver_name = "uartlite",
527 .dev_name = ULITE_NAME,
528 .major = ULITE_MAJOR,
529 .minor = ULITE_MINOR,
530 .nr = ULITE_NR_UARTS,
531 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
532 .cons = &ulite_console,
533 #endif
536 /* ---------------------------------------------------------------------
537 * Port assignment functions (mapping devices to uart_port structures)
540 /** ulite_assign: register a uartlite device with the driver
542 * @dev: pointer to device structure
543 * @id: requested id number. Pass -1 for automatic port assignment
544 * @base: base address of uartlite registers
545 * @irq: irq number for uartlite
547 * Returns: 0 on success, <0 otherwise
549 static int ulite_assign(struct device *dev, int id, u32 base, int irq)
551 struct uart_port *port;
552 int rc;
554 /* if id = -1; then scan for a free id and use that */
555 if (id < 0) {
556 for (id = 0; id < ULITE_NR_UARTS; id++)
557 if (ulite_ports[id].mapbase == 0)
558 break;
560 if (id < 0 || id >= ULITE_NR_UARTS) {
561 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
562 return -EINVAL;
565 if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
566 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
567 ULITE_NAME, id);
568 return -EBUSY;
571 port = &ulite_ports[id];
573 spin_lock_init(&port->lock);
574 port->fifosize = 16;
575 port->regshift = 2;
576 port->iotype = UPIO_MEM;
577 port->iobase = 1; /* mark port in use */
578 port->mapbase = base;
579 port->membase = NULL;
580 port->ops = &ulite_ops;
581 port->irq = irq;
582 port->flags = UPF_BOOT_AUTOCONF;
583 port->dev = dev;
584 port->type = PORT_UNKNOWN;
585 port->line = id;
587 dev_set_drvdata(dev, port);
589 /* Register the port */
590 rc = uart_add_one_port(&ulite_uart_driver, port);
591 if (rc) {
592 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
593 port->mapbase = 0;
594 dev_set_drvdata(dev, NULL);
595 return rc;
598 return 0;
601 /** ulite_release: register a uartlite device with the driver
603 * @dev: pointer to device structure
605 static int ulite_release(struct device *dev)
607 struct uart_port *port = dev_get_drvdata(dev);
608 int rc = 0;
610 if (port) {
611 rc = uart_remove_one_port(&ulite_uart_driver, port);
612 dev_set_drvdata(dev, NULL);
613 port->mapbase = 0;
616 return rc;
619 /* ---------------------------------------------------------------------
620 * Platform bus binding
623 #if defined(CONFIG_OF)
624 /* Match table for of_platform binding */
625 static struct of_device_id ulite_of_match[] = {
626 { .compatible = "xlnx,opb-uartlite-1.00.b", },
627 { .compatible = "xlnx,xps-uartlite-1.00.a", },
630 MODULE_DEVICE_TABLE(of, ulite_of_match);
631 #endif /* CONFIG_OF */
633 static int ulite_probe(struct platform_device *pdev)
635 struct resource *res, *res2;
636 int id = pdev->id;
637 #ifdef CONFIG_OF
638 const __be32 *prop;
640 prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
641 if (prop)
642 id = be32_to_cpup(prop);
643 #endif
645 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
646 if (!res)
647 return -ENODEV;
649 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
650 if (!res2)
651 return -ENODEV;
653 return ulite_assign(&pdev->dev, id, res->start, res2->start);
656 static int ulite_remove(struct platform_device *pdev)
658 return ulite_release(&pdev->dev);
661 /* work with hotplug and coldplug */
662 MODULE_ALIAS("platform:uartlite");
664 static struct platform_driver ulite_platform_driver = {
665 .probe = ulite_probe,
666 .remove = ulite_remove,
667 .driver = {
668 .name = "uartlite",
669 .of_match_table = of_match_ptr(ulite_of_match),
673 /* ---------------------------------------------------------------------
674 * Module setup/teardown
677 static int __init ulite_init(void)
679 int ret;
681 pr_debug("uartlite: calling uart_register_driver()\n");
682 ret = uart_register_driver(&ulite_uart_driver);
683 if (ret)
684 goto err_uart;
686 pr_debug("uartlite: calling platform_driver_register()\n");
687 ret = platform_driver_register(&ulite_platform_driver);
688 if (ret)
689 goto err_plat;
691 return 0;
693 err_plat:
694 uart_unregister_driver(&ulite_uart_driver);
695 err_uart:
696 pr_err("registering uartlite driver failed: err=%i", ret);
697 return ret;
700 static void __exit ulite_exit(void)
702 platform_driver_unregister(&ulite_platform_driver);
703 uart_unregister_driver(&ulite_uart_driver);
706 module_init(ulite_init);
707 module_exit(ulite_exit);
709 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
710 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
711 MODULE_LICENSE("GPL");