1 // SPDX-License-Identifier: GPL-2.0
3 * Device driver for the via ADB on (many) Mac II-class machines
5 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
6 * Also derived from code Copyright (C) 1996 Paul Mackerras.
8 * With various updates provided over the years by Michael Schmitz,
9 * Guideo Koerber and others.
11 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
15 * - Big overhaul, should actually work now.
16 * 2006-12-31 Finn Thain - Another overhaul.
19 * Inside Macintosh, ch. 5 ADB Manager
20 * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
21 * Rockwell R6522 VIA datasheet
23 * Apple's "ADB Analyzer" bus sniffer is invaluable:
24 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
28 #include <linux/types.h>
29 #include <linux/errno.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/adb.h>
33 #include <linux/interrupt.h>
34 #include <linux/init.h>
35 #include <asm/macintosh.h>
36 #include <asm/macints.h>
37 #include <asm/mac_via.h>
39 static volatile unsigned char *via
;
41 /* VIA registers - spaced 0x200 bytes apart */
42 #define RS 0x200 /* skip between registers */
43 #define B 0 /* B-side data */
44 #define A RS /* A-side data */
45 #define DIRB (2*RS) /* B-side direction (1=output) */
46 #define DIRA (3*RS) /* A-side direction (1=output) */
47 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
48 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
49 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
50 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
51 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
52 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
53 #define SR (10*RS) /* Shift register */
54 #define ACR (11*RS) /* Auxiliary control register */
55 #define PCR (12*RS) /* Peripheral control register */
56 #define IFR (13*RS) /* Interrupt flag register */
57 #define IER (14*RS) /* Interrupt enable register */
58 #define ANH (15*RS) /* A-side data, no handshake */
60 /* Bits in B data register: all active low */
61 #define CTLR_IRQ 0x08 /* Controller rcv status (input) */
62 #define ST_MASK 0x30 /* mask for selecting ADB state bits */
65 #define SR_CTRL 0x1c /* Shift register control bits */
66 #define SR_EXT 0x0c /* Shift on external clock */
67 #define SR_OUT 0x10 /* Shift out if 1 */
69 /* Bits in IFR and IER */
70 #define IER_SET 0x80 /* set bits in IER */
71 #define IER_CLR 0 /* clear bits in IER */
72 #define SR_INT 0x04 /* Shift register full/empty */
74 /* ADB transaction states according to GMHW */
75 #define ST_CMD 0x00 /* ADB state: command byte */
76 #define ST_EVEN 0x10 /* ADB state: even data byte */
77 #define ST_ODD 0x20 /* ADB state: odd data byte */
78 #define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
80 static int macii_init_via(void);
81 static void macii_start(void);
82 static irqreturn_t
macii_interrupt(int irq
, void *arg
);
83 static void macii_queue_poll(void);
85 static int macii_probe(void);
86 static int macii_init(void);
87 static int macii_send_request(struct adb_request
*req
, int sync
);
88 static int macii_write(struct adb_request
*req
);
89 static int macii_autopoll(int devs
);
90 static void macii_poll(void);
91 static int macii_reset_bus(void);
93 struct adb_driver via_macii_driver
= {
103 static enum macii_state
{
110 static struct adb_request
*current_req
; /* first request struct in the queue */
111 static struct adb_request
*last_req
; /* last request struct in the queue */
112 static unsigned char reply_buf
[16]; /* storage for autopolled replies */
113 static unsigned char *reply_ptr
; /* next byte in reply_buf or req->reply */
114 static int reading_reply
; /* store reply in reply_buf else req->reply */
115 static int data_index
; /* index of the next byte to send from req->data */
116 static int reply_len
; /* number of bytes received in reply_buf or req->reply */
117 static int status
; /* VIA's ADB status bits captured upon interrupt */
118 static int last_status
; /* status bits as at previous interrupt */
119 static int srq_asserted
; /* have to poll for the device that asserted it */
120 static int command_byte
; /* the most recent command byte transmitted */
121 static int autopoll_devs
; /* bits set are device addresses to be polled */
123 /* Sanity check for request queue. Doesn't check for cycles. */
124 static int request_is_queued(struct adb_request
*req
) {
125 struct adb_request
*cur
;
127 local_irq_save(flags
);
131 local_irq_restore(flags
);
136 local_irq_restore(flags
);
140 /* Check for MacII style ADB */
141 static int macii_probe(void)
143 if (macintosh_config
->adb_type
!= MAC_ADB_II
) return -ENODEV
;
147 printk("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
151 /* Initialize the driver */
157 local_irq_save(flags
);
159 err
= macii_init_via();
162 err
= request_irq(IRQ_MAC_ADB
, macii_interrupt
, 0, "ADB",
168 local_irq_restore(flags
);
172 /* initialize the hardware */
173 static int macii_init_via(void)
177 /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
178 via
[DIRB
] = (via
[DIRB
] | ST_EVEN
| ST_ODD
) & ~CTLR_IRQ
;
180 /* Set up state: idle */
182 last_status
= via
[B
] & (ST_MASK
|CTLR_IRQ
);
184 /* Shift register on input */
185 via
[ACR
] = (via
[ACR
] & ~SR_CTRL
) | SR_EXT
;
187 /* Wipe any pending data and int */
193 /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
194 static void macii_queue_poll(void)
196 /* No point polling the active device as it will never assert SRQ, so
197 * poll the next device in the autopoll list. This could leave us
198 * stuck in a polling loop if an unprobed device is asserting SRQ.
199 * In theory, that could only happen if a device was plugged in after
200 * probing started. Unplugging it again will break the cycle.
201 * (Simply polling the next higher device often ends up polling almost
202 * every device (after wrapping around), which takes too long.)
206 static struct adb_request req
;
208 if (!autopoll_devs
) return;
210 device_mask
= (1 << (((command_byte
& 0xF0) >> 4) + 1)) - 1;
211 if (autopoll_devs
& ~device_mask
)
212 next_device
= ffs(autopoll_devs
& ~device_mask
) - 1;
214 next_device
= ffs(autopoll_devs
) - 1;
216 BUG_ON(request_is_queued(&req
));
218 adb_request(&req
, NULL
, ADBREQ_NOSEND
, 1,
219 ADB_READREG(next_device
, 0));
224 req
.next
= current_req
;
226 if (current_req
!= NULL
) {
234 /* Send an ADB request; if sync, poll out the reply 'till it's done */
235 static int macii_send_request(struct adb_request
*req
, int sync
)
240 BUG_ON(request_is_queued(req
));
242 local_irq_save(flags
);
243 err
= macii_write(req
);
244 local_irq_restore(flags
);
247 while (!req
->complete
) {
250 BUG_ON(request_is_queued(req
));
256 /* Send an ADB request (append to request queue) */
257 static int macii_write(struct adb_request
*req
)
259 if (req
->nbytes
< 2 || req
->data
[0] != ADB_PACKET
|| req
->nbytes
> 15) {
269 if (current_req
!= NULL
) {
270 last_req
->next
= req
;
275 if (macii_state
== idle
) macii_start();
280 /* Start auto-polling */
281 static int macii_autopoll(int devs
)
283 static struct adb_request req
;
287 /* bit 1 == device 1, and so on. */
288 autopoll_devs
= devs
& 0xFFFE;
290 if (!autopoll_devs
) return 0;
292 local_irq_save(flags
);
294 if (current_req
== NULL
) {
295 /* Send a Talk Reg 0. The controller will repeatedly transmit
296 * this as long as it is idle.
298 adb_request(&req
, NULL
, ADBREQ_NOSEND
, 1,
299 ADB_READREG(ffs(autopoll_devs
) - 1, 0));
300 err
= macii_write(&req
);
303 local_irq_restore(flags
);
307 static inline int need_autopoll(void) {
308 /* Was the last command Talk Reg 0
309 * and is the target on the autopoll list?
311 if ((command_byte
& 0x0F) == 0x0C &&
312 ((1 << ((command_byte
& 0xF0) >> 4)) & autopoll_devs
))
317 /* Prod the chip without interrupts */
318 static void macii_poll(void)
320 disable_irq(IRQ_MAC_ADB
);
321 macii_interrupt(0, NULL
);
322 enable_irq(IRQ_MAC_ADB
);
326 static int macii_reset_bus(void)
328 static struct adb_request req
;
330 if (request_is_queued(&req
))
333 /* Command = 0, Address = ignored */
334 adb_request(&req
, NULL
, 0, 1, ADB_BUSRESET
);
336 /* Don't want any more requests during the Global Reset low time. */
342 /* Start sending ADB packet */
343 static void macii_start(void)
345 struct adb_request
*req
;
351 BUG_ON(macii_state
!= idle
);
353 /* Now send it. Be careful though, that first byte of the request
354 * is actually ADB_PACKET; the real data begins at index 1!
355 * And req->nbytes is the number of bytes of real data plus one.
358 /* store command byte */
359 command_byte
= req
->data
[1];
363 via
[SR
] = req
->data
[1];
364 /* set ADB state to 'command' */
365 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_CMD
;
367 macii_state
= sending
;
372 * The notorious ADB interrupt handler - does all of the protocol handling.
373 * Relies on the ADB controller sending and receiving data, thereby
374 * generating shift register interrupts (SR_INT) for us. This means there has
375 * to be activity on the ADB bus. The chip will poll to achieve this.
377 * The basic ADB state machine was left unchanged from the original MacII code
378 * by Alan Cox, which was based on the CUDA driver for PowerMac.
379 * The syntax of the ADB status lines is totally different on MacII,
380 * though. MacII uses the states Command -> Even -> Odd -> Even ->...-> Idle
381 * for sending and Idle -> Even -> Odd -> Even ->...-> Idle for receiving.
382 * Start and end of a receive packet are signalled by asserting /IRQ on the
383 * interrupt line (/IRQ means the CTLR_IRQ bit in port B; not to be confused
384 * with the VIA shift register interrupt. /IRQ never actually interrupts the
385 * processor, it's just an ordinary input.)
387 static irqreturn_t
macii_interrupt(int irq
, void *arg
)
391 struct adb_request
*req
;
394 /* Clear the SR IRQ flag when polling. */
395 if (via
[IFR
] & SR_INT
)
403 last_status
= status
;
404 status
= via
[B
] & (ST_MASK
|CTLR_IRQ
);
406 switch (macii_state
) {
409 reply_ptr
= current_req
->reply
;
411 BUG_ON(current_req
!= NULL
);
412 reply_ptr
= reply_buf
;
417 if ((status
& CTLR_IRQ
) && (x
== 0xFF)) {
418 /* Bus timeout without SRQ sequence:
419 * data is "FF" while CTLR_IRQ is "H"
423 macii_state
= read_done
;
425 macii_state
= reading
;
430 /* set ADB state = even for first data byte */
431 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_EVEN
;
436 if (data_index
>= req
->nbytes
) {
440 if (req
->reply_expected
) {
444 current_req
= req
->next
;
445 if (req
->done
) (*req
->done
)(req
);
451 macii_autopoll(autopoll_devs
);
454 if (macii_state
== idle
) {
455 /* reset to shift in */
458 /* set ADB state idle - might get SRQ */
459 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_IDLE
;
462 via
[SR
] = req
->data
[data_index
++];
464 if ( (via
[B
] & ST_MASK
) == ST_CMD
) {
465 /* just sent the command byte, set to EVEN */
466 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_EVEN
;
468 /* invert state bits, toggle ODD/EVEN */
476 BUG_ON((status
& ST_MASK
) == ST_CMD
||
477 (status
& ST_MASK
) == ST_IDLE
);
479 /* Bus timeout with SRQ sequence:
480 * data is "XX FF" while CTLR_IRQ is "L L"
481 * End of packet without SRQ sequence:
482 * data is "XX...YY 00" while CTLR_IRQ is "L...H L"
483 * End of packet SRQ sequence:
484 * data is "XX...YY 00" while CTLR_IRQ is "L...L L"
485 * (where XX is the first response byte and
486 * YY is the last byte of valid response data.)
490 if (!(status
& CTLR_IRQ
)) {
492 if (!(last_status
& CTLR_IRQ
)) {
493 macii_state
= read_done
;
497 } else if (x
== 0x00) {
498 macii_state
= read_done
;
499 if (!(last_status
& CTLR_IRQ
))
504 if (macii_state
== reading
) {
505 BUG_ON(reply_len
> 15);
511 /* invert state bits, toggle ODD/EVEN */
521 req
->reply_len
= reply_len
;
523 current_req
= req
->next
;
524 if (req
->done
) (*req
->done
)(req
);
525 } else if (reply_len
&& autopoll_devs
)
526 adb_input(reply_buf
, reply_len
, 0);
530 /* SRQ seen before, initiate poll now */
538 macii_autopoll(autopoll_devs
);
540 if (macii_state
== idle
)
541 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_IDLE
;