2 * arch/arm/mach-ep93xx/ts72xx.c
3 * Technologic Systems TS72xx SBC support.
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
19 #include <linux/mtd/rawnand.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/flash.h>
23 #include <linux/spi/mmc_spi.h>
24 #include <linux/mmc/host.h>
25 #include <linux/platform_data/spi-ep93xx.h>
27 #include <mach/gpio-ep93xx.h>
28 #include <mach/hardware.h>
29 #include <mach/irqs.h>
30 #include <mach/gpio-ep93xx.h>
32 #include <asm/mach-types.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/arch.h>
39 /*************************************************************************
41 *************************************************************************/
42 static struct map_desc ts72xx_io_desc
[] __initdata
= {
44 .virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE
,
45 .pfn
= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE
),
46 .length
= TS72XX_MODEL_SIZE
,
49 .virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE
,
50 .pfn
= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE
),
51 .length
= TS72XX_OPTIONS_SIZE
,
54 .virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE
,
55 .pfn
= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE
),
56 .length
= TS72XX_OPTIONS2_SIZE
,
59 .virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE
,
60 .pfn
= __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE
),
61 .length
= TS72XX_CPLDVER_SIZE
,
66 static void __init
ts72xx_map_io(void)
69 iotable_init(ts72xx_io_desc
, ARRAY_SIZE(ts72xx_io_desc
));
73 /*************************************************************************
75 *************************************************************************/
76 #define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
77 #define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
79 static void ts72xx_nand_hwcontrol(struct mtd_info
*mtd
,
80 int cmd
, unsigned int ctrl
)
82 struct nand_chip
*chip
= mtd_to_nand(mtd
);
84 if (ctrl
& NAND_CTRL_CHANGE
) {
85 void __iomem
*addr
= chip
->IO_ADDR_R
;
88 addr
+= (1 << TS72XX_NAND_CONTROL_ADDR_LINE
);
90 bits
= __raw_readb(addr
) & ~0x07;
91 bits
|= (ctrl
& NAND_NCE
) << 2; /* bit 0 -> bit 2 */
92 bits
|= (ctrl
& NAND_CLE
); /* bit 1 -> bit 1 */
93 bits
|= (ctrl
& NAND_ALE
) >> 2; /* bit 2 -> bit 0 */
95 __raw_writeb(bits
, addr
);
98 if (cmd
!= NAND_CMD_NONE
)
99 __raw_writeb(cmd
, chip
->IO_ADDR_W
);
102 static int ts72xx_nand_device_ready(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd_to_nand(mtd
);
105 void __iomem
*addr
= chip
->IO_ADDR_R
;
107 addr
+= (1 << TS72XX_NAND_BUSY_ADDR_LINE
);
109 return !!(__raw_readb(addr
) & 0x20);
112 #define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
113 #define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
115 static struct mtd_partition ts72xx_nand_parts
[] = {
117 .name
= "TS-BOOTROM",
119 .size
= TS72XX_BOOTROM_PART_SIZE
,
120 .mask_flags
= MTD_WRITEABLE
, /* force read-only */
123 .offset
= MTDPART_OFS_RETAIN
,
124 .size
= TS72XX_REDBOOT_PART_SIZE
,
125 /* leave so much for last partition */
128 .offset
= MTDPART_OFS_APPEND
,
129 .size
= MTDPART_SIZ_FULL
,
130 .mask_flags
= MTD_WRITEABLE
, /* force read-only */
134 static struct platform_nand_data ts72xx_nand_data
= {
141 .cmd_ctrl
= ts72xx_nand_hwcontrol
,
142 .dev_ready
= ts72xx_nand_device_ready
,
146 static struct resource ts72xx_nand_resource
[] = {
148 .start
= 0, /* filled in later */
149 .end
= 0, /* filled in later */
150 .flags
= IORESOURCE_MEM
,
154 static struct platform_device ts72xx_nand_flash
= {
157 .dev
.platform_data
= &ts72xx_nand_data
,
158 .resource
= ts72xx_nand_resource
,
159 .num_resources
= ARRAY_SIZE(ts72xx_nand_resource
),
162 void __init
ts72xx_register_flash(struct mtd_partition
*parts
, int n
,
163 resource_size_t start
)
166 * TS7200 has NOR flash all other TS72xx board have NAND flash.
168 if (board_is_ts7200()) {
169 ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE
, SZ_16M
);
171 ts72xx_nand_resource
[0].start
= start
;
172 ts72xx_nand_resource
[0].end
= start
+ SZ_16M
- 1;
174 ts72xx_nand_data
.chip
.partitions
= parts
;
175 ts72xx_nand_data
.chip
.nr_partitions
= n
;
177 platform_device_register(&ts72xx_nand_flash
);
181 /*************************************************************************
183 *************************************************************************/
184 #define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
185 #define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
187 static struct resource ts72xx_rtc_resources
[] = {
188 DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE
, 0x01),
189 DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE
, 0x01),
192 static struct platform_device ts72xx_rtc_device
= {
193 .name
= "rtc-m48t86",
195 .resource
= ts72xx_rtc_resources
,
196 .num_resources
= ARRAY_SIZE(ts72xx_rtc_resources
),
199 /*************************************************************************
201 *************************************************************************/
202 #define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
203 #define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
205 static struct resource ts72xx_wdt_resources
[] = {
206 DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE
, 0x01),
207 DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE
, 0x01),
210 static struct platform_device ts72xx_wdt_device
= {
211 .name
= "ts72xx-wdt",
213 .resource
= ts72xx_wdt_resources
,
214 .num_resources
= ARRAY_SIZE(ts72xx_wdt_resources
),
217 /*************************************************************************
219 *************************************************************************/
220 static struct ep93xx_eth_data __initdata ts72xx_eth_data
= {
224 /*************************************************************************
226 *************************************************************************/
227 #define BK3_EN_SDCARD_PHYS_BASE 0x12400000
228 #define BK3_EN_SDCARD_PWR 0x0
229 #define BK3_DIS_SDCARD_PWR 0x0C
230 static void bk3_mmc_spi_setpower(struct device
*dev
, unsigned int vdd
)
232 void __iomem
*pwr_sd
= ioremap(BK3_EN_SDCARD_PHYS_BASE
, SZ_4K
);
235 pr_err("Failed to enable SD card power!");
239 pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__
,
240 !!vdd
? "ON" : "OFF", vdd
);
243 __raw_writeb(BK3_EN_SDCARD_PWR
, pwr_sd
);
245 __raw_writeb(BK3_DIS_SDCARD_PWR
, pwr_sd
);
250 static struct mmc_spi_platform_data bk3_spi_mmc_data
= {
252 .powerup_msecs
= 100,
253 .ocr_mask
= MMC_VDD_32_33
| MMC_VDD_33_34
,
254 .caps
= MMC_CAP_NONREMOVABLE
,
255 .setpower
= bk3_mmc_spi_setpower
,
258 /*************************************************************************
259 * SPI Bus - SD card access
260 *************************************************************************/
261 static struct spi_board_info bk3_spi_board_info
[] __initdata
= {
263 .modalias
= "mmc_spi",
264 .platform_data
= &bk3_spi_mmc_data
,
265 .max_speed_hz
= 7.4E6
,
273 * This is a stub -> the FGPIO[3] pin is not connected on the schematic
274 * The all work is performed automatically by !SPI_FRAME (SFRM1) and
277 static int bk3_spi_chipselects
[] __initdata
= {
278 EP93XX_GPIO_LINE_F(3),
281 static struct ep93xx_spi_info bk3_spi_master __initdata
= {
282 .chipselect
= bk3_spi_chipselects
,
283 .num_chipselect
= ARRAY_SIZE(bk3_spi_chipselects
),
287 /*************************************************************************
288 * TS72XX support code
289 *************************************************************************/
290 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
292 /* Relative to EP93XX_CS1_PHYS_BASE */
293 #define TS73XX_FPGA_LOADER_BASE 0x03c00000
295 static struct resource ts73xx_fpga_resources
[] = {
297 .start
= EP93XX_CS1_PHYS_BASE
+ TS73XX_FPGA_LOADER_BASE
,
298 .end
= EP93XX_CS1_PHYS_BASE
+ TS73XX_FPGA_LOADER_BASE
+ 1,
299 .flags
= IORESOURCE_MEM
,
303 static struct platform_device ts73xx_fpga_device
= {
304 .name
= "ts73xx-fpga-mgr",
306 .resource
= ts73xx_fpga_resources
,
307 .num_resources
= ARRAY_SIZE(ts73xx_fpga_resources
),
312 /*************************************************************************
314 *************************************************************************/
315 static struct spi_board_info ts72xx_spi_devices
[] __initdata
= {
317 .modalias
= "tmp122",
318 .max_speed_hz
= 2 * 1000 * 1000,
324 static int ts72xx_spi_chipselects
[] __initdata
= {
325 EP93XX_GPIO_LINE_F(2), /* DIO_17 */
328 static struct ep93xx_spi_info ts72xx_spi_info __initdata
= {
329 .chipselect
= ts72xx_spi_chipselects
,
330 .num_chipselect
= ARRAY_SIZE(ts72xx_spi_chipselects
),
333 static void __init
ts72xx_init_machine(void)
335 ep93xx_init_devices();
336 ts72xx_register_flash(ts72xx_nand_parts
, ARRAY_SIZE(ts72xx_nand_parts
),
337 is_ts9420_installed() ?
338 EP93XX_CS7_PHYS_BASE
: EP93XX_CS6_PHYS_BASE
);
339 platform_device_register(&ts72xx_rtc_device
);
340 platform_device_register(&ts72xx_wdt_device
);
342 ep93xx_register_eth(&ts72xx_eth_data
, 1);
343 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
344 if (board_is_ts7300())
345 platform_device_register(&ts73xx_fpga_device
);
347 ep93xx_register_spi(&ts72xx_spi_info
, ts72xx_spi_devices
,
348 ARRAY_SIZE(ts72xx_spi_devices
));
351 MACHINE_START(TS72XX
, "Technologic Systems TS-72xx SBC")
352 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
353 .atag_offset
= 0x100,
354 .map_io
= ts72xx_map_io
,
355 .init_irq
= ep93xx_init_irq
,
356 .init_time
= ep93xx_timer_init
,
357 .init_machine
= ts72xx_init_machine
,
358 .init_late
= ep93xx_init_late
,
359 .restart
= ep93xx_restart
,
362 /*************************************************************************
363 * EP93xx I2S audio peripheral handling
364 *************************************************************************/
365 static struct resource ep93xx_i2s_resource
[] = {
366 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE
, 0x100),
367 DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI
, "spilink i2s slave"),
370 static struct platform_device ep93xx_i2s_device
= {
371 .name
= "ep93xx-spilink-i2s",
373 .num_resources
= ARRAY_SIZE(ep93xx_i2s_resource
),
374 .resource
= ep93xx_i2s_resource
,
377 /*************************************************************************
379 *************************************************************************/
380 static struct mtd_partition bk3_nand_parts
[] = {
383 .offset
= 0x00000000,
387 .offset
= 0x01e00000,
391 .offset
= 0x07d20000,
393 .mask_flags
= MTD_WRITEABLE
, /* force RO */
397 static void __init
bk3_init_machine(void)
399 ep93xx_init_devices();
401 ts72xx_register_flash(bk3_nand_parts
, ARRAY_SIZE(bk3_nand_parts
),
402 EP93XX_CS6_PHYS_BASE
);
404 ep93xx_register_eth(&ts72xx_eth_data
, 1);
406 ep93xx_register_spi(&bk3_spi_master
, bk3_spi_board_info
,
407 ARRAY_SIZE(bk3_spi_board_info
));
409 /* Configure ep93xx's I2S to use AC97 pins */
410 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97
);
411 platform_device_register(&ep93xx_i2s_device
);
414 MACHINE_START(BK3
, "Liebherr controller BK3.1")
415 /* Maintainer: Lukasz Majewski <lukma@denx.de> */
416 .atag_offset
= 0x100,
417 .map_io
= ts72xx_map_io
,
418 .init_irq
= ep93xx_init_irq
,
419 .init_time
= ep93xx_timer_init
,
420 .init_machine
= bk3_init_machine
,
421 .init_late
= ep93xx_init_late
,
422 .restart
= ep93xx_restart
,