1 // SPDX-License-Identifier: GPL-2.0
3 * Virtual DMA allocation
5 * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
7 * 11/26/2000 -- disabled the existing code because it didn't work for
8 * me in 2.4. Replaced with a significantly more primitive version
9 * similar to the sun3 code. the old functionality was probably more
10 * desirable, but.... -- Sam Creasey (sammy@oh.verio.com)
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/bitops.h>
18 #include <linux/memblock.h>
19 #include <linux/vmalloc.h>
21 #include <asm/sun3x.h>
25 #include <asm/pgtable.h>
26 #include <asm/pgalloc.h>
30 #define IOMMU_ADDR_MASK 0x03ffe000
31 #define IOMMU_CACHE_INHIBIT 0x00000040
32 #define IOMMU_FULL_BLOCK 0x00000020
33 #define IOMMU_MODIFIED 0x00000010
34 #define IOMMU_USED 0x00000008
35 #define IOMMU_WRITE_PROTECT 0x00000004
36 #define IOMMU_DT_MASK 0x00000003
37 #define IOMMU_DT_INVALID 0x00000000
38 #define IOMMU_DT_VALID 0x00000001
39 #define IOMMU_DT_BAD 0x00000002
42 static volatile unsigned long *iommu_pte
= (unsigned long *)SUN3X_IOMMU
;
45 #define dvma_entry_paddr(index) (iommu_pte[index] & IOMMU_ADDR_MASK)
46 #define dvma_entry_vaddr(index,paddr) ((index << DVMA_PAGE_SHIFT) | \
47 (paddr & (DVMA_PAGE_SIZE-1)))
49 #define dvma_entry_set(index,addr) (iommu_pte[index] = \
50 (addr & IOMMU_ADDR_MASK) | \
51 IOMMU_DT_VALID | IOMMU_CACHE_INHIBIT)
53 #define dvma_entry_set(index,addr) (iommu_pte[index] = \
54 (addr & IOMMU_ADDR_MASK) | \
57 #define dvma_entry_clr(index) (iommu_pte[index] = IOMMU_DT_INVALID)
58 #define dvma_entry_hash(addr) ((addr >> DVMA_PAGE_SHIFT) ^ \
59 ((addr & 0x03c00000) >> \
63 /* code to print out a dvma mapping for debugging purposes */
64 void dvma_print (unsigned long dvma_addr
)
69 index
= dvma_addr
>> DVMA_PAGE_SHIFT
;
71 pr_info("idx %lx dvma_addr %08lx paddr %08lx\n", index
, dvma_addr
,
72 dvma_entry_paddr(index
));
77 /* create a virtual mapping for a page assigned within the IOMMU
78 so that the cpu can reach it easily */
79 inline int dvma_map_cpu(unsigned long kaddr
,
80 unsigned long vaddr
, int len
)
91 end
= PAGE_ALIGN(vaddr
+ len
);
93 pr_debug("dvma: mapping kern %08lx to virt %08lx\n", kaddr
, vaddr
);
94 pgd
= pgd_offset_k(vaddr
);
95 p4d
= p4d_offset(pgd
, vaddr
);
96 pud
= pud_offset(p4d
, vaddr
);
102 if((pmd
= pmd_alloc(&init_mm
, pud
, vaddr
)) == NULL
) {
107 if((end
& PGDIR_MASK
) > (vaddr
& PGDIR_MASK
))
108 end2
= (vaddr
+ (PGDIR_SIZE
-1)) & PGDIR_MASK
;
116 if((pte
= pte_alloc_kernel(pmd
, vaddr
)) == NULL
) {
121 if((end2
& PMD_MASK
) > (vaddr
& PMD_MASK
))
122 end3
= (vaddr
+ (PMD_SIZE
-1)) & PMD_MASK
;
127 pr_debug("mapping %08lx phys to %08lx\n",
129 set_pte(pte
, pfn_pte(virt_to_pfn(kaddr
),
134 } while(vaddr
< end3
);
136 } while(vaddr
< end2
);
138 } while(vaddr
< end
);
147 inline int dvma_map_iommu(unsigned long kaddr
, unsigned long baddr
,
150 unsigned long end
, index
;
152 index
= baddr
>> DVMA_PAGE_SHIFT
;
153 end
= ((baddr
+len
) >> DVMA_PAGE_SHIFT
);
155 if(len
& ~DVMA_PAGE_MASK
)
158 for(; index
< end
; index
++) {
159 // if(dvma_entry_use(index))
161 // pr_info("mapping pa %lx to ba %lx\n", __pa(kaddr),
162 // index << DVMA_PAGE_SHIFT);
164 dvma_entry_set(index
, __pa(kaddr
));
166 iommu_pte
[index
] |= IOMMU_FULL_BLOCK
;
167 // dvma_entry_inc(index);
169 kaddr
+= DVMA_PAGE_SIZE
;
173 for(index
= (baddr
>> DVMA_PAGE_SHIFT
); index
< end
; index
++)
174 dvma_print(index
<< DVMA_PAGE_SHIFT
);
180 void dvma_unmap_iommu(unsigned long baddr
, int len
)
186 index
= baddr
>> DVMA_PAGE_SHIFT
;
187 end
= (DVMA_PAGE_ALIGN(baddr
+len
) >> DVMA_PAGE_SHIFT
);
189 for(; index
< end
; index
++) {
190 pr_debug("freeing bus mapping %08x\n",
191 index
<< DVMA_PAGE_SHIFT
);
193 if(!dvma_entry_use(index
))
194 pr_info("dvma_unmap freeing unused entry %04x\n",
197 dvma_entry_dec(index
);
199 dvma_entry_clr(index
);