arch/sh/include/asm/pgtable_64.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __ASM_SH_PGTABLE_64_H
   3 #define __ASM_SH_PGTABLE_64_H
   4
   5 /*
   6  * include/asm-sh/pgtable_64.h
   7  *
   8  * This file contains the functions and defines necessary to modify and use
   9  * the SuperH page table tree.
  10  *
  11  * Copyright (C) 2000, 2001  Paolo Alberelli
  12  * Copyright (C) 2003, 2004  Paul Mundt
  13  * Copyright (C) 2003, 2004  Richard Curnow
  14  */
  15 #include <linux/threads.h>
  16 #include <asm/processor.h>
  17 #include <asm/page.h>
  18
  19 /*
  20  * Error outputs.
  21  */
  22 #define pte_ERROR(e) \
  23         printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
  24 #define pgd_ERROR(e) \
  25         printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
  26
  27 /*
  28  * Table setting routines. Used within arch/mm only.
  29  */
  30 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
  31
  32 static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
  33 {
  34         unsigned long long x = ((unsigned long long) pteval.pte_low);
  35         unsigned long long *xp = (unsigned long long *) pteptr;
  36         /*
  37          * Sign-extend based on NPHYS.
  38          */
  39         *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x;
  40 }
  41 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
  42
  43 /*
  44  * PGD defines. Top level.
  45  */
  46
  47 /* To find an entry in a generic PGD. */
  48 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
  49 #define __pgd_offset(address) pgd_index(address)
  50 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
  51
  52 /* To find an entry in a kernel PGD. */
  53 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
  54
  55 #define __pud_offset(address)   (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
  56 #define __pmd_offset(address)   (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
  57
  58 /*
  59  * PMD level access routines. Same notes as above.
  60  */
  61 #define _PMD_EMPTY              0x0
  62 /* Either the PMD is empty or present, it's not paged out */
  63 #define pmd_present(pmd_entry)  (pmd_val(pmd_entry) & _PAGE_PRESENT)
  64 #define pmd_clear(pmd_entry_p)  (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY)))
  65 #define pmd_none(pmd_entry)     (pmd_val((pmd_entry)) == _PMD_EMPTY)
  66 #define pmd_bad(pmd_entry)      ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
  67
  68 #define pmd_page_vaddr(pmd_entry) \
  69         ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK))
  70
  71 #define pmd_page(pmd) \
  72         (virt_to_page(pmd_val(pmd)))
  73
  74 /* PMD to PTE dereferencing */
  75 #define pte_index(address) \
  76                 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
  77
  78 #define __pte_offset(address)   pte_index(address)
  79
  80 #define pte_offset_kernel(dir, addr) \
  81                 ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr)))
  82
  83 #define pte_offset_map(dir,addr)        pte_offset_kernel(dir, addr)
  84 #define pte_unmap(pte)          do { } while (0)
  85
  86 #ifndef __ASSEMBLY__
  87 /*
  88  * PTEL coherent flags.
  89  * See Chapter 17 ST50 CPU Core Volume 1, Architecture.
  90  */
  91 /* The bits that are required in the SH-5 TLB are placed in the h/w-defined
  92    positions, to avoid expensive bit shuffling on every refill.  The remaining
  93    bits are used for s/w purposes and masked out on each refill.
  94
  95    Note, the PTE slots are used to hold data of type swp_entry_t when a page is
  96    swapped out.  Only the _PAGE_PRESENT flag is significant when the page is
  97    swapped out, and it must be placed so that it doesn't overlap either the
  98    type or offset fields of swp_entry_t.  For x86, offset is at [31:8] and type
  99    at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t.  This
 100    scheme doesn't map to SH-5 because bit [0] controls cacheability.  So bit
 101    [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split
 102    into 2 pieces.  That is handled by SWP_ENTRY and SWP_TYPE below. */
 103 #define _PAGE_WT        0x001  /* CB0: if cacheable, 1->write-thru, 0->write-back */
 104 #define _PAGE_DEVICE    0x001  /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */
 105 #define _PAGE_CACHABLE  0x002  /* CB1: uncachable/cachable */
 106 #define _PAGE_PRESENT   0x004  /* software: page referenced */
 107 #define _PAGE_SIZE0     0x008  /* SZ0-bit : size of page */
 108 #define _PAGE_SIZE1     0x010  /* SZ1-bit : size of page */
 109 #define _PAGE_SHARED    0x020  /* software: reflects PTEH's SH */
 110 #define _PAGE_READ      0x040  /* PR0-bit : read access allowed */
 111 #define _PAGE_EXECUTE   0x080  /* PR1-bit : execute access allowed */
 112 #define _PAGE_WRITE     0x100  /* PR2-bit : write access allowed */
 113 #define _PAGE_USER      0x200  /* PR3-bit : user space access allowed */
 114 #define _PAGE_DIRTY     0x400  /* software: page accessed in write */
 115 #define _PAGE_ACCESSED  0x800  /* software: page referenced */
 116
 117 /* Wrapper for extended mode pgprot twiddling */
 118 #define _PAGE_EXT(x)            ((unsigned long long)(x) << 32)
 119
 120 /*
 121  * We can use the sign-extended bits in the PTEL to get 32 bits of
 122  * software flags. This works for now because no implementations uses
 123  * anything above the PPN field.
 124  */
 125 #define _PAGE_WIRED     _PAGE_EXT(0x001) /* software: wire the tlb entry */
 126 #define _PAGE_SPECIAL   _PAGE_EXT(0x002)
 127
 128 #define _PAGE_CLEAR_FLAGS       (_PAGE_PRESENT | _PAGE_SHARED | \
 129                                  _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
 130
 131 /* Mask which drops software flags */
 132 #define _PAGE_FLAGS_HARDWARE_MASK       (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS))
 133
 134 /*
 135  * HugeTLB support
 136  */
 137 #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
 138 #define _PAGE_SZHUGE    (_PAGE_SIZE0)
 139 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
 140 #define _PAGE_SZHUGE    (_PAGE_SIZE1)
 141 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB)
 142 #define _PAGE_SZHUGE    (_PAGE_SIZE0 | _PAGE_SIZE1)
 143 #endif
 144
 145 /*
 146  * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
 147  * to make pte_mkhuge() happy.
 148  */
 149 #ifndef _PAGE_SZHUGE
 150 # define _PAGE_SZHUGE   (0)
 151 #endif
 152
 153 /*
 154  * Default flags for a Kernel page.
 155  * This is fundametally also SHARED because the main use of this define
 156  * (other than for PGD/PMD entries) is for the VMALLOC pool which is
 157  * contextless.
 158  *
 159  * _PAGE_EXECUTE is required for modules
 160  *
 161  */
 162 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 163                          _PAGE_EXECUTE | \
 164                          _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_DIRTY | \
 165                          _PAGE_SHARED)
 166
 167 /* Default flags for a User page */
 168 #define _PAGE_TABLE     (_KERNPG_TABLE | _PAGE_USER)
 169
 170 #define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
 171                          _PAGE_SPECIAL)
 172
 173 /*
 174  * We have full permissions (Read/Write/Execute/Shared).
 175  */
 176 #define _PAGE_COMMON    (_PAGE_PRESENT | _PAGE_USER | \
 177                          _PAGE_CACHABLE | _PAGE_ACCESSED)
 178
 179 #define PAGE_NONE       __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED)
 180 #define PAGE_SHARED     __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \
 181                                  _PAGE_SHARED)
 182 #define PAGE_EXECREAD   __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE)
 183
 184 /*
 185  * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default
 186  * protection mode for the stack.
 187  */
 188 #define PAGE_COPY       PAGE_EXECREAD
 189
 190 #define PAGE_READONLY   __pgprot(_PAGE_COMMON | _PAGE_READ)
 191 #define PAGE_WRITEONLY  __pgprot(_PAGE_COMMON | _PAGE_WRITE)
 192 #define PAGE_RWX        __pgprot(_PAGE_COMMON | _PAGE_READ | \
 193                                  _PAGE_WRITE | _PAGE_EXECUTE)
 194 #define PAGE_KERNEL     __pgprot(_KERNPG_TABLE)
 195
 196 #define PAGE_KERNEL_NOCACHE \
 197                         __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 198                                  _PAGE_EXECUTE | _PAGE_ACCESSED | \
 199                                  _PAGE_DIRTY | _PAGE_SHARED)
 200
 201 /* Make it a device mapping for maximum safety (e.g. for mapping device
 202    registers into user-space via /dev/map).  */
 203 #define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE)
 204 #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
 205
 206 /*
 207  * PTE level access routines.
 208  *
 209  * Note1:
 210  * It's the tree walk leaf. This is physical address to be stored.
 211  *
 212  * Note 2:
 213  * Regarding the choice of _PTE_EMPTY:
 214
 215    We must choose a bit pattern that cannot be valid, whether or not the page
 216    is present.  bit[2]==1 => present, bit[2]==0 => swapped out.  If swapped
 217    out, bits [31:8], [6:3], [1:0] are under swapper control, so only bit[7] is
 218    left for us to select.  If we force bit[7]==0 when swapped out, we could use
 219    the combination bit[7,2]=2'b10 to indicate an empty PTE.  Alternatively, if
 220    we force bit[7]==1 when swapped out, we can use all zeroes to indicate
 221    empty.  This is convenient, because the page tables get cleared to zero
 222    when they are allocated.
 223
 224  */
 225 #define _PTE_EMPTY      0x0
 226 #define pte_present(x)  (pte_val(x) & _PAGE_PRESENT)
 227 #define pte_clear(mm,addr,xp)   (set_pte_at(mm, addr, xp, __pte(_PTE_EMPTY)))
 228 #define pte_none(x)     (pte_val(x) == _PTE_EMPTY)
 229
 230 /*
 231  * Some definitions to translate between mem_map, PTEs, and page
 232  * addresses:
 233  */
 234
 235 /*
 236  * Given a PTE, return the index of the mem_map[] entry corresponding
 237  * to the page frame the PTE. Get the absolute physical address, make
 238  * a relative physical address and translate it to an index.
 239  */
 240 #define pte_pagenr(x)           (((unsigned long) (pte_val(x)) - \
 241                                  __MEMORY_START) >> PAGE_SHIFT)
 242
 243 /*
 244  * Given a PTE, return the "struct page *".
 245  */
 246 #define pte_page(x)             (mem_map + pte_pagenr(x))
 247
 248 /*
 249  * Return number of (down rounded) MB corresponding to x pages.
 250  */
 251 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
 252
 253
 254 /*
 255  * The following have defined behavior only work if pte_present() is true.
 256  */
 257 static inline int pte_dirty(pte_t pte)  { return pte_val(pte) & _PAGE_DIRTY; }
 258 static inline int pte_young(pte_t pte)  { return pte_val(pte) & _PAGE_ACCESSED; }
 259 static inline int pte_write(pte_t pte)  { return pte_val(pte) & _PAGE_WRITE; }
 260 static inline int pte_special(pte_t pte){ return pte_val(pte) & _PAGE_SPECIAL; }
 261
 262 static inline pte_t pte_wrprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; }
 263 static inline pte_t pte_mkclean(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
 264 static inline pte_t pte_mkold(pte_t pte)        { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
 265 static inline pte_t pte_mkwrite(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_WRITE)); return pte; }
 266 static inline pte_t pte_mkdirty(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
 267 static inline pte_t pte_mkyoung(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
 268 static inline pte_t pte_mkhuge(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
 269 static inline pte_t pte_mkspecial(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SPECIAL)); return pte; }
 270
 271 /*
 272  * Conversion functions: convert a page and protection to a page entry.
 273  *
 274  * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
 275  */
 276 #define mk_pte(page,pgprot)                                                     \
 277 ({                                                                              \
 278         pte_t __pte;                                                            \
 279                                                                                 \
 280         set_pte(&__pte, __pte((((page)-mem_map) << PAGE_SHIFT) |                \
 281                 __MEMORY_START | pgprot_val((pgprot))));                        \
 282         __pte;                                                                  \
 283 })
 284
 285 /*
 286  * This takes a (absolute) physical page address that is used
 287  * by the remapping functions
 288  */
 289 #define mk_pte_phys(physpage, pgprot) \
 290 ({ pte_t __pte; set_pte(&__pte, __pte(physpage | pgprot_val(pgprot))); __pte; })
 291
 292 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 293 { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
 294
 295 /* Encode and decode a swap entry */
 296 #define __swp_type(x)                   (((x).val & 3) + (((x).val >> 1) & 0x3c))
 297 #define __swp_offset(x)                 ((x).val >> 8)
 298 #define __swp_entry(type, offset)       ((swp_entry_t) { ((offset << 8) + ((type & 0x3c) << 1) + (type & 3)) })
 299 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
 300 #define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
 301
 302 #endif /* !__ASSEMBLY__ */
 303
 304 #define pfn_pte(pfn, prot)      __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 305 #define pfn_pmd(pfn, prot)      __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 306
 307 #endif /* __ASM_SH_PGTABLE_64_H */