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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[linux/fpc-iii.git] / drivers / net / ethernet / amd / declance.c
blobb799c7ac899b984bbeeacfc55f0d0917c7e2a037
1 /*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki
9 *
10 * additional sources:
11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
12 * Revision 1.2
13 *
14 * History:
15 *
16 * v0.001: The kernel accepts the code and it shows the hardware address.
17 *
18 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
19 *
20 * v0.003: Enhanced base address calculation from proposals by
21 * Harald Koerfgen and Thomas Riemer.
22 *
23 * v0.004: lance-regs is pointing at the right addresses, added prom
24 * check. First start of address mapping and DMA.
25 *
26 * v0.005: started to play around with LANCE-DMA. This driver will not
27 * work for non IOASIC lances. HK
28 *
29 * v0.006: added pointer arrays to lance_private and setup routine for
30 * them in dec_lance_init. HK
31 *
32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
33 * access the init block. This looks like one (short) word at a
34 * time, but the smallest amount the IOASIC can transfer is a
35 * (long) word. So we have a 2-2 padding here. Changed
36 * lance_init_block accordingly. The 16-16 padding for the buffers
37 * seems to be correct. HK
38 *
39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
40 *
41 * v0.009: Module support fixes, multiple interfaces support, various
42 * bits. macro
43 *
44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the
45 * PMAX requirement to only use halfword accesses to the
46 * buffer. macro
47 *
48 * v0.011: Converted the PMAD to the driver model. macro
49 */
50
51 #include <linux/crc32.h>
52 #include <linux/delay.h>
53 #include <linux/errno.h>
54 #include <linux/if_ether.h>
55 #include <linux/init.h>
56 #include <linux/kernel.h>
57 #include <linux/module.h>
58 #include <linux/netdevice.h>
59 #include <linux/etherdevice.h>
60 #include <linux/spinlock.h>
61 #include <linux/stddef.h>
62 #include <linux/string.h>
63 #include <linux/tc.h>
64 #include <linux/types.h>
65
66 #include <asm/addrspace.h>
67
68 #include <asm/dec/interrupts.h>
69 #include <asm/dec/ioasic.h>
70 #include <asm/dec/ioasic_addrs.h>
71 #include <asm/dec/kn01.h>
72 #include <asm/dec/machtype.h>
73 #include <asm/dec/system.h>
74
75 static char version[] =
76 "declance.c: v0.011 by Linux MIPS DECstation task force\n";
77
78 MODULE_AUTHOR("Linux MIPS DECstation task force");
79 MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
80 MODULE_LICENSE("GPL");
81
82 #define __unused __attribute__ ((unused))
83
84 /*
85 * card types
86 */
87 #define ASIC_LANCE 1
88 #define PMAD_LANCE 2
89 #define PMAX_LANCE 3
90
91
92 #define LE_CSR0 0
93 #define LE_CSR1 1
94 #define LE_CSR2 2
95 #define LE_CSR3 3
96
97 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
98
99 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
100 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
101 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
102 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
103 #define LE_C0_MERR 0x0800 /* ME: Memory error */
104 #define LE_C0_RINT 0x0400 /* Received interrupt */
105 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
106 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
107 #define LE_C0_INTR 0x0080 /* Interrupt or error */
108 #define LE_C0_INEA 0x0040 /* Interrupt enable */
109 #define LE_C0_RXON 0x0020 /* Receiver on */
110 #define LE_C0_TXON 0x0010 /* Transmitter on */
111 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
112 #define LE_C0_STOP 0x0004 /* Stop the card */
113 #define LE_C0_STRT 0x0002 /* Start the card */
114 #define LE_C0_INIT 0x0001 /* Init the card */
115
116 #define LE_C3_BSWP 0x4 /* SWAP */
117 #define LE_C3_ACON 0x2 /* ALE Control */
118 #define LE_C3_BCON 0x1 /* Byte control */
119
120 /* Receive message descriptor 1 */
121 #define LE_R1_OWN 0x8000 /* Who owns the entry */
122 #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */
123 #define LE_R1_FRA 0x2000 /* FRA: Frame error */
124 #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */
125 #define LE_R1_CRC 0x0800 /* CRC error */
126 #define LE_R1_BUF 0x0400 /* BUF: Buffer error */
127 #define LE_R1_SOP 0x0200 /* Start of packet */
128 #define LE_R1_EOP 0x0100 /* End of packet */
129 #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */
130
131 /* Transmit message descriptor 1 */
132 #define LE_T1_OWN 0x8000 /* Lance owns the packet */
133 #define LE_T1_ERR 0x4000 /* Error summary */
134 #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */
135 #define LE_T1_EONE 0x0800 /* Error: one retry needed */
136 #define LE_T1_EDEF 0x0400 /* Error: deferred */
137 #define LE_T1_SOP 0x0200 /* Start of packet */
138 #define LE_T1_EOP 0x0100 /* End of packet */
139 #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */
140
141 #define LE_T3_BUF 0x8000 /* Buffer error */
142 #define LE_T3_UFL 0x4000 /* Error underflow */
143 #define LE_T3_LCOL 0x1000 /* Error late collision */
144 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
145 #define LE_T3_RTY 0x0400 /* Error retry */
146 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
147
148 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
149
150 #ifndef LANCE_LOG_TX_BUFFERS
151 #define LANCE_LOG_TX_BUFFERS 4
152 #define LANCE_LOG_RX_BUFFERS 4
153 #endif
154
155 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
156 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
157
158 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
159 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
160
161 #define PKT_BUF_SZ 1536
162 #define RX_BUFF_SIZE PKT_BUF_SZ
163 #define TX_BUFF_SIZE PKT_BUF_SZ
164
165 #undef TEST_HITS
166 #define ZERO 0
167
168 /*
169 * The DS2100/3100 have a linear 64 kB buffer which supports halfword
170 * accesses only. Each halfword of the buffer is word-aligned in the
171 * CPU address space.
172 *
173 * The PMAD-AA has a 128 kB buffer on-board.
174 *
175 * The IOASIC LANCE devices use a shared memory region. This region
176 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB
177 * boundary. The LANCE sees this as a 64 kB long continuous memory
178 * region.
179 *
180 * The LANCE's DMA address is used as an index in this buffer and DMA
181 * takes place in bursts of eight 16-bit words which are packed into
182 * four 32-bit words by the IOASIC. This leads to a strange padding:
183 * 16 bytes of valid data followed by a 16 byte gap :-(.
184 */
185
186 struct lance_rx_desc {
187 unsigned short rmd0; /* low address of packet */
188 unsigned short rmd1; /* high address of packet
189 and descriptor bits */
190 short length; /* 2s complement (negative!)
191 of buffer length */
192 unsigned short mblength; /* actual number of bytes received */
193 };
194
195 struct lance_tx_desc {
196 unsigned short tmd0; /* low address of packet */
197 unsigned short tmd1; /* high address of packet
198 and descriptor bits */
199 short length; /* 2s complement (negative!)
200 of buffer length */
201 unsigned short misc;
202 };
203
204
205 /* First part of the LANCE initialization block, described in databook. */
206 struct lance_init_block {
207 unsigned short mode; /* pre-set mode (reg. 15) */
208
209 unsigned short phys_addr[3]; /* physical ethernet address */
210 unsigned short filter[4]; /* multicast filter */
211
212 /* Receive and transmit ring base, along with extra bits. */
213 unsigned short rx_ptr; /* receive descriptor addr */
214 unsigned short rx_len; /* receive len and high addr */
215 unsigned short tx_ptr; /* transmit descriptor addr */
216 unsigned short tx_len; /* transmit len and high addr */
217
218 short gap[4];
219
220 /* The buffer descriptors */
221 struct lance_rx_desc brx_ring[RX_RING_SIZE];
222 struct lance_tx_desc btx_ring[TX_RING_SIZE];
223 };
224
225 #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
226 #define BUF_OFFSET_LNC sizeof(struct lance_init_block)
227
228 #define shift_off(off, type) \
229 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off)
230
231 #define lib_off(rt, type) \
232 shift_off(offsetof(struct lance_init_block, rt), type)
233
234 #define lib_ptr(ib, rt, type) \
235 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type)))
236
237 #define rds_off(rt, type) \
238 shift_off(offsetof(struct lance_rx_desc, rt), type)
239
240 #define rds_ptr(rd, rt, type) \
241 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type)))
242
243 #define tds_off(rt, type) \
244 shift_off(offsetof(struct lance_tx_desc, rt), type)
245
246 #define tds_ptr(td, rt, type) \
247 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type)))
248
249 struct lance_private {
250 struct net_device *next;
251 int type;
252 int dma_irq;
253 volatile struct lance_regs *ll;
254
255 spinlock_t lock;
256
257 int rx_new, tx_new;
258 int rx_old, tx_old;
259
260 unsigned short busmaster_regval;
261
262 struct timer_list multicast_timer;
263
264 /* Pointers to the ring buffers as seen from the CPU */
265 char *rx_buf_ptr_cpu[RX_RING_SIZE];
266 char *tx_buf_ptr_cpu[TX_RING_SIZE];
267
268 /* Pointers to the ring buffers as seen from the LANCE */
269 uint rx_buf_ptr_lnc[RX_RING_SIZE];
270 uint tx_buf_ptr_lnc[TX_RING_SIZE];
271 };
272
273 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
274 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
275 lp->tx_old - lp->tx_new-1)
276
277 /* The lance control ports are at an absolute address, machine and tc-slot
278 * dependent.
279 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
280 * so we have to give the structure an extra member making rap pointing
281 * at the right address
282 */
283 struct lance_regs {
284 volatile unsigned short rdp; /* register data port */
285 unsigned short pad;
286 volatile unsigned short rap; /* register address port */
287 };
288
289 int dec_lance_debug = 2;
290
291 static struct tc_driver dec_lance_tc_driver;
292 static struct net_device *root_lance_dev;
293
294 static inline void writereg(volatile unsigned short *regptr, short value)
295 {
296 *regptr = value;
297 iob();
298 }
299
300 /* Load the CSR registers */
301 static void load_csrs(struct lance_private *lp)
302 {
303 volatile struct lance_regs *ll = lp->ll;
304 uint leptr;
305
306 /* The address space as seen from the LANCE
307 * begins at address 0. HK
308 */
309 leptr = 0;
310
311 writereg(&ll->rap, LE_CSR1);
312 writereg(&ll->rdp, (leptr & 0xFFFF));
313 writereg(&ll->rap, LE_CSR2);
314 writereg(&ll->rdp, leptr >> 16);
315 writereg(&ll->rap, LE_CSR3);
316 writereg(&ll->rdp, lp->busmaster_regval);
317
318 /* Point back to csr0 */
319 writereg(&ll->rap, LE_CSR0);
320 }
321
322 /*
323 * Our specialized copy routines
324 *
325 */
326 static void cp_to_buf(const int type, void *to, const void *from, int len)
327 {
328 unsigned short *tp;
329 const unsigned short *fp;
330 unsigned short clen;
331 unsigned char *rtp;
332 const unsigned char *rfp;
333
334 if (type == PMAD_LANCE) {
335 memcpy(to, from, len);
336 } else if (type == PMAX_LANCE) {
337 clen = len >> 1;
338 tp = to;
339 fp = from;
340
341 while (clen--) {
342 *tp++ = *fp++;
343 tp++;
344 }
345
346 clen = len & 1;
347 rtp = (unsigned char *)tp;
348 rfp = (const unsigned char *)fp;
349 while (clen--) {
350 *rtp++ = *rfp++;
351 }
352 } else {
353 /*
354 * copy 16 Byte chunks
355 */
356 clen = len >> 4;
357 tp = to;
358 fp = from;
359 while (clen--) {
360 *tp++ = *fp++;
361 *tp++ = *fp++;
362 *tp++ = *fp++;
363 *tp++ = *fp++;
364 *tp++ = *fp++;
365 *tp++ = *fp++;
366 *tp++ = *fp++;
367 *tp++ = *fp++;
368 tp += 8;
369 }
370
371 /*
372 * do the rest, if any.
373 */
374 clen = len & 15;
375 rtp = (unsigned char *)tp;
376 rfp = (const unsigned char *)fp;
377 while (clen--) {
378 *rtp++ = *rfp++;
379 }
380 }
381
382 iob();
383 }
384
385 static void cp_from_buf(const int type, void *to, const void *from, int len)
386 {
387 unsigned short *tp;
388 const unsigned short *fp;
389 unsigned short clen;
390 unsigned char *rtp;
391 const unsigned char *rfp;
392
393 if (type == PMAD_LANCE) {
394 memcpy(to, from, len);
395 } else if (type == PMAX_LANCE) {
396 clen = len >> 1;
397 tp = to;
398 fp = from;
399 while (clen--) {
400 *tp++ = *fp++;
401 fp++;
402 }
403
404 clen = len & 1;
405
406 rtp = (unsigned char *)tp;
407 rfp = (const unsigned char *)fp;
408
409 while (clen--) {
410 *rtp++ = *rfp++;
411 }
412 } else {
413
414 /*
415 * copy 16 Byte chunks
416 */
417 clen = len >> 4;
418 tp = to;
419 fp = from;
420 while (clen--) {
421 *tp++ = *fp++;
422 *tp++ = *fp++;
423 *tp++ = *fp++;
424 *tp++ = *fp++;
425 *tp++ = *fp++;
426 *tp++ = *fp++;
427 *tp++ = *fp++;
428 *tp++ = *fp++;
429 fp += 8;
430 }
431
432 /*
433 * do the rest, if any.
434 */
435 clen = len & 15;
436 rtp = (unsigned char *)tp;
437 rfp = (const unsigned char *)fp;
438 while (clen--) {
439 *rtp++ = *rfp++;
440 }
441
442
443 }
444
445 }
446
447 /* Setup the Lance Rx and Tx rings */
448 static void lance_init_ring(struct net_device *dev)
449 {
450 struct lance_private *lp = netdev_priv(dev);
451 volatile u16 *ib = (volatile u16 *)dev->mem_start;
452 uint leptr;
453 int i;
454
455 /* Lock out other processes while setting up hardware */
456 netif_stop_queue(dev);
457 lp->rx_new = lp->tx_new = 0;
458 lp->rx_old = lp->tx_old = 0;
459
460 /* Copy the ethernet address to the lance init block.
461 * XXX bit 0 of the physical address registers has to be zero
462 */
463 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) |
464 dev->dev_addr[0];
465 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) |
466 dev->dev_addr[2];
467 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) |
468 dev->dev_addr[4];
469 /* Setup the initialization block */
470
471 /* Setup rx descriptor pointer */
472 leptr = offsetof(struct lance_init_block, brx_ring);
473 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) |
474 (leptr >> 16);
475 *lib_ptr(ib, rx_ptr, lp->type) = leptr;
476 if (ZERO)
477 printk("RX ptr: %8.8x(%8.8x)\n",
478 leptr, (uint)lib_off(brx_ring, lp->type));
479
480 /* Setup tx descriptor pointer */
481 leptr = offsetof(struct lance_init_block, btx_ring);
482 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) |
483 (leptr >> 16);
484 *lib_ptr(ib, tx_ptr, lp->type) = leptr;
485 if (ZERO)
486 printk("TX ptr: %8.8x(%8.8x)\n",
487 leptr, (uint)lib_off(btx_ring, lp->type));
488
489 if (ZERO)
490 printk("TX rings:\n");
491
492 /* Setup the Tx ring entries */
493 for (i = 0; i < TX_RING_SIZE; i++) {
494 leptr = lp->tx_buf_ptr_lnc[i];
495 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr;
496 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) &
497 0xff;
498 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000;
499 /* The ones required by tmd2 */
500 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0;
501 if (i < 3 && ZERO)
502 printk("%d: %8.8x(%p)\n",
503 i, leptr, lp->tx_buf_ptr_cpu[i]);
504 }
505
506 /* Setup the Rx ring entries */
507 if (ZERO)
508 printk("RX rings:\n");
509 for (i = 0; i < RX_RING_SIZE; i++) {
510 leptr = lp->rx_buf_ptr_lnc[i];
511 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr;
512 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) &
513 0xff) |
514 LE_R1_OWN;
515 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE |
516 0xf000;
517 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0;
518 if (i < 3 && ZERO)
519 printk("%d: %8.8x(%p)\n",
520 i, leptr, lp->rx_buf_ptr_cpu[i]);
521 }
522 iob();
523 }
524
525 static int init_restart_lance(struct lance_private *lp)
526 {
527 volatile struct lance_regs *ll = lp->ll;
528 int i;
529
530 writereg(&ll->rap, LE_CSR0);
531 writereg(&ll->rdp, LE_C0_INIT);
532
533 /* Wait for the lance to complete initialization */
534 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
535 udelay(10);
536 }
537 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
538 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
539 i, ll->rdp);
540 return -1;
541 }
542 if ((ll->rdp & LE_C0_ERR)) {
543 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
544 i, ll->rdp);
545 return -1;
546 }
547 writereg(&ll->rdp, LE_C0_IDON);
548 writereg(&ll->rdp, LE_C0_STRT);
549 writereg(&ll->rdp, LE_C0_INEA);
550
551 return 0;
552 }
553
554 static int lance_rx(struct net_device *dev)
555 {
556 struct lance_private *lp = netdev_priv(dev);
557 volatile u16 *ib = (volatile u16 *)dev->mem_start;
558 volatile u16 *rd;
559 unsigned short bits;
560 int entry, len;
561 struct sk_buff *skb;
562
563 #ifdef TEST_HITS
564 {
565 int i;
566
567 printk("[");
568 for (i = 0; i < RX_RING_SIZE; i++) {
569 if (i == lp->rx_new)
570 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
571 lp->type) &
572 LE_R1_OWN ? "_" : "X");
573 else
574 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
575 lp->type) &
576 LE_R1_OWN ? "." : "1");
577 }
578 printk("]");
579 }
580 #endif
581
582 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type);
583 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN);
584 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) {
585 entry = lp->rx_new;
586
587 /* We got an incomplete frame? */
588 if ((bits & LE_R1_POK) != LE_R1_POK) {
589 dev->stats.rx_over_errors++;
590 dev->stats.rx_errors++;
591 } else if (bits & LE_R1_ERR) {
592 /* Count only the end frame as a rx error,
593 * not the beginning
594 */
595 if (bits & LE_R1_BUF)
596 dev->stats.rx_fifo_errors++;
597 if (bits & LE_R1_CRC)
598 dev->stats.rx_crc_errors++;
599 if (bits & LE_R1_OFL)
600 dev->stats.rx_over_errors++;
601 if (bits & LE_R1_FRA)
602 dev->stats.rx_frame_errors++;
603 if (bits & LE_R1_EOP)
604 dev->stats.rx_errors++;
605 } else {
606 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4;
607 skb = netdev_alloc_skb(dev, len + 2);
608
609 if (skb == 0) {
610 dev->stats.rx_dropped++;
611 *rds_ptr(rd, mblength, lp->type) = 0;
612 *rds_ptr(rd, rmd1, lp->type) =
613 ((lp->rx_buf_ptr_lnc[entry] >> 16) &
614 0xff) | LE_R1_OWN;
615 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
616 return 0;
617 }
618 dev->stats.rx_bytes += len;
619
620 skb_reserve(skb, 2); /* 16 byte align */
621 skb_put(skb, len); /* make room */
622
623 cp_from_buf(lp->type, skb->data,
624 lp->rx_buf_ptr_cpu[entry], len);
625
626 skb->protocol = eth_type_trans(skb, dev);
627 netif_rx(skb);
628 dev->stats.rx_packets++;
629 }
630
631 /* Return the packet to the pool */
632 *rds_ptr(rd, mblength, lp->type) = 0;
633 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000;
634 *rds_ptr(rd, rmd1, lp->type) =
635 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN;
636 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
637 }
638 return 0;
639 }
640
641 static void lance_tx(struct net_device *dev)
642 {
643 struct lance_private *lp = netdev_priv(dev);
644 volatile u16 *ib = (volatile u16 *)dev->mem_start;
645 volatile struct lance_regs *ll = lp->ll;
646 volatile u16 *td;
647 int i, j;
648 int status;
649
650 j = lp->tx_old;
651
652 spin_lock(&lp->lock);
653
654 for (i = j; i != lp->tx_new; i = j) {
655 td = lib_ptr(ib, btx_ring[i], lp->type);
656 /* If we hit a packet not owned by us, stop */
657 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN)
658 break;
659
660 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) {
661 status = *tds_ptr(td, misc, lp->type);
662
663 dev->stats.tx_errors++;
664 if (status & LE_T3_RTY)
665 dev->stats.tx_aborted_errors++;
666 if (status & LE_T3_LCOL)
667 dev->stats.tx_window_errors++;
668
669 if (status & LE_T3_CLOS) {
670 dev->stats.tx_carrier_errors++;
671 printk("%s: Carrier Lost\n", dev->name);
672 /* Stop the lance */
673 writereg(&ll->rap, LE_CSR0);
674 writereg(&ll->rdp, LE_C0_STOP);
675 lance_init_ring(dev);
676 load_csrs(lp);
677 init_restart_lance(lp);
678 goto out;
679 }
680 /* Buffer errors and underflows turn off the
681 * transmitter, restart the adapter.
682 */
683 if (status & (LE_T3_BUF | LE_T3_UFL)) {
684 dev->stats.tx_fifo_errors++;
685
686 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
687 dev->name);
688 /* Stop the lance */
689 writereg(&ll->rap, LE_CSR0);
690 writereg(&ll->rdp, LE_C0_STOP);
691 lance_init_ring(dev);
692 load_csrs(lp);
693 init_restart_lance(lp);
694 goto out;
695 }
696 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) ==
697 LE_T1_POK) {
698 /*
699 * So we don't count the packet more than once.
700 */
701 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK);
702
703 /* One collision before packet was sent. */
704 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE)
705 dev->stats.collisions++;
706
707 /* More than one collision, be optimistic. */
708 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE)
709 dev->stats.collisions += 2;
710
711 dev->stats.tx_packets++;
712 }
713 j = (j + 1) & TX_RING_MOD_MASK;
714 }
715 lp->tx_old = j;
716 out:
717 if (netif_queue_stopped(dev) &&
718 TX_BUFFS_AVAIL > 0)
719 netif_wake_queue(dev);
720
721 spin_unlock(&lp->lock);
722 }
723
724 static irqreturn_t lance_dma_merr_int(int irq, void *dev_id)
725 {
726 struct net_device *dev = dev_id;
727
728 printk(KERN_ERR "%s: DMA error\n", dev->name);
729 return IRQ_HANDLED;
730 }
731
732 static irqreturn_t lance_interrupt(int irq, void *dev_id)
733 {
734 struct net_device *dev = dev_id;
735 struct lance_private *lp = netdev_priv(dev);
736 volatile struct lance_regs *ll = lp->ll;
737 int csr0;
738
739 writereg(&ll->rap, LE_CSR0);
740 csr0 = ll->rdp;
741
742 /* Acknowledge all the interrupt sources ASAP */
743 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
744
745 if ((csr0 & LE_C0_ERR)) {
746 /* Clear the error condition */
747 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
748 LE_C0_CERR | LE_C0_MERR);
749 }
750 if (csr0 & LE_C0_RINT)
751 lance_rx(dev);
752
753 if (csr0 & LE_C0_TINT)
754 lance_tx(dev);
755
756 if (csr0 & LE_C0_BABL)
757 dev->stats.tx_errors++;
758
759 if (csr0 & LE_C0_MISS)
760 dev->stats.rx_errors++;
761
762 if (csr0 & LE_C0_MERR) {
763 printk("%s: Memory error, status %04x\n", dev->name, csr0);
764
765 writereg(&ll->rdp, LE_C0_STOP);
766
767 lance_init_ring(dev);
768 load_csrs(lp);
769 init_restart_lance(lp);
770 netif_wake_queue(dev);
771 }
772
773 writereg(&ll->rdp, LE_C0_INEA);
774 writereg(&ll->rdp, LE_C0_INEA);
775 return IRQ_HANDLED;
776 }
777
778 static int lance_open(struct net_device *dev)
779 {
780 volatile u16 *ib = (volatile u16 *)dev->mem_start;
781 struct lance_private *lp = netdev_priv(dev);
782 volatile struct lance_regs *ll = lp->ll;
783 int status = 0;
784
785 /* Stop the Lance */
786 writereg(&ll->rap, LE_CSR0);
787 writereg(&ll->rdp, LE_C0_STOP);
788
789 /* Set mode and clear multicast filter only at device open,
790 * so that lance_init_ring() called at any error will not
791 * forget multicast filters.
792 *
793 * BTW it is common bug in all lance drivers! --ANK
794 */
795 *lib_ptr(ib, mode, lp->type) = 0;
796 *lib_ptr(ib, filter[0], lp->type) = 0;
797 *lib_ptr(ib, filter[1], lp->type) = 0;
798 *lib_ptr(ib, filter[2], lp->type) = 0;
799 *lib_ptr(ib, filter[3], lp->type) = 0;
800
801 lance_init_ring(dev);
802 load_csrs(lp);
803
804 netif_start_queue(dev);
805
806 /* Associate IRQ with lance_interrupt */
807 if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) {
808 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
809 return -EAGAIN;
810 }
811 if (lp->dma_irq >= 0) {
812 unsigned long flags;
813
814 if (request_irq(lp->dma_irq, lance_dma_merr_int, IRQF_ONESHOT,
815 "lance error", dev)) {
816 free_irq(dev->irq, dev);
817 printk("%s: Can't get DMA IRQ %d\n", dev->name,
818 lp->dma_irq);
819 return -EAGAIN;
820 }
821
822 spin_lock_irqsave(&ioasic_ssr_lock, flags);
823
824 fast_mb();
825 /* Enable I/O ASIC LANCE DMA. */
826 ioasic_write(IO_REG_SSR,
827 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
828
829 fast_mb();
830 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
831 }
832
833 status = init_restart_lance(lp);
834 return status;
835 }
836
837 static int lance_close(struct net_device *dev)
838 {
839 struct lance_private *lp = netdev_priv(dev);
840 volatile struct lance_regs *ll = lp->ll;
841
842 netif_stop_queue(dev);
843 del_timer_sync(&lp->multicast_timer);
844
845 /* Stop the card */
846 writereg(&ll->rap, LE_CSR0);
847 writereg(&ll->rdp, LE_C0_STOP);
848
849 if (lp->dma_irq >= 0) {
850 unsigned long flags;
851
852 spin_lock_irqsave(&ioasic_ssr_lock, flags);
853
854 fast_mb();
855 /* Disable I/O ASIC LANCE DMA. */
856 ioasic_write(IO_REG_SSR,
857 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
858
859 fast_iob();
860 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
861
862 free_irq(lp->dma_irq, dev);
863 }
864 free_irq(dev->irq, dev);
865 return 0;
866 }
867
868 static inline int lance_reset(struct net_device *dev)
869 {
870 struct lance_private *lp = netdev_priv(dev);
871 volatile struct lance_regs *ll = lp->ll;
872 int status;
873
874 /* Stop the lance */
875 writereg(&ll->rap, LE_CSR0);
876 writereg(&ll->rdp, LE_C0_STOP);
877
878 lance_init_ring(dev);
879 load_csrs(lp);
880 netif_trans_update(dev); /* prevent tx timeout */
881 status = init_restart_lance(lp);
882 return status;
883 }
884
885 static void lance_tx_timeout(struct net_device *dev)
886 {
887 struct lance_private *lp = netdev_priv(dev);
888 volatile struct lance_regs *ll = lp->ll;
889
890 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
891 dev->name, ll->rdp);
892 lance_reset(dev);
893 netif_wake_queue(dev);
894 }
895
896 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
897 {
898 struct lance_private *lp = netdev_priv(dev);
899 volatile struct lance_regs *ll = lp->ll;
900 volatile u16 *ib = (volatile u16 *)dev->mem_start;
901 unsigned long flags;
902 int entry, len;
903
904 len = skb->len;
905
906 if (len < ETH_ZLEN) {
907 if (skb_padto(skb, ETH_ZLEN))
908 return NETDEV_TX_OK;
909 len = ETH_ZLEN;
910 }
911
912 dev->stats.tx_bytes += len;
913
914 spin_lock_irqsave(&lp->lock, flags);
915
916 entry = lp->tx_new;
917 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len);
918 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0;
919
920 cp_to_buf(lp->type, lp->tx_buf_ptr_cpu[entry], skb->data, len);
921
922 /* Now, give the packet to the lance */
923 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) =
924 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) |
925 (LE_T1_POK | LE_T1_OWN);
926 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK;
927
928 if (TX_BUFFS_AVAIL <= 0)
929 netif_stop_queue(dev);
930
931 /* Kick the lance: transmit now */
932 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
933
934 spin_unlock_irqrestore(&lp->lock, flags);
935
936 dev_kfree_skb(skb);
937
938 return NETDEV_TX_OK;
939 }
940
941 static void lance_load_multicast(struct net_device *dev)
942 {
943 struct lance_private *lp = netdev_priv(dev);
944 volatile u16 *ib = (volatile u16 *)dev->mem_start;
945 struct netdev_hw_addr *ha;
946 u32 crc;
947
948 /* set all multicast bits */
949 if (dev->flags & IFF_ALLMULTI) {
950 *lib_ptr(ib, filter[0], lp->type) = 0xffff;
951 *lib_ptr(ib, filter[1], lp->type) = 0xffff;
952 *lib_ptr(ib, filter[2], lp->type) = 0xffff;
953 *lib_ptr(ib, filter[3], lp->type) = 0xffff;
954 return;
955 }
956 /* clear the multicast filter */
957 *lib_ptr(ib, filter[0], lp->type) = 0;
958 *lib_ptr(ib, filter[1], lp->type) = 0;
959 *lib_ptr(ib, filter[2], lp->type) = 0;
960 *lib_ptr(ib, filter[3], lp->type) = 0;
961
962 /* Add addresses */
963 netdev_for_each_mc_addr(ha, dev) {
964 crc = ether_crc_le(ETH_ALEN, ha->addr);
965 crc = crc >> 26;
966 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf);
967 }
968 }
969
970 static void lance_set_multicast(struct net_device *dev)
971 {
972 struct lance_private *lp = netdev_priv(dev);
973 volatile u16 *ib = (volatile u16 *)dev->mem_start;
974 volatile struct lance_regs *ll = lp->ll;
975
976 if (!netif_running(dev))
977 return;
978
979 if (lp->tx_old != lp->tx_new) {
980 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
981 netif_wake_queue(dev);
982 return;
983 }
984
985 netif_stop_queue(dev);
986
987 writereg(&ll->rap, LE_CSR0);
988 writereg(&ll->rdp, LE_C0_STOP);
989
990 lance_init_ring(dev);
991
992 if (dev->flags & IFF_PROMISC) {
993 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM;
994 } else {
995 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM;
996 lance_load_multicast(dev);
997 }
998 load_csrs(lp);
999 init_restart_lance(lp);
1000 netif_wake_queue(dev);
1001 }
1002
1003 static void lance_set_multicast_retry(unsigned long _opaque)
1004 {
1005 struct net_device *dev = (struct net_device *) _opaque;
1006
1007 lance_set_multicast(dev);
1008 }
1009
1010 static const struct net_device_ops lance_netdev_ops = {
1011 .ndo_open = lance_open,
1012 .ndo_stop = lance_close,
1013 .ndo_start_xmit = lance_start_xmit,
1014 .ndo_tx_timeout = lance_tx_timeout,
1015 .ndo_set_rx_mode = lance_set_multicast,
1016 .ndo_change_mtu = eth_change_mtu,
1017 .ndo_validate_addr = eth_validate_addr,
1018 .ndo_set_mac_address = eth_mac_addr,
1019 };
1020
1021 static int dec_lance_probe(struct device *bdev, const int type)
1022 {
1023 static unsigned version_printed;
1024 static const char fmt[] = "declance%d";
1025 char name[10];
1026 struct net_device *dev;
1027 struct lance_private *lp;
1028 volatile struct lance_regs *ll;
1029 resource_size_t start = 0, len = 0;
1030 int i, ret;
1031 unsigned long esar_base;
1032 unsigned char *esar;
1033
1034 if (dec_lance_debug && version_printed++ == 0)
1035 printk(version);
1036
1037 if (bdev)
1038 snprintf(name, sizeof(name), "%s", dev_name(bdev));
1039 else {
1040 i = 0;
1041 dev = root_lance_dev;
1042 while (dev) {
1043 i++;
1044 lp = netdev_priv(dev);
1045 dev = lp->next;
1046 }
1047 snprintf(name, sizeof(name), fmt, i);
1048 }
1049
1050 dev = alloc_etherdev(sizeof(struct lance_private));
1051 if (!dev) {
1052 ret = -ENOMEM;
1053 goto err_out;
1054 }
1055
1056 /*
1057 * alloc_etherdev ensures the data structures used by the LANCE
1058 * are aligned.
1059 */
1060 lp = netdev_priv(dev);
1061 spin_lock_init(&lp->lock);
1062
1063 lp->type = type;
1064 switch (type) {
1065 case ASIC_LANCE:
1066 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
1067
1068 /* buffer space for the on-board LANCE shared memory */
1069 /*
1070 * FIXME: ugly hack!
1071 */
1072 dev->mem_start = CKSEG1ADDR(0x00020000);
1073 dev->mem_end = dev->mem_start + 0x00020000;
1074 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1075 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
1076
1077 /* Workaround crash with booting KN04 2.1k from Disk */
1078 memset((void *)dev->mem_start, 0,
1079 dev->mem_end - dev->mem_start);
1080
1081 /*
1082 * setup the pointer arrays, this sucks [tm] :-(
1083 */
1084 for (i = 0; i < RX_RING_SIZE; i++) {
1085 lp->rx_buf_ptr_cpu[i] =
1086 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1087 2 * i * RX_BUFF_SIZE);
1088 lp->rx_buf_ptr_lnc[i] =
1089 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1090 }
1091 for (i = 0; i < TX_RING_SIZE; i++) {
1092 lp->tx_buf_ptr_cpu[i] =
1093 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1094 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1095 2 * i * TX_BUFF_SIZE);
1096 lp->tx_buf_ptr_lnc[i] =
1097 (BUF_OFFSET_LNC +
1098 RX_RING_SIZE * RX_BUFF_SIZE +
1099 i * TX_BUFF_SIZE);
1100 }
1101
1102 /* Setup I/O ASIC LANCE DMA. */
1103 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1104 ioasic_write(IO_REG_LANCE_DMA_P,
1105 CPHYSADDR(dev->mem_start) << 3);
1106
1107 break;
1108 #ifdef CONFIG_TC
1109 case PMAD_LANCE:
1110 dev_set_drvdata(bdev, dev);
1111
1112 start = to_tc_dev(bdev)->resource.start;
1113 len = to_tc_dev(bdev)->resource.end - start + 1;
1114 if (!request_mem_region(start, len, dev_name(bdev))) {
1115 printk(KERN_ERR
1116 "%s: Unable to reserve MMIO resource\n",
1117 dev_name(bdev));
1118 ret = -EBUSY;
1119 goto err_out_dev;
1120 }
1121
1122 dev->mem_start = CKSEG1ADDR(start);
1123 dev->mem_end = dev->mem_start + 0x100000;
1124 dev->base_addr = dev->mem_start + 0x100000;
1125 dev->irq = to_tc_dev(bdev)->interrupt;
1126 esar_base = dev->mem_start + 0x1c0002;
1127 lp->dma_irq = -1;
1128
1129 for (i = 0; i < RX_RING_SIZE; i++) {
1130 lp->rx_buf_ptr_cpu[i] =
1131 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1132 i * RX_BUFF_SIZE);
1133 lp->rx_buf_ptr_lnc[i] =
1134 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1135 }
1136 for (i = 0; i < TX_RING_SIZE; i++) {
1137 lp->tx_buf_ptr_cpu[i] =
1138 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1139 RX_RING_SIZE * RX_BUFF_SIZE +
1140 i * TX_BUFF_SIZE);
1141 lp->tx_buf_ptr_lnc[i] =
1142 (BUF_OFFSET_LNC +
1143 RX_RING_SIZE * RX_BUFF_SIZE +
1144 i * TX_BUFF_SIZE);
1145 }
1146
1147 break;
1148 #endif
1149 case PMAX_LANCE:
1150 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1151 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
1152 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
1153 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE;
1154 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
1155 lp->dma_irq = -1;
1156
1157 /*
1158 * setup the pointer arrays, this sucks [tm] :-(
1159 */
1160 for (i = 0; i < RX_RING_SIZE; i++) {
1161 lp->rx_buf_ptr_cpu[i] =
1162 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1163 2 * i * RX_BUFF_SIZE);
1164 lp->rx_buf_ptr_lnc[i] =
1165 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1166 }
1167 for (i = 0; i < TX_RING_SIZE; i++) {
1168 lp->tx_buf_ptr_cpu[i] =
1169 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1170 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1171 2 * i * TX_BUFF_SIZE);
1172 lp->tx_buf_ptr_lnc[i] =
1173 (BUF_OFFSET_LNC +
1174 RX_RING_SIZE * RX_BUFF_SIZE +
1175 i * TX_BUFF_SIZE);
1176 }
1177
1178 break;
1179
1180 default:
1181 printk(KERN_ERR "%s: declance_init called with unknown type\n",
1182 name);
1183 ret = -ENODEV;
1184 goto err_out_dev;
1185 }
1186
1187 ll = (struct lance_regs *) dev->base_addr;
1188 esar = (unsigned char *) esar_base;
1189
1190 /* prom checks */
1191 /* First, check for test pattern */
1192 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1193 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1194 printk(KERN_ERR
1195 "%s: Ethernet station address prom not found!\n",
1196 name);
1197 ret = -ENODEV;
1198 goto err_out_resource;
1199 }
1200 /* Check the prom contents */
1201 for (i = 0; i < 8; i++) {
1202 if (esar[i * 4] != esar[0x3c - i * 4] &&
1203 esar[i * 4] != esar[0x40 + i * 4] &&
1204 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1205 printk(KERN_ERR "%s: Something is wrong with the "
1206 "ethernet station address prom!\n", name);
1207 ret = -ENODEV;
1208 goto err_out_resource;
1209 }
1210 }
1211
1212 /* Copy the ethernet address to the device structure, later to the
1213 * lance initialization block so the lance gets it every time it's
1214 * (re)initialized.
1215 */
1216 switch (type) {
1217 case ASIC_LANCE:
1218 printk("%s: IOASIC onboard LANCE", name);
1219 break;
1220 case PMAD_LANCE:
1221 printk("%s: PMAD-AA", name);
1222 break;
1223 case PMAX_LANCE:
1224 printk("%s: PMAX onboard LANCE", name);
1225 break;
1226 }
1227 for (i = 0; i < 6; i++)
1228 dev->dev_addr[i] = esar[i * 4];
1229
1230 printk(", addr = %pM, irq = %d\n", dev->dev_addr, dev->irq);
1231
1232 dev->netdev_ops = &lance_netdev_ops;
1233 dev->watchdog_timeo = 5*HZ;
1234
1235 /* lp->ll is the location of the registers for lance card */
1236 lp->ll = ll;
1237
1238 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1239 * specification.
1240 */
1241 lp->busmaster_regval = 0;
1242
1243 dev->dma = 0;
1244
1245 /* We cannot sleep if the chip is busy during a
1246 * multicast list update event, because such events
1247 * can occur from interrupts (ex. IPv6). So we
1248 * use a timer to try again later when necessary. -DaveM
1249 */
1250 init_timer(&lp->multicast_timer);
1251 lp->multicast_timer.data = (unsigned long) dev;
1252 lp->multicast_timer.function = lance_set_multicast_retry;
1253
1254 ret = register_netdev(dev);
1255 if (ret) {
1256 printk(KERN_ERR
1257 "%s: Unable to register netdev, aborting.\n", name);
1258 goto err_out_resource;
1259 }
1260
1261 if (!bdev) {
1262 lp->next = root_lance_dev;
1263 root_lance_dev = dev;
1264 }
1265
1266 printk("%s: registered as %s.\n", name, dev->name);
1267 return 0;
1268
1269 err_out_resource:
1270 if (bdev)
1271 release_mem_region(start, len);
1272
1273 err_out_dev:
1274 free_netdev(dev);
1275
1276 err_out:
1277 return ret;
1278 }
1279
1280 static void __exit dec_lance_remove(struct device *bdev)
1281 {
1282 struct net_device *dev = dev_get_drvdata(bdev);
1283 resource_size_t start, len;
1284
1285 unregister_netdev(dev);
1286 start = to_tc_dev(bdev)->resource.start;
1287 len = to_tc_dev(bdev)->resource.end - start + 1;
1288 release_mem_region(start, len);
1289 free_netdev(dev);
1290 }
1291
1292 /* Find all the lance cards on the system and initialize them */
1293 static int __init dec_lance_platform_probe(void)
1294 {
1295 int count = 0;
1296
1297 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1298 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1299 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0)
1300 count++;
1301 } else if (!TURBOCHANNEL) {
1302 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0)
1303 count++;
1304 }
1305 }
1306
1307 return (count > 0) ? 0 : -ENODEV;
1308 }
1309
1310 static void __exit dec_lance_platform_remove(void)
1311 {
1312 while (root_lance_dev) {
1313 struct net_device *dev = root_lance_dev;
1314 struct lance_private *lp = netdev_priv(dev);
1315
1316 unregister_netdev(dev);
1317 root_lance_dev = lp->next;
1318 free_netdev(dev);
1319 }
1320 }
1321
1322 #ifdef CONFIG_TC
1323 static int dec_lance_tc_probe(struct device *dev);
1324 static int __exit dec_lance_tc_remove(struct device *dev);
1325
1326 static const struct tc_device_id dec_lance_tc_table[] = {
1327 { "DEC ", "PMAD-AA " },
1328 { }
1329 };
1330 MODULE_DEVICE_TABLE(tc, dec_lance_tc_table);
1331
1332 static struct tc_driver dec_lance_tc_driver = {
1333 .id_table = dec_lance_tc_table,
1334 .driver = {
1335 .name = "declance",
1336 .bus = &tc_bus_type,
1337 .probe = dec_lance_tc_probe,
1338 .remove = __exit_p(dec_lance_tc_remove),
1339 },
1340 };
1341
1342 static int dec_lance_tc_probe(struct device *dev)
1343 {
1344 int status = dec_lance_probe(dev, PMAD_LANCE);
1345 if (!status)
1346 get_device(dev);
1347 return status;
1348 }
1349
1350 static int __exit dec_lance_tc_remove(struct device *dev)
1351 {
1352 put_device(dev);
1353 dec_lance_remove(dev);
1354 return 0;
1355 }
1356 #endif
1357
1358 static int __init dec_lance_init(void)
1359 {
1360 int status;
1361
1362 status = tc_register_driver(&dec_lance_tc_driver);
1363 if (!status)
1364 dec_lance_platform_probe();
1365 return status;
1366 }
1367
1368 static void __exit dec_lance_exit(void)
1369 {
1370 dec_lance_platform_remove();
1371 tc_unregister_driver(&dec_lance_tc_driver);
1372 }
1373
1374
1375 module_init(dec_lance_init);
1376 module_exit(dec_lance_exit);
Linux with added FPC-III support