3 The expectations of individual ACPI tables are discussed in the list that
6 If a section number is used, it refers to a section number in the ACPI
7 specification where the object is defined. If "Signature Reserved" is used,
8 the table signature (the first four bytes of the table) is the only portion
9 of the table recognized by the specification, and the actual table is defined
10 outside of the UEFI Forum (see Section 5.2.6 of the specification).
12 For ACPI on arm64, tables also fall into the following categories:
14 -- Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
16 -- Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
18 -- Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, IORT,
19 MCHI, MPST, MSCT, NFIT, PMTT, RASF, SBST, SLIT, SPMI, SRAT, STAO,
20 TCPA, TPM2, UEFI, XENV
22 -- Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IBFT, IVRS, LPIT,
23 MSDM, OEMx, PSDT, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
25 Table Usage for ARMv8 Linux
26 ----- ----------------------------------------------------------------
27 BERT Section 18.3 (signature == "BERT")
28 == Boot Error Record Table ==
29 Must be supplied if RAS support is provided by the platform. It
30 is recommended this table be supplied.
32 BOOT Signature Reserved (signature == "BOOT")
33 == simple BOOT flag table ==
34 Microsoft only table, will not be supported.
36 BGRT Section 5.2.22 (signature == "BGRT")
37 == Boot Graphics Resource Table ==
38 Optional, not currently supported, with no real use-case for an
41 CPEP Section 5.2.18 (signature == "CPEP")
42 == Corrected Platform Error Polling table ==
43 Optional, not currently supported, and not recommended until such
44 time as ARM-compatible hardware is available, and the specification
47 CSRT Signature Reserved (signature == "CSRT")
48 == Core System Resources Table ==
49 Optional, not currently supported.
51 DBG2 Signature Reserved (signature == "DBG2")
52 == DeBuG port table 2 ==
53 License has changed and should be usable. Optional if used instead
54 of earlycon=<device> on the command line.
56 DBGP Signature Reserved (signature == "DBGP")
57 == DeBuG Port table ==
58 Microsoft only table, will not be supported.
60 DSDT Section 5.2.11.1 (signature == "DSDT")
61 == Differentiated System Description Table ==
62 A DSDT is required; see also SSDT.
64 ACPI tables contain only one DSDT but can contain one or more SSDTs,
65 which are optional. Each SSDT can only add to the ACPI namespace,
66 but cannot modify or replace anything in the DSDT.
68 DMAR Signature Reserved (signature == "DMAR")
69 == DMA Remapping table ==
70 x86 only table, will not be supported.
72 DRTM Signature Reserved (signature == "DRTM")
73 == Dynamic Root of Trust for Measurement table ==
74 Optional, not currently supported.
76 ECDT Section 5.2.16 (signature == "ECDT")
77 == Embedded Controller Description Table ==
78 Optional, not currently supported, but could be used on ARM if and
79 only if one uses the GPE_BIT field to represent an IRQ number, since
80 there are no GPE blocks defined in hardware reduced mode. This would
81 need to be modified in the ACPI specification.
83 EINJ Section 18.6 (signature == "EINJ")
84 == Error Injection table ==
85 This table is very useful for testing platform response to error
86 conditions; it allows one to inject an error into the system as
87 if it had actually occurred. However, this table should not be
88 shipped with a production system; it should be dynamically loaded
89 and executed with the ACPICA tools only during testing.
91 ERST Section 18.5 (signature == "ERST")
92 == Error Record Serialization Table ==
93 On a platform supports RAS, this table must be supplied if it is not
94 UEFI-based; if it is UEFI-based, this table may be supplied. When this
95 table is not present, UEFI run time service will be utilized to save
96 and retrieve hardware error information to and from a persistent store.
98 ETDT Signature Reserved (signature == "ETDT")
99 == Event Timer Description Table ==
100 Obsolete table, will not be supported.
102 FACS Section 5.2.10 (signature == "FACS")
103 == Firmware ACPI Control Structure ==
104 It is unlikely that this table will be terribly useful. If it is
105 provided, the Global Lock will NOT be used since it is not part of
106 the hardware reduced profile, and only 64-bit address fields will
109 FADT Section 5.2.9 (signature == "FACP")
110 == Fixed ACPI Description Table ==
113 The HW_REDUCED_ACPI flag must be set. All of the fields that are
114 to be ignored when HW_REDUCED_ACPI is set are expected to be set to
117 If an FACS table is provided, the X_FIRMWARE_CTRL field is to be
118 used, not FIRMWARE_CTRL.
120 If PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is
121 filled in properly -- that the PSCI_COMPLIANT flag is set and that
122 PSCI_USE_HVC is set or unset as needed (see table 5-37).
124 For the DSDT that is also required, the X_DSDT field is to be used,
127 FPDT Section 5.2.23 (signature == "FPDT")
128 == Firmware Performance Data Table ==
129 Optional, not currently supported.
131 GTDT Section 5.2.24 (signature == "GTDT")
132 == Generic Timer Description Table ==
135 HEST Section 18.3.2 (signature == "HEST")
136 == Hardware Error Source Table ==
137 ARM-specific error sources have been defined; please use those or the
138 PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER
139 Bridge), or use type 9 (Generic Hardware Error Source). Firmware first
140 error handling is possible if and only if Trusted Firmware is being
143 Must be supplied if RAS support is provided by the platform. It
144 is recommended this table be supplied.
146 HPET Signature Reserved (signature == "HPET")
147 == High Precision Event timer Table ==
148 x86 only table, will not be supported.
150 IBFT Signature Reserved (signature == "IBFT")
151 == iSCSI Boot Firmware Table ==
152 Microsoft defined table, support TBD.
154 IORT Signature Reserved (signature == "IORT")
155 == Input Output Remapping Table ==
156 arm64 only table, required in order to describe IO topology, SMMUs,
157 and GIC ITSs, and how those various components are connected together,
158 such as identifying which components are behind which SMMUs/ITSs.
159 This table will only be required on certain SBSA platforms (e.g.,
160 when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it
163 IVRS Signature Reserved (signature == "IVRS")
164 == I/O Virtualization Reporting Structure ==
165 x86_64 (AMD) only table, will not be supported.
167 LPIT Signature Reserved (signature == "LPIT")
168 == Low Power Idle Table ==
169 x86 only table as of ACPI 5.1; starting with ACPI 6.0, processor
170 descriptions and power states on ARM platforms should use the DSDT
171 and define processor container devices (_HID ACPI0010, Section 8.4,
172 and more specifically 8.4.3 and and 8.4.4).
174 MADT Section 5.2.12 (signature == "APIC")
175 == Multiple APIC Description Table ==
176 Required for arm64. Only the GIC interrupt controller structures
177 should be used (types 0xA - 0xF).
179 MCFG Signature Reserved (signature == "MCFG")
180 == Memory-mapped ConFiGuration space ==
181 If the platform supports PCI/PCIe, an MCFG table is required.
183 MCHI Signature Reserved (signature == "MCHI")
184 == Management Controller Host Interface table ==
185 Optional, not currently supported.
187 MPST Section 5.2.21 (signature == "MPST")
188 == Memory Power State Table ==
189 Optional, not currently supported.
191 MSCT Section 5.2.19 (signature == "MSCT")
192 == Maximum System Characteristic Table ==
193 Optional, not currently supported.
195 MSDM Signature Reserved (signature == "MSDM")
196 == Microsoft Data Management table ==
197 Microsoft only table, will not be supported.
199 NFIT Section 5.2.25 (signature == "NFIT")
200 == NVDIMM Firmware Interface Table ==
201 Optional, not currently supported.
203 OEMx Signature of "OEMx" only
204 == OEM Specific Tables ==
205 All tables starting with a signature of "OEM" are reserved for OEM
206 use. Since these are not meant to be of general use but are limited
207 to very specific end users, they are not recommended for use and are
208 not supported by the kernel for arm64.
210 PCCT Section 14.1 (signature == "PCCT)
211 == Platform Communications Channel Table ==
212 Recommend for use on arm64; use of PCC is recommended when using CPPC
213 to control performance and power for platform processors.
215 PMTT Section 5.2.21.12 (signature == "PMTT")
216 == Platform Memory Topology Table ==
217 Optional, not currently supported.
219 PSDT Section 5.2.11.3 (signature == "PSDT")
220 == Persistent System Description Table ==
221 Obsolete table, will not be supported.
223 RASF Section 5.2.20 (signature == "RASF")
224 == RAS Feature table ==
225 Optional, not currently supported.
227 RSDP Section 5.2.5 (signature == "RSD PTR")
228 == Root System Description PoinTeR ==
231 RSDT Section 5.2.7 (signature == "RSDT")
232 == Root System Description Table ==
233 Since this table can only provide 32-bit addresses, it is deprecated
234 on arm64, and will not be used. If provided, it will be ignored.
236 SBST Section 5.2.14 (signature == "SBST")
237 == Smart Battery Subsystem Table ==
238 Optional, not currently supported.
240 SLIC Signature Reserved (signature == "SLIC")
241 == Software LIcensing table ==
242 Microsoft only table, will not be supported.
244 SLIT Section 5.2.17 (signature == "SLIT")
245 == System Locality distance Information Table ==
246 Optional in general, but required for NUMA systems.
248 SPCR Signature Reserved (signature == "SPCR")
249 == Serial Port Console Redirection table ==
252 SPMI Signature Reserved (signature == "SPMI")
253 == Server Platform Management Interface table ==
254 Optional, not currently supported.
256 SRAT Section 5.2.16 (signature == "SRAT")
257 == System Resource Affinity Table ==
258 Optional, but if used, only the GICC Affinity structures are read.
259 To support arm64 NUMA, this table is required.
261 SSDT Section 5.2.11.2 (signature == "SSDT")
262 == Secondary System Description Table ==
263 These tables are a continuation of the DSDT; these are recommended
264 for use with devices that can be added to a running system, but can
265 also serve the purpose of dividing up device descriptions into more
268 An SSDT can only ADD to the ACPI namespace. It cannot modify or
269 replace existing device descriptions already in the namespace.
271 These tables are optional, however. ACPI tables should contain only
272 one DSDT but can contain many SSDTs.
274 STAO Signature Reserved (signature == "STAO")
275 == _STA Override table ==
276 Optional, but only necessary in virtualized environments in order to
277 hide devices from guest OSs.
279 TCPA Signature Reserved (signature == "TCPA")
280 == Trusted Computing Platform Alliance table ==
281 Optional, not currently supported, and may need changes to fully
282 interoperate with arm64.
284 TPM2 Signature Reserved (signature == "TPM2")
285 == Trusted Platform Module 2 table ==
286 Optional, not currently supported, and may need changes to fully
287 interoperate with arm64.
289 UEFI Signature Reserved (signature == "UEFI")
290 == UEFI ACPI data table ==
291 Optional, not currently supported. No known use case for arm64,
294 WAET Signature Reserved (signature == "WAET")
295 == Windows ACPI Emulated devices Table ==
296 Microsoft only table, will not be supported.
298 WDAT Signature Reserved (signature == "WDAT")
299 == Watch Dog Action Table ==
300 Microsoft only table, will not be supported.
302 WDRT Signature Reserved (signature == "WDRT")
303 == Watch Dog Resource Table ==
304 Microsoft only table, will not be supported.
306 WPBT Signature Reserved (signature == "WPBT")
307 == Windows Platform Binary Table ==
308 Microsoft only table, will not be supported.
310 XENV Signature Reserved (signature == "XENV")
311 == Xen project table ==
312 Optional, used only by Xen at present.
314 XSDT Section 5.2.8 (signature == "XSDT")
315 == eXtended System Description Table ==
321 The expectations on individual ACPI objects that are likely to be used are
322 shown in the list that follows; any object not explicitly mentioned below
323 should be used as needed for a particular platform or particular subsystem,
324 such as power management or PCI.
326 Name Section Usage for ARMv8 Linux
327 ---- ------------ -------------------------------------------------
328 _CCA 6.2.17 This method must be defined for all bus masters
329 on arm64 -- there are no assumptions made about
330 whether such devices are cache coherent or not.
331 The _CCA value is inherited by all descendants of
332 these devices so it does not need to be repeated.
333 Without _CCA on arm64, the kernel does not know what
334 to do about setting up DMA for the device.
336 NB: this method provides default cache coherency
337 attributes; the presence of an SMMU can be used to
338 modify that, however. For example, a master could
339 default to non-coherent, but be made coherent with
340 the appropriate SMMU configuration (see Table 17 of
341 the IORT specification, ARM Document DEN 0049B).
343 _CID 6.1.2 Use as needed, see also _HID.
345 _CLS 6.1.3 Use as needed, see also _HID.
347 _CPC 8.4.7.1 Use as needed, power management specific. CPPC is
348 recommended on arm64.
350 _CRS 6.2.2 Required on arm64.
352 _CSD 8.4.2.2 Use as needed, used only in conjunction with _CST.
354 _CST 8.4.2.1 Low power idle states (8.4.4) are recommended instead
357 _DDN 6.1.4 This field can be used for a device name. However,
358 it is meant for DOS device names (e.g., COM1), so be
359 careful of its use across OSes.
361 _DSD 6.2.5 To be used with caution. If this object is used, try
362 to use it within the constraints already defined by the
363 Device Properties UUID. Only in rare circumstances
364 should it be necessary to create a new _DSD UUID.
366 In either case, submit the _DSD definition along with
367 any driver patches for discussion, especially when
368 device properties are used. A driver will not be
369 considered complete without a corresponding _DSD
370 description. Once approved by kernel maintainers,
371 the UUID or device properties must then be registered
372 with the UEFI Forum; this may cause some iteration as
373 more than one OS will be registering entries.
375 _DSM 9.1.1 Do not use this method. It is not standardized, the
376 return values are not well documented, and it is
377 currently a frequent source of error.
379 \_GL 5.7.1 This object is not to be used in hardware reduced
380 mode, and therefore should not be used on arm64.
382 _GLK 6.5.7 This object requires a global lock be defined; there
383 is no global lock on arm64 since it runs in hardware
384 reduced mode. Hence, do not use this object on arm64.
386 \_GPE 5.3.1 This namespace is for x86 use only. Do not use it
389 _HID 6.1.5 This is the primary object to use in device probing,
390 though _CID and _CLS may also be used.
392 _INI 6.5.1 Not required, but can be useful in setting up devices
393 when UEFI leaves them in a state that may not be what
394 the driver expects before it starts probing.
396 _LPI 8.4.4.3 Recommended for use with processor definitions (_HID
397 ACPI0010) on arm64. See also _RDI.
399 _MLS 6.1.7 Highly recommended for use in internationalization.
401 _OFF 7.2.2 It is recommended to define this method for any device
402 that can be turned on or off.
404 _ON 7.2.3 It is recommended to define this method for any device
405 that can be turned on or off.
407 \_OS 5.7.3 This method will return "Linux" by default (this is
408 the value of the macro ACPI_OS_NAME on Linux). The
409 command line parameter acpi_os=<string> can be used
410 to set it to some other value.
412 _OSC 6.2.11 This method can be a global method in ACPI (i.e.,
413 \_SB._OSC), or it may be associated with a specific
414 device (e.g., \_SB.DEV0._OSC), or both. When used
415 as a global method, only capabilities published in
416 the ACPI specification are allowed. When used as
417 a device-specific method, the process described for
418 using _DSD MUST be used to create an _OSC definition;
419 out-of-process use of _OSC is not allowed. That is,
420 submit the device-specific _OSC usage description as
421 part of the kernel driver submission, get it approved
422 by the kernel community, then register it with the
425 \_OSI 5.7.2 Deprecated on ARM64. As far as ACPI firmware is
426 concerned, _OSI is not to be used to determine what
427 sort of system is being used or what functionality
428 is provided. The _OSC method is to be used instead.
430 _PDC 8.4.1 Deprecated, do not use on arm64.
432 \_PIC 5.8.1 The method should not be used. On arm64, the only
433 interrupt model available is GIC.
435 \_PR 5.3.1 This namespace is for x86 use only on legacy systems.
436 Do not use it on arm64.
438 _PRT 6.2.13 Required as part of the definition of all PCI root
441 _PRx 7.3.8-11 Use as needed; power management specific. If _PR0 is
442 defined, _PR3 must also be defined.
444 _PSx 7.3.2-5 Use as needed; power management specific. If _PS0 is
445 defined, _PS3 must also be defined. If clocks or
446 regulators need adjusting to be consistent with power
447 usage, change them in these methods.
449 _RDI 8.4.4.4 Recommended for use with processor definitions (_HID
450 ACPI0010) on arm64. This should only be used in
451 conjunction with _LPI.
453 \_REV 5.7.4 Always returns the latest version of ACPI supported.
455 \_SB 5.3.1 Required on arm64; all devices must be defined in this
458 _SLI 6.2.15 Use is recommended when SLIT table is in use.
460 _STA 6.3.7, It is recommended to define this method for any device
461 7.2.4 that can be turned on or off. See also the STAO table
462 that provides overrides to hide devices in virtualized
465 _SRS 6.2.16 Use as needed; see also _PRS.
467 _STR 6.1.10 Recommended for conveying device names to end users;
468 this is preferred over using _DDN.
470 _SUB 6.1.9 Use as needed; _HID or _CID are preferred.
472 _SUN 6.1.11 Use as needed, but recommended.
474 _SWS 7.4.3 Use as needed; power management specific; this may
475 require specification changes for use on arm64.
477 _UID 6.1.12 Recommended for distinguishing devices of the same
478 class; define it if at all possible.
485 Do not use GPE block devices; these are not supported in the hardware reduced
486 profile used by arm64. Since there are no GPE blocks defined for use on ARM
487 platforms, ACPI events must be signaled differently.
489 There are two options: GPIO-signaled interrupts (Section 5.6.5), and
490 interrupt-signaled events (Section 5.6.9). Interrupt-signaled events are a
491 new feature in the ACPI 6.1 specification. Either -- or both -- can be used
492 on a given platform, and which to use may be dependent of limitations in any
493 given SoC. If possible, interrupt-signaled events are recommended.
496 ACPI Processor Control
497 ----------------------
498 Section 8 of the ACPI specification changed significantly in version 6.0.
499 Processors should now be defined as Device objects with _HID ACPI0007; do
500 not use the deprecated Processor statement in ASL. All multiprocessor systems
501 should also define a hierarchy of processors, done with Processor Container
502 Devices (see Section 8.4.3.1, _HID ACPI0010); do not use processor aggregator
503 devices (Section 8.5) to describe processor topology. Section 8.4 of the
504 specification describes the semantics of these object definitions and how
507 Most importantly, the processor hierarchy defined also defines the low power
508 idle states that are available to the platform, along with the rules for
509 determining which processors can be turned on or off and the circumstances
510 that control that. Without this information, the processors will run in
511 whatever power state they were left in by UEFI.
513 Note too, that the processor Device objects defined and the entries in the
514 MADT for GICs are expected to be in synchronization. The _UID of the Device
515 object must correspond to processor IDs used in the MADT.
517 It is recommended that CPPC (8.4.5) be used as the primary model for processor
518 performance control on arm64. C-states and P-states may become available at
519 some point in the future, but most current design work appears to favor CPPC.
521 Further, it is essential that the ARMv8 SoC provide a fully functional
522 implementation of PSCI; this will be the only mechanism supported by ACPI
523 to control CPU power state. Booting of secondary CPUs using the ACPI
524 parking protocol is possible, but discouraged, since only PSCI is supported
528 ACPI System Address Map Interfaces
529 ----------------------------------
530 In Section 15 of the ACPI specification, several methods are mentioned as
531 possible mechanisms for conveying memory resource information to the kernel.
532 For arm64, we will only support UEFI for booting with ACPI, hence the UEFI
533 GetMemoryMap() boot service is the only mechanism that will be used.
536 ACPI Platform Error Interfaces (APEI)
537 -------------------------------------
538 The APEI tables supported are described above.
540 APEI requires the equivalent of an SCI and an NMI on ARMv8. The SCI is used
541 to notify the OSPM of errors that have occurred but can be corrected and the
542 system can continue correct operation, even if possibly degraded. The NMI is
543 used to indicate fatal errors that cannot be corrected, and require immediate
546 Since there is no direct equivalent of the x86 SCI or NMI, arm64 handles
547 these slightly differently. The SCI is handled as a high priority interrupt;
548 given that these are corrected (or correctable) errors being reported, this
549 is sufficient. The NMI is emulated as the highest priority interrupt
550 possible. This implies some caution must be used since there could be
551 interrupts at higher privilege levels or even interrupts at the same priority
552 as the emulated NMI. In Linux, this should not be the case but one should
553 be aware it could happen.
556 ACPI Objects Not Supported on ARM64
557 -----------------------------------
558 While this may change in the future, there are several classes of objects
559 that can be defined, but are not currently of general interest to ARM servers.
560 Some of these objects have x86 equivalents, and may actually make sense in ARM
561 servers. However, there is either no hardware available at present, or there
562 may not even be a non-ARM implementation yet. Hence, they are not currently
565 The following classes of objects are not supported:
567 -- Section 9.2: ambient light sensor devices
569 -- Section 9.3: battery devices
571 -- Section 9.4: lids (e.g., laptop lids)
573 -- Section 9.8.2: IDE controllers
575 -- Section 9.9: floppy controllers
577 -- Section 9.10: GPE block devices
579 -- Section 9.15: PC/AT RTC/CMOS devices
581 -- Section 9.16: user presence detection devices
583 -- Section 9.17: I/O APIC devices; all GICs must be enumerable via MADT
585 -- Section 9.18: time and alarm devices (see 9.15)
587 -- Section 10: power source and power meter devices
589 -- Section 11: thermal management
591 -- Section 12: embedded controllers interface
593 -- Section 13: SMBus interfaces
596 This also means that there is no support for the following objects:
598 Name Section Name Section
599 ---- ------------ ---- ------------
600 _ALC 9.3.4 _FDM 9.10.3
601 _ALI 9.3.2 _FIX 6.2.7
602 _ALP 9.3.6 _GAI 10.4.5
603 _ALR 9.3.5 _GHL 10.4.7
604 _ALT 9.3.3 _GTM 9.9.2.1.1
605 _BCT 10.2.2.10 _LID 9.5.1
606 _BDN 6.5.3 _PAI 10.4.4
607 _BIF 10.2.2.1 _PCL 10.3.2
608 _BIX 10.2.2.1 _PIF 10.3.3
609 _BLT 9.2.3 _PMC 10.4.1
610 _BMA 10.2.2.4 _PMD 10.4.8
611 _BMC 10.2.2.12 _PMM 10.4.3
612 _BMD 10.2.2.11 _PRL 10.3.4
613 _BMS 10.2.2.5 _PSR 10.3.1
614 _BST 10.2.2.6 _PTP 10.4.2
615 _BTH 10.2.2.7 _SBS 10.1.3
616 _BTM 10.2.2.9 _SHL 10.4.6
617 _BTP 10.2.2.8 _STM 9.9.2.1.1
618 _DCK 6.5.2 _UPD 9.16.1
619 _EC 12.12 _UPP 9.16.2
620 _FDE 9.10.1 _WPC 10.5.2
621 _FDI 9.10.2 _WPP 10.5.3