m68k: Skip futex_atomic_cmpxchg_inatomic() test
[linux/fpc-iii.git] / arch / arm / mach-msm / board-qsd8x50.c
blob9169ec324a43dc88f9cdf5d22f1a6adfac6c9187
1 /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
17 #include <linux/gpio.h>
18 #include <linux/kernel.h>
19 #include <linux/irq.h>
20 #include <linux/platform_device.h>
21 #include <linux/delay.h>
22 #include <linux/usb/msm_hsusb.h>
23 #include <linux/err.h>
24 #include <linux/clkdev.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/io.h>
29 #include <asm/setup.h>
31 #include <mach/irqs.h>
32 #include <mach/sirc.h>
33 #include <mach/vreg.h>
34 #include <mach/clk.h>
35 #include <linux/platform_data/mmc-msm_sdcc.h>
37 #include "devices.h"
38 #include "common.h"
40 static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
41 static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156;
43 /* Leave smc91x resources empty here, as we'll fill them in
44 * at run-time: they vary from board to board, and the true
45 * configuration won't be known until boot.
47 static struct resource smc91x_resources[] = {
48 [0] = {
49 .flags = IORESOURCE_MEM,
51 [1] = {
52 .flags = IORESOURCE_IRQ,
56 static struct platform_device smc91x_device = {
57 .name = "smc91x",
58 .id = 0,
59 .num_resources = ARRAY_SIZE(smc91x_resources),
60 .resource = smc91x_resources,
63 static int __init msm_init_smc91x(void)
65 if (machine_is_qsd8x50_surf()) {
66 smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
67 smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff;
68 smc91x_resources[1].start =
69 gpio_to_irq(qsd8x50_surf_smc91x_gpio);
70 smc91x_resources[1].end =
71 gpio_to_irq(qsd8x50_surf_smc91x_gpio);
72 platform_device_register(&smc91x_device);
75 return 0;
77 module_init(msm_init_smc91x);
79 static int hsusb_phy_init_seq[] = {
80 0x08, 0x31, /* Increase HS Driver Amplitude */
81 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */
85 static int hsusb_link_clk_reset(struct clk *link_clk, bool assert)
87 int ret;
89 if (assert) {
90 ret = clk_reset(link_clk, CLK_RESET_ASSERT);
91 if (ret)
92 pr_err("usb hs_clk assert failed\n");
93 } else {
94 ret = clk_reset(link_clk, CLK_RESET_DEASSERT);
95 if (ret)
96 pr_err("usb hs_clk deassert failed\n");
98 return ret;
101 static int hsusb_phy_clk_reset(struct clk *phy_clk)
103 int ret;
105 ret = clk_reset(phy_clk, CLK_RESET_ASSERT);
106 if (ret) {
107 pr_err("usb phy clk assert failed\n");
108 return ret;
110 usleep_range(10000, 12000);
111 ret = clk_reset(phy_clk, CLK_RESET_DEASSERT);
112 if (ret)
113 pr_err("usb phy clk deassert failed\n");
114 return ret;
117 static struct msm_otg_platform_data msm_otg_pdata = {
118 .phy_init_seq = hsusb_phy_init_seq,
119 .mode = USB_PERIPHERAL,
120 .otg_control = OTG_PHY_CONTROL,
121 .link_clk_reset = hsusb_link_clk_reset,
122 .phy_clk_reset = hsusb_phy_clk_reset,
125 static struct platform_device *devices[] __initdata = {
126 &msm_clock_8x50,
127 &msm_device_gpio_8x50,
128 &msm_device_uart3,
129 &msm_device_smd,
130 &msm_device_otg,
131 &msm_device_hsusb,
132 &msm_device_hsusb_host,
135 static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
136 {51, "sdc1_dat_3"},
137 {52, "sdc1_dat_2"},
138 {53, "sdc1_dat_1"},
139 {54, "sdc1_dat_0"},
140 {55, "sdc1_cmd"},
141 {56, "sdc1_clk"}
144 static struct vreg *vreg_mmc;
145 static unsigned long vreg_sts;
147 static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
149 int rc = 0;
150 struct platform_device *pdev;
152 pdev = container_of(dv, struct platform_device, dev);
154 if (vdd == 0) {
155 if (!vreg_sts)
156 return 0;
158 clear_bit(pdev->id, &vreg_sts);
160 if (!vreg_sts) {
161 rc = vreg_disable(vreg_mmc);
162 if (rc)
163 pr_err("vreg_mmc disable failed for slot "
164 "%d: %d\n", pdev->id, rc);
166 return 0;
169 if (!vreg_sts) {
170 rc = vreg_set_level(vreg_mmc, 2900);
171 if (rc)
172 pr_err("vreg_mmc set level failed for slot %d: %d\n",
173 pdev->id, rc);
174 rc = vreg_enable(vreg_mmc);
175 if (rc)
176 pr_err("vreg_mmc enable failed for slot %d: %d\n",
177 pdev->id, rc);
179 set_bit(pdev->id, &vreg_sts);
180 return 0;
183 static struct msm_mmc_gpio_data sdc1_gpio = {
184 .gpio = sdc1_gpio_cfg,
185 .size = ARRAY_SIZE(sdc1_gpio_cfg),
188 static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
189 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
190 .translate_vdd = msm_sdcc_setup_power,
191 .gpio_data = &sdc1_gpio,
194 static void __init qsd8x50_init_mmc(void)
196 vreg_mmc = vreg_get(NULL, "gp5");
198 if (IS_ERR(vreg_mmc)) {
199 pr_err("vreg get for vreg_mmc failed (%ld)\n",
200 PTR_ERR(vreg_mmc));
201 return;
204 msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
207 static void __init qsd8x50_map_io(void)
209 msm_map_qsd8x50_io();
212 static void __init qsd8x50_init_irq(void)
214 msm_init_irq();
215 msm_init_sirc();
218 static void __init qsd8x50_init(void)
220 msm_device_otg.dev.platform_data = &msm_otg_pdata;
221 msm_device_hsusb.dev.parent = &msm_device_otg.dev;
222 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
223 platform_add_devices(devices, ARRAY_SIZE(devices));
224 qsd8x50_init_mmc();
227 static void __init qsd8x50_init_late(void)
229 smd_debugfs_init();
232 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
233 .atag_offset = 0x100,
234 .map_io = qsd8x50_map_io,
235 .init_irq = qsd8x50_init_irq,
236 .init_machine = qsd8x50_init,
237 .init_late = qsd8x50_init_late,
238 .init_time = qsd8x50_timer_init,
239 MACHINE_END
241 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
242 .atag_offset = 0x100,
243 .map_io = qsd8x50_map_io,
244 .init_irq = qsd8x50_init_irq,
245 .init_machine = qsd8x50_init,
246 .init_late = qsd8x50_init_late,
247 .init_time = qsd8x50_timer_init,
248 MACHINE_END