2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
28 #include <linux/seq_file.h>
29 #include <linux/slab.h>
31 #include "radeon_drm.h"
32 #include "radeon_reg.h"
36 int radeon_debugfs_ib_init(struct radeon_device
*rdev
);
38 void radeon_ib_bogus_cleanup(struct radeon_device
*rdev
)
40 struct radeon_ib
*ib
, *n
;
42 list_for_each_entry_safe(ib
, n
, &rdev
->ib_pool
.bogus_ib
, list
) {
49 void radeon_ib_bogus_add(struct radeon_device
*rdev
, struct radeon_ib
*ib
)
51 struct radeon_ib
*bib
;
53 bib
= kmalloc(sizeof(*bib
), GFP_KERNEL
);
56 bib
->ptr
= vmalloc(ib
->length_dw
* 4);
57 if (bib
->ptr
== NULL
) {
61 memcpy(bib
->ptr
, ib
->ptr
, ib
->length_dw
* 4);
62 bib
->length_dw
= ib
->length_dw
;
63 mutex_lock(&rdev
->ib_pool
.mutex
);
64 list_add_tail(&bib
->list
, &rdev
->ib_pool
.bogus_ib
);
65 mutex_unlock(&rdev
->ib_pool
.mutex
);
71 int radeon_ib_get(struct radeon_device
*rdev
, struct radeon_ib
**ib
)
73 struct radeon_fence
*fence
;
74 struct radeon_ib
*nib
;
78 r
= radeon_fence_create(rdev
, &fence
);
80 dev_err(rdev
->dev
, "failed to create fence for new IB\n");
83 mutex_lock(&rdev
->ib_pool
.mutex
);
84 for (i
= rdev
->ib_pool
.head_id
, c
= 0, nib
= NULL
; c
< RADEON_IB_POOL_SIZE
; c
++, i
++) {
85 i
&= (RADEON_IB_POOL_SIZE
- 1);
86 if (rdev
->ib_pool
.ibs
[i
].free
) {
87 nib
= &rdev
->ib_pool
.ibs
[i
];
92 /* This should never happen, it means we allocated all
93 * IB and haven't scheduled one yet, return EBUSY to
94 * userspace hoping that on ioctl recall we get better
97 dev_err(rdev
->dev
, "no free indirect buffer !\n");
98 mutex_unlock(&rdev
->ib_pool
.mutex
);
99 radeon_fence_unref(&fence
);
102 rdev
->ib_pool
.head_id
= (nib
->idx
+ 1) & (RADEON_IB_POOL_SIZE
- 1);
105 mutex_unlock(&rdev
->ib_pool
.mutex
);
106 r
= radeon_fence_wait(nib
->fence
, false);
108 dev_err(rdev
->dev
, "error waiting fence of IB(%u:0x%016lX:%u)\n",
109 nib
->idx
, (unsigned long)nib
->gpu_addr
, nib
->length_dw
);
110 mutex_lock(&rdev
->ib_pool
.mutex
);
112 mutex_unlock(&rdev
->ib_pool
.mutex
);
113 radeon_fence_unref(&fence
);
116 mutex_lock(&rdev
->ib_pool
.mutex
);
118 radeon_fence_unref(&nib
->fence
);
121 mutex_unlock(&rdev
->ib_pool
.mutex
);
126 void radeon_ib_free(struct radeon_device
*rdev
, struct radeon_ib
**ib
)
128 struct radeon_ib
*tmp
= *ib
;
134 if (!tmp
->fence
->emited
)
135 radeon_fence_unref(&tmp
->fence
);
136 mutex_lock(&rdev
->ib_pool
.mutex
);
138 mutex_unlock(&rdev
->ib_pool
.mutex
);
141 int radeon_ib_schedule(struct radeon_device
*rdev
, struct radeon_ib
*ib
)
145 if (!ib
->length_dw
|| !rdev
->cp
.ready
) {
146 /* TODO: Nothings in the ib we should report. */
147 DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib
->idx
);
151 /* 64 dwords should be enough for fence too */
152 r
= radeon_ring_lock(rdev
, 64);
154 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r
);
157 radeon_ring_ib_execute(rdev
, ib
);
158 radeon_fence_emit(rdev
, ib
->fence
);
159 mutex_lock(&rdev
->ib_pool
.mutex
);
160 /* once scheduled IB is considered free and protected by the fence */
162 mutex_unlock(&rdev
->ib_pool
.mutex
);
163 radeon_ring_unlock_commit(rdev
);
167 int radeon_ib_pool_init(struct radeon_device
*rdev
)
174 if (rdev
->ib_pool
.robj
)
176 INIT_LIST_HEAD(&rdev
->ib_pool
.bogus_ib
);
177 /* Allocate 1M object buffer */
178 r
= radeon_bo_create(rdev
, NULL
, RADEON_IB_POOL_SIZE
*64*1024,
179 true, RADEON_GEM_DOMAIN_GTT
,
180 &rdev
->ib_pool
.robj
);
182 DRM_ERROR("radeon: failed to ib pool (%d).\n", r
);
185 r
= radeon_bo_reserve(rdev
->ib_pool
.robj
, false);
186 if (unlikely(r
!= 0))
188 r
= radeon_bo_pin(rdev
->ib_pool
.robj
, RADEON_GEM_DOMAIN_GTT
, &gpu_addr
);
190 radeon_bo_unreserve(rdev
->ib_pool
.robj
);
191 DRM_ERROR("radeon: failed to pin ib pool (%d).\n", r
);
194 r
= radeon_bo_kmap(rdev
->ib_pool
.robj
, &ptr
);
195 radeon_bo_unreserve(rdev
->ib_pool
.robj
);
197 DRM_ERROR("radeon: failed to map ib poll (%d).\n", r
);
200 for (i
= 0; i
< RADEON_IB_POOL_SIZE
; i
++) {
203 offset
= i
* 64 * 1024;
204 rdev
->ib_pool
.ibs
[i
].gpu_addr
= gpu_addr
+ offset
;
205 rdev
->ib_pool
.ibs
[i
].ptr
= ptr
+ offset
;
206 rdev
->ib_pool
.ibs
[i
].idx
= i
;
207 rdev
->ib_pool
.ibs
[i
].length_dw
= 0;
208 rdev
->ib_pool
.ibs
[i
].free
= true;
210 rdev
->ib_pool
.head_id
= 0;
211 rdev
->ib_pool
.ready
= true;
212 DRM_INFO("radeon: ib pool ready.\n");
213 if (radeon_debugfs_ib_init(rdev
)) {
214 DRM_ERROR("Failed to register debugfs file for IB !\n");
219 void radeon_ib_pool_fini(struct radeon_device
*rdev
)
223 if (!rdev
->ib_pool
.ready
) {
226 mutex_lock(&rdev
->ib_pool
.mutex
);
227 radeon_ib_bogus_cleanup(rdev
);
229 if (rdev
->ib_pool
.robj
) {
230 r
= radeon_bo_reserve(rdev
->ib_pool
.robj
, false);
231 if (likely(r
== 0)) {
232 radeon_bo_kunmap(rdev
->ib_pool
.robj
);
233 radeon_bo_unpin(rdev
->ib_pool
.robj
);
234 radeon_bo_unreserve(rdev
->ib_pool
.robj
);
236 radeon_bo_unref(&rdev
->ib_pool
.robj
);
237 rdev
->ib_pool
.robj
= NULL
;
239 mutex_unlock(&rdev
->ib_pool
.mutex
);
246 void radeon_ring_free_size(struct radeon_device
*rdev
)
248 if (rdev
->family
>= CHIP_R600
)
249 rdev
->cp
.rptr
= RREG32(R600_CP_RB_RPTR
);
251 rdev
->cp
.rptr
= RREG32(RADEON_CP_RB_RPTR
);
252 /* This works because ring_size is a power of 2 */
253 rdev
->cp
.ring_free_dw
= (rdev
->cp
.rptr
+ (rdev
->cp
.ring_size
/ 4));
254 rdev
->cp
.ring_free_dw
-= rdev
->cp
.wptr
;
255 rdev
->cp
.ring_free_dw
&= rdev
->cp
.ptr_mask
;
256 if (!rdev
->cp
.ring_free_dw
) {
257 rdev
->cp
.ring_free_dw
= rdev
->cp
.ring_size
/ 4;
261 int radeon_ring_lock(struct radeon_device
*rdev
, unsigned ndw
)
265 /* Align requested size with padding so unlock_commit can
267 ndw
= (ndw
+ rdev
->cp
.align_mask
) & ~rdev
->cp
.align_mask
;
268 mutex_lock(&rdev
->cp
.mutex
);
269 while (ndw
> (rdev
->cp
.ring_free_dw
- 1)) {
270 radeon_ring_free_size(rdev
);
271 if (ndw
< rdev
->cp
.ring_free_dw
) {
274 r
= radeon_fence_wait_next(rdev
);
276 mutex_unlock(&rdev
->cp
.mutex
);
280 rdev
->cp
.count_dw
= ndw
;
281 rdev
->cp
.wptr_old
= rdev
->cp
.wptr
;
285 void radeon_ring_unlock_commit(struct radeon_device
*rdev
)
287 unsigned count_dw_pad
;
290 /* We pad to match fetch size */
291 count_dw_pad
= (rdev
->cp
.align_mask
+ 1) -
292 (rdev
->cp
.wptr
& rdev
->cp
.align_mask
);
293 for (i
= 0; i
< count_dw_pad
; i
++) {
294 radeon_ring_write(rdev
, 2 << 30);
297 radeon_cp_commit(rdev
);
298 mutex_unlock(&rdev
->cp
.mutex
);
301 void radeon_ring_unlock_undo(struct radeon_device
*rdev
)
303 rdev
->cp
.wptr
= rdev
->cp
.wptr_old
;
304 mutex_unlock(&rdev
->cp
.mutex
);
307 int radeon_ring_init(struct radeon_device
*rdev
, unsigned ring_size
)
311 rdev
->cp
.ring_size
= ring_size
;
312 /* Allocate ring buffer */
313 if (rdev
->cp
.ring_obj
== NULL
) {
314 r
= radeon_bo_create(rdev
, NULL
, rdev
->cp
.ring_size
, true,
315 RADEON_GEM_DOMAIN_GTT
,
318 dev_err(rdev
->dev
, "(%d) ring create failed\n", r
);
321 r
= radeon_bo_reserve(rdev
->cp
.ring_obj
, false);
322 if (unlikely(r
!= 0))
324 r
= radeon_bo_pin(rdev
->cp
.ring_obj
, RADEON_GEM_DOMAIN_GTT
,
327 radeon_bo_unreserve(rdev
->cp
.ring_obj
);
328 dev_err(rdev
->dev
, "(%d) ring pin failed\n", r
);
331 r
= radeon_bo_kmap(rdev
->cp
.ring_obj
,
332 (void **)&rdev
->cp
.ring
);
333 radeon_bo_unreserve(rdev
->cp
.ring_obj
);
335 dev_err(rdev
->dev
, "(%d) ring map failed\n", r
);
339 rdev
->cp
.ptr_mask
= (rdev
->cp
.ring_size
/ 4) - 1;
340 rdev
->cp
.ring_free_dw
= rdev
->cp
.ring_size
/ 4;
344 void radeon_ring_fini(struct radeon_device
*rdev
)
348 mutex_lock(&rdev
->cp
.mutex
);
349 if (rdev
->cp
.ring_obj
) {
350 r
= radeon_bo_reserve(rdev
->cp
.ring_obj
, false);
351 if (likely(r
== 0)) {
352 radeon_bo_kunmap(rdev
->cp
.ring_obj
);
353 radeon_bo_unpin(rdev
->cp
.ring_obj
);
354 radeon_bo_unreserve(rdev
->cp
.ring_obj
);
356 radeon_bo_unref(&rdev
->cp
.ring_obj
);
357 rdev
->cp
.ring
= NULL
;
358 rdev
->cp
.ring_obj
= NULL
;
360 mutex_unlock(&rdev
->cp
.mutex
);
367 #if defined(CONFIG_DEBUG_FS)
368 static int radeon_debugfs_ib_info(struct seq_file
*m
, void *data
)
370 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
371 struct radeon_ib
*ib
= node
->info_ent
->data
;
377 seq_printf(m
, "IB %04u\n", ib
->idx
);
378 seq_printf(m
, "IB fence %p\n", ib
->fence
);
379 seq_printf(m
, "IB size %05u dwords\n", ib
->length_dw
);
380 for (i
= 0; i
< ib
->length_dw
; i
++) {
381 seq_printf(m
, "[%05u]=0x%08X\n", i
, ib
->ptr
[i
]);
386 static int radeon_debugfs_ib_bogus_info(struct seq_file
*m
, void *data
)
388 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
389 struct radeon_device
*rdev
= node
->info_ent
->data
;
390 struct radeon_ib
*ib
;
393 mutex_lock(&rdev
->ib_pool
.mutex
);
394 if (list_empty(&rdev
->ib_pool
.bogus_ib
)) {
395 mutex_unlock(&rdev
->ib_pool
.mutex
);
396 seq_printf(m
, "no bogus IB recorded\n");
399 ib
= list_first_entry(&rdev
->ib_pool
.bogus_ib
, struct radeon_ib
, list
);
400 list_del_init(&ib
->list
);
401 mutex_unlock(&rdev
->ib_pool
.mutex
);
402 seq_printf(m
, "IB size %05u dwords\n", ib
->length_dw
);
403 for (i
= 0; i
< ib
->length_dw
; i
++) {
404 seq_printf(m
, "[%05u]=0x%08X\n", i
, ib
->ptr
[i
]);
411 static struct drm_info_list radeon_debugfs_ib_list
[RADEON_IB_POOL_SIZE
];
412 static char radeon_debugfs_ib_names
[RADEON_IB_POOL_SIZE
][32];
414 static struct drm_info_list radeon_debugfs_ib_bogus_info_list
[] = {
415 {"radeon_ib_bogus", radeon_debugfs_ib_bogus_info
, 0, NULL
},
419 int radeon_debugfs_ib_init(struct radeon_device
*rdev
)
421 #if defined(CONFIG_DEBUG_FS)
425 radeon_debugfs_ib_bogus_info_list
[0].data
= rdev
;
426 r
= radeon_debugfs_add_files(rdev
, radeon_debugfs_ib_bogus_info_list
, 1);
429 for (i
= 0; i
< RADEON_IB_POOL_SIZE
; i
++) {
430 sprintf(radeon_debugfs_ib_names
[i
], "radeon_ib_%04u", i
);
431 radeon_debugfs_ib_list
[i
].name
= radeon_debugfs_ib_names
[i
];
432 radeon_debugfs_ib_list
[i
].show
= &radeon_debugfs_ib_info
;
433 radeon_debugfs_ib_list
[i
].driver_features
= 0;
434 radeon_debugfs_ib_list
[i
].data
= &rdev
->ib_pool
.ibs
[i
];
436 return radeon_debugfs_add_files(rdev
, radeon_debugfs_ib_list
,
437 RADEON_IB_POOL_SIZE
);