arch/m68k/bvme6000/config.c

   1 /*
   2  *  arch/m68k/bvme6000/config.c
   3  *
   4  *  Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
   5  *
   6  * Based on:
   7  *
   8  *  linux/amiga/config.c
   9  *
  10  *  Copyright (C) 1993 Hamish Macdonald
  11  *
  12  * This file is subject to the terms and conditions of the GNU General Public
  13  * License.  See the file README.legal in the main directory of this archive
  14  * for more details.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/tty.h>
  21 #include <linux/console.h>
  22 #include <linux/linkage.h>
  23 #include <linux/init.h>
  24 #include <linux/major.h>
  25 #include <linux/genhd.h>
  26 #include <linux/rtc.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bcd.h>
  29
  30 #include <asm/bootinfo.h>
  31 #include <asm/bootinfo-vme.h>
  32 #include <asm/byteorder.h>
  33 #include <asm/pgtable.h>
  34 #include <asm/setup.h>
  35 #include <asm/irq.h>
  36 #include <asm/traps.h>
  37 #include <asm/machdep.h>
  38 #include <asm/bvme6000hw.h>
  39
  40 static void bvme6000_get_model(char *model);
  41 extern void bvme6000_sched_init(irq_handler_t handler);
  42 extern u32 bvme6000_gettimeoffset(void);
  43 extern int bvme6000_hwclk (int, struct rtc_time *);
  44 extern void bvme6000_reset (void);
  45 void bvme6000_set_vectors (void);
  46
  47 /* Save tick handler routine pointer, will point to xtime_update() in
  48  * kernel/timer/timekeeping.c, called via bvme6000_process_int() */
  49
  50 static irq_handler_t tick_handler;
  51
  52
  53 int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
  54 {
  55         if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
  56                 return 0;
  57         else
  58                 return 1;
  59 }
  60
  61 void bvme6000_reset(void)
  62 {
  63         volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  64
  65         pr_info("\r\n\nCalled bvme6000_reset\r\n"
  66                 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  67         /* The string of returns is to delay the reset until the whole
  68          * message is output. */
  69         /* Enable the watchdog, via PIT port C bit 4 */
  70
  71         pit->pcddr      |= 0x10;        /* WDOG enable */
  72
  73         while(1)
  74                 ;
  75 }
  76
  77 static void bvme6000_get_model(char *model)
  78 {
  79     sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
  80 }
  81
  82 /*
  83  * This function is called during kernel startup to initialize
  84  * the bvme6000 IRQ handling routines.
  85  */
  86 static void __init bvme6000_init_IRQ(void)
  87 {
  88         m68k_setup_user_interrupt(VEC_USER, 192);
  89 }
  90
  91 void __init config_bvme6000(void)
  92 {
  93     volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  94
  95     /* Board type is only set by newer versions of vmelilo/tftplilo */
  96     if (!vme_brdtype) {
  97         if (m68k_cputype == CPU_68060)
  98             vme_brdtype = VME_TYPE_BVME6000;
  99         else
 100             vme_brdtype = VME_TYPE_BVME4000;
 101     }
 102 #if 0
 103     /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
 104      * debugger.  Note trap_init() will splat the abort vector, but
 105      * bvme6000_init_IRQ() will put it back again.  Hopefully. */
 106
 107     bvme6000_set_vectors();
 108 #endif
 109
 110     mach_max_dma_address = 0xffffffff;
 111     mach_sched_init      = bvme6000_sched_init;
 112     mach_init_IRQ        = bvme6000_init_IRQ;
 113     arch_gettimeoffset   = bvme6000_gettimeoffset;
 114     mach_hwclk           = bvme6000_hwclk;
 115     mach_reset           = bvme6000_reset;
 116     mach_get_model       = bvme6000_get_model;
 117
 118     pr_info("Board is %sconfigured as a System Controller\n",
 119             *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
 120
 121     /* Now do the PIT configuration */
 122
 123     pit->pgcr   = 0x00; /* Unidirectional 8 bit, no handshake for now */
 124     pit->psrr   = 0x18; /* PIACK and PIRQ functions enabled */
 125     pit->pacr   = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
 126     pit->padr   = 0x00; /* Just to be tidy! */
 127     pit->paddr  = 0x00; /* All inputs for now (safest) */
 128     pit->pbcr   = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
 129     pit->pbdr   = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
 130                         /* PRI, SYSCON?, Level3, SCC clks from xtal */
 131     pit->pbddr  = 0xf3; /* Mostly outputs */
 132     pit->pcdr   = 0x01; /* PA transceiver disabled */
 133     pit->pcddr  = 0x03; /* WDOG disable */
 134
 135     /* Disable snooping for Ethernet and VME accesses */
 136
 137     bvme_acr_addrctl = 0;
 138 }
 139
 140
 141 irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
 142 {
 143         unsigned long *new = (unsigned long *)vectors;
 144         unsigned long *old = (unsigned long *)0xf8000000;
 145
 146         /* Wait for button release */
 147         while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
 148                 ;
 149
 150         *(new+4) = *(old+4);            /* Illegal instruction */
 151         *(new+9) = *(old+9);            /* Trace */
 152         *(new+47) = *(old+47);          /* Trap #15 */
 153         *(new+0x1f) = *(old+0x1f);      /* ABORT switch */
 154         return IRQ_HANDLED;
 155 }
 156
 157
 158 static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
 159 {
 160     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
 161     unsigned char msr = rtc->msr & 0xc0;
 162
 163     rtc->msr = msr | 0x20;              /* Ack the interrupt */
 164
 165     return tick_handler(irq, dev_id);
 166 }
 167
 168 /*
 169  * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
 170  * (40000 x 125ns).  It will interrupt every 10ms, when T1 goes low.
 171  * So, when reading the elapsed time, you should read timer1,
 172  * subtract it from 39999, and then add 40000 if T1 is high.
 173  * That gives you the number of 125ns ticks in to the 10ms period,
 174  * so divide by 8 to get the microsecond result.
 175  */
 176
 177 void bvme6000_sched_init (irq_handler_t timer_routine)
 178 {
 179     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
 180     unsigned char msr = rtc->msr & 0xc0;
 181
 182     rtc->msr = 0;       /* Ensure timer registers accessible */
 183
 184     tick_handler = timer_routine;
 185     if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
 186                                 "timer", bvme6000_timer_int))
 187         panic ("Couldn't register timer int");
 188
 189     rtc->t1cr_omr = 0x04;       /* Mode 2, ext clk */
 190     rtc->t1msb = 39999 >> 8;
 191     rtc->t1lsb = 39999 & 0xff;
 192     rtc->irr_icr1 &= 0xef;      /* Route timer 1 to INTR pin */
 193     rtc->msr = 0x40;            /* Access int.cntrl, etc */
 194     rtc->pfr_icr0 = 0x80;       /* Just timer 1 ints enabled */
 195     rtc->irr_icr1 = 0;
 196     rtc->t1cr_omr = 0x0a;       /* INTR+T1 active lo, push-pull */
 197     rtc->t0cr_rtmr &= 0xdf;     /* Stop timers in standby */
 198     rtc->msr = 0;               /* Access timer 1 control */
 199     rtc->t1cr_omr = 0x05;       /* Mode 2, ext clk, GO */
 200
 201     rtc->msr = msr;
 202
 203     if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
 204                                 "abort", bvme6000_abort_int))
 205         panic ("Couldn't register abort int");
 206 }
 207
 208
 209 /* This is always executed with interrupts disabled.  */
 210
 211 /*
 212  * NOTE:  Don't accept any readings within 5us of rollover, as
 213  * the T1INT bit may be a little slow getting set.  There is also
 214  * a fault in the chip, meaning that reads may produce invalid
 215  * results...
 216  */
 217
 218 u32 bvme6000_gettimeoffset(void)
 219 {
 220     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
 221     volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
 222     unsigned char msr = rtc->msr & 0xc0;
 223     unsigned char t1int, t1op;
 224     u32 v = 800000, ov;
 225
 226     rtc->msr = 0;       /* Ensure timer registers accessible */
 227
 228     do {
 229         ov = v;
 230         t1int = rtc->msr & 0x20;
 231         t1op  = pit->pcdr & 0x04;
 232         rtc->t1cr_omr |= 0x40;          /* Latch timer1 */
 233         v = rtc->t1msb << 8;            /* Read timer1 */
 234         v |= rtc->t1lsb;                /* Read timer1 */
 235     } while (t1int != (rtc->msr & 0x20) ||
 236                 t1op != (pit->pcdr & 0x04) ||
 237                         abs(ov-v) > 80 ||
 238                                 v > 39960);
 239
 240     v = 39999 - v;
 241     if (!t1op)                          /* If in second half cycle.. */
 242         v += 40000;
 243     v /= 8;                             /* Convert ticks to microseconds */
 244     if (t1int)
 245         v += 10000;                     /* Int pending, + 10ms */
 246     rtc->msr = msr;
 247
 248     return v * 1000;
 249 }
 250
 251 /*
 252  * Looks like op is non-zero for setting the clock, and zero for
 253  * reading the clock.
 254  *
 255  *  struct hwclk_time {
 256  *         unsigned        sec;       0..59
 257  *         unsigned        min;       0..59
 258  *         unsigned        hour;      0..23
 259  *         unsigned        day;       1..31
 260  *         unsigned        mon;       0..11
 261  *         unsigned        year;      00...
 262  *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
 263  * };
 264  */
 265
 266 int bvme6000_hwclk(int op, struct rtc_time *t)
 267 {
 268         volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
 269         unsigned char msr = rtc->msr & 0xc0;
 270
 271         rtc->msr = 0x40;        /* Ensure clock and real-time-mode-register
 272                                  * are accessible */
 273         if (op)
 274         {       /* Write.... */
 275                 rtc->t0cr_rtmr = t->tm_year%4;
 276                 rtc->bcd_tenms = 0;
 277                 rtc->bcd_sec = bin2bcd(t->tm_sec);
 278                 rtc->bcd_min = bin2bcd(t->tm_min);
 279                 rtc->bcd_hr  = bin2bcd(t->tm_hour);
 280                 rtc->bcd_dom = bin2bcd(t->tm_mday);
 281                 rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
 282                 rtc->bcd_year = bin2bcd(t->tm_year%100);
 283                 if (t->tm_wday >= 0)
 284                         rtc->bcd_dow = bin2bcd(t->tm_wday+1);
 285                 rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
 286         }
 287         else
 288         {       /* Read....  */
 289                 do {
 290                         t->tm_sec  = bcd2bin(rtc->bcd_sec);
 291                         t->tm_min  = bcd2bin(rtc->bcd_min);
 292                         t->tm_hour = bcd2bin(rtc->bcd_hr);
 293                         t->tm_mday = bcd2bin(rtc->bcd_dom);
 294                         t->tm_mon  = bcd2bin(rtc->bcd_mth)-1;
 295                         t->tm_year = bcd2bin(rtc->bcd_year);
 296                         if (t->tm_year < 70)
 297                                 t->tm_year += 100;
 298                         t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
 299                 } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
 300         }
 301
 302         rtc->msr = msr;
 303
 304         return 0;
 305 }