arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36
  37 #include <linux/atomic.h>
  38 #include <asm/cpu.h>
  39 #include <asm/processor.h>
  40 #include <asm/idle.h>
  41 #include <asm/r4k-timer.h>
  42 #include <asm/mmu_context.h>
  43 #include <asm/time.h>
  44 #include <asm/setup.h>
  45
  46 #ifdef CONFIG_MIPS_MT_SMTC
  47 #include <asm/mipsmtregs.h>
  48 #endif /* CONFIG_MIPS_MT_SMTC */
  49
  50 volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
  51
  52 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  53 EXPORT_SYMBOL(__cpu_number_map);
  54
  55 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  56 EXPORT_SYMBOL(__cpu_logical_map);
  57
  58 /* Number of TCs (or siblings in Intel speak) per CPU core */
  59 int smp_num_siblings = 1;
  60 EXPORT_SYMBOL(smp_num_siblings);
  61
  62 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  63 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  64 EXPORT_SYMBOL(cpu_sibling_map);
  65
  66 /* representing cpus for which sibling maps can be computed */
  67 static cpumask_t cpu_sibling_setup_map;
  68
  69 static inline void set_cpu_sibling_map(int cpu)
  70 {
  71         int i;
  72
  73         cpu_set(cpu, cpu_sibling_setup_map);
  74
  75         if (smp_num_siblings > 1) {
  76                 for_each_cpu_mask(i, cpu_sibling_setup_map) {
  77                         if (cpu_data[cpu].core == cpu_data[i].core) {
  78                                 cpu_set(i, cpu_sibling_map[cpu]);
  79                                 cpu_set(cpu, cpu_sibling_map[i]);
  80                         }
  81                 }
  82         } else
  83                 cpu_set(cpu, cpu_sibling_map[cpu]);
  84 }
  85
  86 struct plat_smp_ops *mp_ops;
  87 EXPORT_SYMBOL(mp_ops);
  88
  89 void register_smp_ops(struct plat_smp_ops *ops)
  90 {
  91         if (mp_ops)
  92                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
  93
  94         mp_ops = ops;
  95 }
  96
  97 /*
  98  * First C code run on the secondary CPUs after being started up by
  99  * the master.
 100  */
 101 asmlinkage void start_secondary(void)
 102 {
 103         unsigned int cpu;
 104
 105 #ifdef CONFIG_MIPS_MT_SMTC
 106         /* Only do cpu_probe for first TC of CPU */
 107         if ((read_c0_tcbind() & TCBIND_CURTC) != 0)
 108                 __cpu_name[smp_processor_id()] = __cpu_name[0];
 109         else
 110 #endif /* CONFIG_MIPS_MT_SMTC */
 111         cpu_probe();
 112         cpu_report();
 113         per_cpu_trap_init(false);
 114         mips_clockevent_init();
 115         mp_ops->init_secondary();
 116
 117         /*
 118          * XXX parity protection should be folded in here when it's converted
 119          * to an option instead of something based on .cputype
 120          */
 121
 122         calibrate_delay();
 123         preempt_disable();
 124         cpu = smp_processor_id();
 125         cpu_data[cpu].udelay_val = loops_per_jiffy;
 126
 127         notify_cpu_starting(cpu);
 128
 129         set_cpu_online(cpu, true);
 130
 131         set_cpu_sibling_map(cpu);
 132
 133         cpu_set(cpu, cpu_callin_map);
 134
 135         synchronise_count_slave(cpu);
 136
 137         /*
 138          * irq will be enabled in ->smp_finish(), enabling it too early
 139          * is dangerous.
 140          */
 141         WARN_ON_ONCE(!irqs_disabled());
 142         mp_ops->smp_finish();
 143
 144         cpu_startup_entry(CPUHP_ONLINE);
 145 }
 146
 147 /*
 148  * Call into both interrupt handlers, as we share the IPI for them
 149  */
 150 void __irq_entry smp_call_function_interrupt(void)
 151 {
 152         irq_enter();
 153         generic_smp_call_function_interrupt();
 154         irq_exit();
 155 }
 156
 157 static void stop_this_cpu(void *dummy)
 158 {
 159         /*
 160          * Remove this CPU:
 161          */
 162         set_cpu_online(smp_processor_id(), false);
 163         for (;;) {
 164                 if (cpu_wait)
 165                         (*cpu_wait)();          /* Wait if available. */
 166         }
 167 }
 168
 169 void smp_send_stop(void)
 170 {
 171         smp_call_function(stop_this_cpu, NULL, 0);
 172 }
 173
 174 void __init smp_cpus_done(unsigned int max_cpus)
 175 {
 176         mp_ops->cpus_done();
 177 }
 178
 179 /* called from main before smp_init() */
 180 void __init smp_prepare_cpus(unsigned int max_cpus)
 181 {
 182         init_new_context(current, &init_mm);
 183         current_thread_info()->cpu = 0;
 184         mp_ops->prepare_cpus(max_cpus);
 185         set_cpu_sibling_map(0);
 186 #ifndef CONFIG_HOTPLUG_CPU
 187         init_cpu_present(cpu_possible_mask);
 188 #endif
 189 }
 190
 191 /* preload SMP state for boot cpu */
 192 void smp_prepare_boot_cpu(void)
 193 {
 194         set_cpu_possible(0, true);
 195         set_cpu_online(0, true);
 196         cpu_set(0, cpu_callin_map);
 197 }
 198
 199 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 200 {
 201         mp_ops->boot_secondary(cpu, tidle);
 202
 203         /*
 204          * Trust is futile.  We should really have timeouts ...
 205          */
 206         while (!cpu_isset(cpu, cpu_callin_map))
 207                 udelay(100);
 208
 209         synchronise_count_master(cpu);
 210         return 0;
 211 }
 212
 213 /* Not really SMP stuff ... */
 214 int setup_profiling_timer(unsigned int multiplier)
 215 {
 216         return 0;
 217 }
 218
 219 static void flush_tlb_all_ipi(void *info)
 220 {
 221         local_flush_tlb_all();
 222 }
 223
 224 void flush_tlb_all(void)
 225 {
 226         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 227 }
 228
 229 static void flush_tlb_mm_ipi(void *mm)
 230 {
 231         local_flush_tlb_mm((struct mm_struct *)mm);
 232 }
 233
 234 /*
 235  * Special Variant of smp_call_function for use by TLB functions:
 236  *
 237  *  o No return value
 238  *  o collapses to normal function call on UP kernels
 239  *  o collapses to normal function call on systems with a single shared
 240  *    primary cache.
 241  *  o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
 242  */
 243 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 244 {
 245 #ifndef CONFIG_MIPS_MT_SMTC
 246         smp_call_function(func, info, 1);
 247 #endif
 248 }
 249
 250 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 251 {
 252         preempt_disable();
 253
 254         smp_on_other_tlbs(func, info);
 255         func(info);
 256
 257         preempt_enable();
 258 }
 259
 260 /*
 261  * The following tlb flush calls are invoked when old translations are
 262  * being torn down, or pte attributes are changing. For single threaded
 263  * address spaces, a new context is obtained on the current cpu, and tlb
 264  * context on other cpus are invalidated to force a new context allocation
 265  * at switch_mm time, should the mm ever be used on other cpus. For
 266  * multithreaded address spaces, intercpu interrupts have to be sent.
 267  * Another case where intercpu interrupts are required is when the target
 268  * mm might be active on another cpu (eg debuggers doing the flushes on
 269  * behalf of debugees, kswapd stealing pages from another process etc).
 270  * Kanoj 07/00.
 271  */
 272
 273 void flush_tlb_mm(struct mm_struct *mm)
 274 {
 275         preempt_disable();
 276
 277         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 278                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 279         } else {
 280                 unsigned int cpu;
 281
 282                 for_each_online_cpu(cpu) {
 283                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 284                                 cpu_context(cpu, mm) = 0;
 285                 }
 286         }
 287         local_flush_tlb_mm(mm);
 288
 289         preempt_enable();
 290 }
 291
 292 struct flush_tlb_data {
 293         struct vm_area_struct *vma;
 294         unsigned long addr1;
 295         unsigned long addr2;
 296 };
 297
 298 static void flush_tlb_range_ipi(void *info)
 299 {
 300         struct flush_tlb_data *fd = info;
 301
 302         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 303 }
 304
 305 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 306 {
 307         struct mm_struct *mm = vma->vm_mm;
 308
 309         preempt_disable();
 310         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 311                 struct flush_tlb_data fd = {
 312                         .vma = vma,
 313                         .addr1 = start,
 314                         .addr2 = end,
 315                 };
 316
 317                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 318         } else {
 319                 unsigned int cpu;
 320
 321                 for_each_online_cpu(cpu) {
 322                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 323                                 cpu_context(cpu, mm) = 0;
 324                 }
 325         }
 326         local_flush_tlb_range(vma, start, end);
 327         preempt_enable();
 328 }
 329
 330 static void flush_tlb_kernel_range_ipi(void *info)
 331 {
 332         struct flush_tlb_data *fd = info;
 333
 334         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 335 }
 336
 337 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 338 {
 339         struct flush_tlb_data fd = {
 340                 .addr1 = start,
 341                 .addr2 = end,
 342         };
 343
 344         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 345 }
 346
 347 static void flush_tlb_page_ipi(void *info)
 348 {
 349         struct flush_tlb_data *fd = info;
 350
 351         local_flush_tlb_page(fd->vma, fd->addr1);
 352 }
 353
 354 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 355 {
 356         preempt_disable();
 357         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 358                 struct flush_tlb_data fd = {
 359                         .vma = vma,
 360                         .addr1 = page,
 361                 };
 362
 363                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 364         } else {
 365                 unsigned int cpu;
 366
 367                 for_each_online_cpu(cpu) {
 368                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 369                                 cpu_context(cpu, vma->vm_mm) = 0;
 370                 }
 371         }
 372         local_flush_tlb_page(vma, page);
 373         preempt_enable();
 374 }
 375
 376 static void flush_tlb_one_ipi(void *info)
 377 {
 378         unsigned long vaddr = (unsigned long) info;
 379
 380         local_flush_tlb_one(vaddr);
 381 }
 382
 383 void flush_tlb_one(unsigned long vaddr)
 384 {
 385         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 386 }
 387
 388 EXPORT_SYMBOL(flush_tlb_page);
 389 EXPORT_SYMBOL(flush_tlb_one);
 390
 391 #if defined(CONFIG_KEXEC)
 392 void (*dump_ipi_function_ptr)(void *) = NULL;
 393 void dump_send_ipi(void (*dump_ipi_callback)(void *))
 394 {
 395         int i;
 396         int cpu = smp_processor_id();
 397
 398         dump_ipi_function_ptr = dump_ipi_callback;
 399         smp_mb();
 400         for_each_online_cpu(i)
 401                 if (i != cpu)
 402                         mp_ops->send_ipi_single(i, SMP_DUMP);
 403
 404 }
 405 EXPORT_SYMBOL(dump_send_ipi);
 406 #endif